Adrian Conlon
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f01e3e0430
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Tighten up the sequence associated with changing pin levels + fix persistent HALT/PC bug
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-09-06 22:50:21 +01:00 |
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Adrian Conlon
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853b6e2b08
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Correct some straightforward analysis issues.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-07-01 00:15:25 +01:00 |
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Adrian Conlon
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133fc83e89
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Tidy the MC6850 a little, mainly to show that the step method is only called via the clock tick.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-27 10:53:44 +01:00 |
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Adrian Conlon
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efbd576624
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Resurrect the concept of pin level matching. Allows for easier device wiring.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-06 09:58:50 +01:00 |
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Adrian Conlon
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0340142282
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Correct a number of style issues across the EightBitNet solution.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-06 09:46:23 +01:00 |
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Adrian Conlon
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93122aaf1d
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MC6850: Tie chip stepping to external clock.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-04 15:21:40 +01:00 |
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Adrian Conlon
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bc06975796
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Tidy up some enumeration names in MC6850
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2019-04-24 16:16:47 +01:00 |
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Adrian Conlon
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15551adb68
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Correct a bunch of MC6809/MC6850 style issues.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-04-24 00:57:53 +01:00 |
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Adrian Conlon
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77a3171037
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Add an MC6850 ACIA implementation (not tested, direct port of the C++ code)
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2019-04-23 00:47:27 +01:00 |
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