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Preliminary WizNet5100 driver
This commit is contained in:
dschmenk
parent
5651c0b125
commit
175898913c
721
src/libsrc/wiznet.pla
Normal file
721
src/libsrc/wiznet.pla
Normal file
@ -0,0 +1,721 @@
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//
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// Wiznet 5100 based ethernet card
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//
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// TCP/IP is built into hardware, so no dependencies on the software
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// layers, like the Uthernet
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//
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import cmdsys
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predef syscall, call, getc, gets, putc, puts, putln
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predef isugt, isuge, isult, isule
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predef memset, memcpy, modaddr, modexec
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predef heapmark, heapallocalign, heapalloc, heaprelease, heapavail
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byte MACHID
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end
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//
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// Module don't free memory
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//
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const modkeep = $2000
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const modinitkeep = $4000
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//
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// Wiznet registers
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//
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const WIZ_MR = $00
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const WIZ_GWR = $01
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const WIZ_SUBR = $05
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const WIZ_SHAR = $09
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const WIZ_SIPR = $0F
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const WIZ_IR = $15
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const WIZ_IMR = $16
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const WIZ_RTR = $17
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const WIZ_RCR = $19
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const WIZ_RMSR = $1A
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const WIZ_TMSR = $1B
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const WIZ_PATR = $1C
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const WIZ_PTMR = $28
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const WIZ_PMGC = $29
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const WIZ_UIPR = $2A
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const WIZ_UPRT = $2E
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//
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// Wiznet socket registers
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//
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const WIZ_SREGS = $0400
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const WIZ_SSIZE = $0100
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const WIZ_SOCK0 = $0400
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const WIZ_SOCK1 = $0500
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const WIZ_SOCK2 = $0600
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const WIZ_SOCK3 = $0700
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const WIZ_SnMR = $00
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const WIZ_SnCR = $01
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const WIZ_SnIR = $02
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const WIZ_SnSR = $03
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const WIZ_SnPORT = $04
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const WIZ_SnDHAR = $06
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const WIZ_SnDIPR = $0C
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const WIZ_SnDPORT = $10
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const WIZ_SnMSSR = $12
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const WIZ_SnPROTO = $14
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const WIZ_SnTOS = $15
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const WIZ_SnTTL = $16
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const WIZ_SnFSR = $20
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const WIZ_SnTXRD = $22
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const WIZ_SnTXWR = $24
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const WIZ_SnRSR = $26
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const WIZ_SnRXRD = $28
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//
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// Wiznet socket data
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//
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const WIZ_TXMEM = $4000
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const WIZ_TXSIZE = $0800
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const WIZ_TXMASK = WIZ_TXSIZE-1
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const WIZ_TXMEM0 = $4000
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const WIZ_TXMEM1 = $4800
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const WIZ_TXMEM2 = $5000
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const WIZ_TXMEM3 = $5800
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const WIZ_RXMEM = $6000
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const WIZ_RXSIZE = $0800
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const WIZ_RXMASK = WIZ_RXSIZE-1
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const WIZ_RXMEM0 = $6000
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const WIZ_RXMEM1 = $6800
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const WIZ_RXMEM2 = $7000
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const WIZ_RXMEM3 = $7800
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//
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// Wiznet indirect registers
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//
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byte slot, regidx, regdata
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word saveidx
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//
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// Wiznet MAC address
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//
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byte[6] wizMAC = $00,$0A,$99,$1E,$02,$B0
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//
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// Wiznet IP addresses
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//
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byte[4] localip
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byte[4] subnet
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byte[4] gateway
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//
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// Predefine service routine
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//
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predef serviceIP
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//
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// Segment list element
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//
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struc t_segment
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word seg_buf
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word seg_len
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end
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//
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// Max Ethernet frame size
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//
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const MAX_FRAME_SIZE = 1518
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const MAC_BROADCAST = $FFFF
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const MAC_SIZE = 6
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//
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// Ethernet header
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//
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struc t_ethrhdr
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byte[MAC_SIZE] ethr_dst
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byte[MAC_SIZE] ethr_src
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word ethr_payload
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end
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const PAYLOAD_IP = $0008 // BE format
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const PAYLOAD_ARP = $0608 // BE format
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//
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// IP datagram header
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//
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const IP4ADR_SIZE = 4
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struc t_iphdr
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byte ip_vers_hlen
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byte ip_service
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word ip_length
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word ip_id
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word ip_flags_fragofst
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byte ip_ttl
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byte ip_proto
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word ip_chksm
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byte[IP4ADR_SIZE] ip_src
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byte[IP4ADR_SIZE] ip_dst
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byte[] ip_options
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end
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const IP_BROADCAST = $FFFF
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const IP_PROTO_ICMP = $01
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const IP_PROTO_UDP = $11
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const IP_PROTO_TCP = $06
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word bcast = IP_BROADCAST, IP_BROADCAST
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//
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// ICMP type/codes
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//
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const IP_PROTO_ICMP = 1
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const ICMP_ECHO_REQST = 8
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const ICMP_ECHO_REPLY = 0
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//
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// ICMP message format
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//
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struc t_icmp
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byte icmp_type
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byte icmp_code
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word icmp_chksm
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word[2] icmp_header
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end
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//
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// UDP IPv4 psuedo header
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//
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struc t_piphdr
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byte[IP4ADR_SIZE] pip_src
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byte[IP4ADR_SIZE] pip_dst
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byte pip_zero
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byte pip_proto
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word pip_len
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end
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//
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// UDP header
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//
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struc t_udphdr
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word udp_src
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word udp_dst
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word udp_len
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word udp_chksm
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end
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//
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// TCP header
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//
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struc t_tcphdr
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word tcp_src
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word tcp_dst
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word tcp_len
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word tcp_chksm
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end
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//
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// Local network parameters
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//
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const MAX_WIZ_CHANNELS = 4
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//
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// HW channels
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//
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struc t_channel
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byte channel_proto
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word channel_regs
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word channel_txmem
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word channel_rxmem
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word channel_lclport
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word channel_remport
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word channel_remip
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word channel_recv_func
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word channel_recv_parm
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end
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byte[t_channel * MAX_WIZ_CHANNELS] wizChannel
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//
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// Service ICMP hook
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//
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export word hookICMP
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//
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// Defines for ASM routines
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//
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asm equates
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!SOURCE "vmsrc/plvmzp.inc"
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end
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//
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// Swap bytes in word
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//
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export asm swab
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LDA ESTKL,X
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LDY ESTKH,X
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STA ESTKH,X
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STY ESTKL,X
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RTS
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end
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//
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// 1'S COMPLIMENT SUM BE format
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// sum1(PREVSUM, BUF, LEN)
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//
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export asm sum1
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LDY #$00
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LDA ESTKL+1,X
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STA SRCL
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LDA ESTKH+1,X
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STA SRCH
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LSR ESTKH,X ; CONVERT BYTE LEN TO WORD LEN
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LDA ESTKL,X
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ROR
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ADC #$00
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STA ESTKL,X
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BEQ +
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INC ESTKH,X
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BCC CHKLP
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INC ESTKH,X
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CLC
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CHKLP LDA (SRC),Y
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PHA
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INY
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BNE +
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INC SRCH
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+ LDA (SRC),Y
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ADC ESTKH+2,X
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STA ESTKH+2,X
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PLA
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ADC ESTKL+2,X
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STA ESTKL+2,X
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INY
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BNE +
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INC SRCH
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+ DEC ESTKL,X
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BNE CHKLP
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DEC ESTKH,X
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BNE CHKLP
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- LDA #$00
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ADC ESTKH+2,X
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STA ESTKH+2,X
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LDA #$00
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ADC ESTKL+2,X
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STA ESTKL+2,X
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BCS -
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INX
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INX
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RTS
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end
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//
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// Wiznet I/O functions
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//
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// POKE WORD TO I/O SPACE
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// Note: Big Endian format
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//
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asm _pokeiow
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LDA ESTKH,X
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end
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asm _pokeiowl
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STA $C000
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LDA ESTKL,X
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end
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asm _pokeiowh
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STA $C000
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RTS
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end
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//
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// POKE BYTE TO I/O SPACE
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//
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asm _pokeio
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LDA ESTKL,X
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end
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asm _pokeiol
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STA $C000
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RTS
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end
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//
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// PEEK BYTE FROM I/O SPACE
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//
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asm _peekio
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DEX
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end
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asm _peekiol
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LDA $C000
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STA ESTKL,X
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LDA #$00
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STA ESTKH,X
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RTS
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end
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//
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// PEEK WORD FROM I/O SPACE
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// Note: Big Endian format
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//
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asm _peekiow
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DEX
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end
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asm _peekiowl
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LDA $C000
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STA ESTKH,X
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end
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asm _peekiowh
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LDA $C000
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STA ESTKL,X
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RTS
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end
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//
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// WRITE DATA INTO I/O SPACE
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// pokedata(BUF, LEN)
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//
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asm pokedata
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LDA ESTKL+1,X
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STA SRCL
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LDA ESTKH+1,X
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STA SRCH
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LDY ESTKL,X
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BEQ POKELP
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LDY #$00
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INC ESTKH,X
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POKELP LDA (SRC),Y
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end
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asm _pokedata
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STA $C000
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INY
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BNE +
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INC SRCH
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+ DEC ESTKL,X
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BNE POKELP
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DEC ESTKH,X
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BNE POKELP
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INX
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RTS
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end
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//
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// READ DATA FROM I/O SPACE
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// peekdata(BUF, LEN)
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//
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asm peekdata
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LDA ESTKL+1,X
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STA DSTL
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LDA ESTKH+1,X
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STA DSTH
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LDY ESTKL,X
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BEQ PEEKLP
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LDY #$00
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INC ESTKH,X
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end
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asm _peekdata
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PEEKLP LDA $C000
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STA (DST),Y
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INY
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BNE +
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INC DSTH
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+ DEC ESTKL,X
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BNE PEEKLP
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DEC ESTKH,X
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BNE PEEKLP
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INX
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RTS
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end
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def pokeiow(io, data)
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_pokeiowl.1 = io
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_pokeiowh.1 = io+1
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return _pokeiow(data)
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end
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def pokeio(io, data)
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_pokeiol.1 = io
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return _pokeio(data)
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end
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def peekio(io)
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_peekiol.1 = io
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return _peekio()
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end
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def peekiow(io)
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_peekiowl.1 = io
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_peekiowh.1 = io+1
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return _peekiow()
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end
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def pokereg(reg, data)
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_pokeiow(reg)
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return _pokeio(data)
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end
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def peekreg(reg)
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_pokeiow(reg)
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return _peekio()
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end
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def pokeregs(reg, buf, len)
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word i
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len = len - 1
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for i = 0 to len
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_pokeiow(reg + i)
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_pokeio(buf->[i])
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next
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end
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def peekregs(reg, buf, len)
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// There is an issue missing data on back-to-back reads
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// _pokeiow(reg)
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// return peekdata(buf, len)
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word i
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len = len - 1
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for i = 0 to len
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_pokeiow(reg + i)
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buf->[i] = _peekio()
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next
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end
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def pokeregw(reg, dataw)
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_pokeiow(reg)
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_pokeio(dataw.1)
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return _pokeio(dataw.0)
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end
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def peekregw(reg)
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word dataw
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_pokeiow(reg)
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dataw.1 = _peekio()
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dataw.0 = _peekio()
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return dataw
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end
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//
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// DEBUG
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//
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def putln
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return putc($0D)
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end
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def putb(hexb)
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return call($FDDA, hexb, 0, 0, 0)
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end
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def puth(hex)
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return call($F941, hex >> 8, hex, 0, 0)
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end
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def puti(i)
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if i < 0; putc('-'); i = -i; fin
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if i < 10
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putc(i + '0')
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else
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puti(i / 10)
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putc(i % 10 + '0')
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fin
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end
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def putip(ipptr)
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byte i
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for i = 0 to 2
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puti(ipptr->[i]); putc('.')
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next
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return puti(ipptr->[i])
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end
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//
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// Send UDP datagram
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//
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export def sendUDP(wiz, ipdst, portdst, data, len)
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word wizregs, wizdata, txrr, txwr, splitlen
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wizregs = wiz=>channel_regs
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wizdata = wiz=>channel_txmem
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if !ipdst
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ipdst = @bcast
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fin
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//
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// Wait for Tx room
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//
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repeat
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txrr = peekregw(wizregs + WIZ_SnTXRD)
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txwr = peekregw(wizregs + WIZ_SnTXWR)
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until txrr == txwr
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//
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// Set destination address/port
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//
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pokeregs(wizregs + WIZ_SnDIPR, ipdst, IP4ADR_SIZE)
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pokeregw(wizregs + WIZ_SnDPORT, portdst)
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//
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// Calc new write ptr, check for split
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//
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txwr = txrr + len
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if txwr >= WIZ_TXSIZE
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splitlen = WIZ_TXSIZE - txrr
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pokeregs(wizdata + txrr, data, splitlen)
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pokeregs(wizdata, data + splitlen, len - splitlen)
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else
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pokeregs(wizdata + txrr, data, len)
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fin
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pokeregw(wizregs + WIZ_SnTXWR, txwr)
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pokereg(wizregs + WIZ_SnCR, $20) // SEND
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end
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//
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// Open UDP channel and set datagram received callback
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//
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export def openUDP(localport, callback, param)
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word wiz
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byte i
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if !localport; return -1; fin // invalid port
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//
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// Look for an existing notification on localport
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//
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wiz = @wizChannel
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for i = 1 to MAX_WIZ_CHANNELS
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if wiz->channel_proto == IP_PROTO_UDP and wiz=>channel_lclport == localport
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break
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fin
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wiz = wiz + t_channel
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next
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if i > MAX_WIZ_CHANNELS
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//
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// Add notification on localport if room
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//
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wiz = @wizChannel
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for i = 1 to MAX_WIZ_CHANNELS
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if !wiz->channel_proto
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break
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fin
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wiz = wiz + t_channel
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next
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if i > MAX_WIZ_CHANNELS
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return 0
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fin
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fin
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//
|
||||
// Fill in this channel and open it
|
||||
//
|
||||
wiz->channel_proto = IP_PROTO_UDP
|
||||
wiz=>channel_lclport = localport
|
||||
wiz=>channel_recv_func = callback
|
||||
wiz=>channel_recv_parm = param
|
||||
pokeregw(wiz=>channel_regs + WIZ_SnPORT, localport)
|
||||
pokereg(wiz=>channel_regs + WIZ_SnMR, $02) // UDP protocol
|
||||
pokereg(wiz=>channel_regs + WIZ_SnCR, $01) // OPEN
|
||||
return wiz
|
||||
end
|
||||
//
|
||||
// Close UDP port
|
||||
//
|
||||
export def closeUDP(wiz)
|
||||
if isuge(wiz, wizChannel) and isult(wiz, wizChannel + MAX_WIZ_CHANNELS * t_channel)
|
||||
//
|
||||
// Clear notiications on this port
|
||||
//
|
||||
if wiz->channel_proto == IP_PROTO_UDP
|
||||
wiz->channel_proto = 0
|
||||
pokereg(wiz=>channel_regs + WIZ_SnCR, $00) // CLOSE
|
||||
return 0
|
||||
fin
|
||||
fin
|
||||
//
|
||||
// Invalid port
|
||||
//
|
||||
return -1
|
||||
end
|
||||
//
|
||||
// Service incoming packets
|
||||
//
|
||||
export def serviceIP
|
||||
word wiz, wizregs, wizdata, rxlen, rxrr, rxwr, rxpkt, splitlen
|
||||
byte ir, i, sir
|
||||
|
||||
ir = peekreg(WIZ_IR)
|
||||
if ir and ir <> $FF // Ignore spurious read of IR
|
||||
//putc('I');putb(ir)
|
||||
wiz = @wizChannel
|
||||
for i = 0 to 3
|
||||
when ir & (1 << i)
|
||||
is 1
|
||||
is 2
|
||||
is 4
|
||||
is 8
|
||||
wizregs = wiz=>channel_regs
|
||||
wizdata = wiz=>channel_rxmem
|
||||
sir = peekreg(wizregs + WIZ_SnIR)
|
||||
when wiz->channel_proto
|
||||
is IP_PROTO_UDP
|
||||
//putc('U');putb(sir)
|
||||
if sir & $04
|
||||
//putc('R')
|
||||
//
|
||||
// Receive UDP packet
|
||||
//
|
||||
rxlen = peekregw(wizregs + WIZ_SnRSR)
|
||||
rxrr = peekregw(wizregs + WIZ_SnRXRD)
|
||||
rxwr = rxrr + rxlen
|
||||
rxpkt = heapalloc(rxlen)
|
||||
if rxwr >= WIZ_RXSIZE
|
||||
putc('!')
|
||||
splitlen = WIZ_RXSIZE - rxrr
|
||||
peekregs(wizdata + rxrr, rxpkt, splitlen)
|
||||
peekregs(wizdata, rxpkt + splitlen, rxlen - splitlen)
|
||||
else
|
||||
peekregs(wizdata + rxrr, rxpkt, rxlen)
|
||||
fin
|
||||
//putc('=');putip(rxpkt);putc(' ');puti(rxlen)
|
||||
//putc('/');puti(swab(rxpkt=>6))
|
||||
//putc(' ');puth(rxrr);putc(' ');puth(rxwr);putln
|
||||
pokeregw(wizregs + WIZ_SnRXRD, rxwr)
|
||||
pokereg(wizregs + WIZ_SnCR, $40) // RECV
|
||||
wiz=>channel_recv_func(rxpkt,swab(rxpkt=>4),rxpkt+8,rxlen-8,wiz=>channel_recv_parm)
|
||||
heaprelease(rxpkt)
|
||||
fin
|
||||
break
|
||||
is IP_PROTO_TCP
|
||||
break
|
||||
otherwise
|
||||
wend
|
||||
pokereg(wiz=>channel_regs + WIZ_SnIR, sir) // Clear SnIR
|
||||
ir = ir ^ (1 << i)
|
||||
break
|
||||
wend
|
||||
wiz = wiz + t_channel
|
||||
next
|
||||
if ir
|
||||
//
|
||||
// Clear IR for now
|
||||
//
|
||||
pokereg(WIZ_IR, ir)
|
||||
fin
|
||||
fin
|
||||
end
|
||||
//
|
||||
// Set the local IP addresses
|
||||
//
|
||||
export def setInterfaceIP(newIP, newSubnet, newGateway)
|
||||
if newIP
|
||||
localip:0 = newIP=>0; localip:2 = newIP=>2
|
||||
pokeregs(WIZ_SIPR, newIP, IP4ADR_SIZE)
|
||||
fin
|
||||
if newSubnet
|
||||
subnet:0 = newSubnet=>0; subnet:2 = newSubnet=>2
|
||||
pokeregs(WIZ_SUBR, newSubnet, IP4ADR_SIZE)
|
||||
fin
|
||||
if newGateway
|
||||
gateway:0 = newGateway=>0; gateway:2 = newGateway=>2
|
||||
pokeregs(WIZ_GWR, newGateway, IP4ADR_SIZE)
|
||||
fin
|
||||
end
|
||||
//
|
||||
// Get the interface hardware address
|
||||
//
|
||||
export def getInterfaceHA(ha)
|
||||
if ha
|
||||
ha=>0 = wizMAC:0; ha=>2 = wizMAC:2; ha=>4 = wizMAC:4
|
||||
fin
|
||||
return MAC_SIZE
|
||||
end
|
||||
//
|
||||
// Identify Wiznet card and initialize
|
||||
//
|
||||
for slot = $F0 downto $90 step $10
|
||||
regdata = peekio(slot)
|
||||
if (regdata & $E4) == $00
|
||||
pokeio(slot, $03) // Try setting auto-increment indirect I/F
|
||||
if peekio(slot) == $03
|
||||
saveidx = peekiow(slot + 1)
|
||||
peekio(slot + 3) // Dummy read to data register should increment index
|
||||
if peekiow(slot + 1) == saveidx + 1
|
||||
//
|
||||
// Good chance this is it
|
||||
//
|
||||
pokeio(slot, $80) // RESET
|
||||
regidx = slot + 1
|
||||
regdata = slot + 3
|
||||
_pokedata.1 = regdata
|
||||
_peekdata.1 = regdata
|
||||
pokeio(slot, $03) // Auto-increment indirect I/F + enable ping
|
||||
//
|
||||
// The following looks redundant, but it sets up the peek/poke locations
|
||||
// for peekreg(s)/pokereg(s)
|
||||
//
|
||||
pokeiow(regidx, WIZ_MR)
|
||||
pokeio(regdata, $03) // Auto-increment indirect I/F + enable ping
|
||||
peekio(regdata)
|
||||
//
|
||||
// Initialize common registers
|
||||
//
|
||||
pokeregs(WIZ_SHAR, @wizMAC, 6) // MAC addr
|
||||
pokeregw(WIZ_RTR, 5000) // Timeout period to 500ms
|
||||
//
|
||||
// Fill channel structure
|
||||
//
|
||||
saveidx = @wizChannel
|
||||
for slot = 0 to 3
|
||||
saveidx=>channel_regs = WIZ_SREGS + (WIZ_SSIZE * slot)
|
||||
saveidx=>channel_txmem = WIZ_TXMEM + (WIZ_TXSIZE * slot)
|
||||
saveidx=>channel_rxmem = WIZ_RXMEM + (WIZ_RXSIZE * slot)
|
||||
saveidx = saveidx + t_channel
|
||||
next
|
||||
return modkeep
|
||||
fin
|
||||
fin
|
||||
pokeio(slot, regdata) // Restore register
|
||||
fin
|
||||
next
|
||||
//
|
||||
// Not found
|
||||
//
|
||||
return -1
|
||||
done
|
||||
Loading…
Reference in New Issue
Block a user