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mirror of https://github.com/dschmenk/PLASMA.git synced 2025-02-13 15:31:09 +00:00

int32 WIP

This commit is contained in:
David Schmenk 2019-12-23 17:16:03 -08:00
parent 2197286604
commit 5f8f6f0a97

View File

@ -9,7 +9,7 @@ asm int32Inc
!SOURCE "vmsrc/plvmzp.inc"
ACCUM32 = DSTH+1
end
export asm accum32zero#0
export asm zero32#0
LDA #$00
STA ACCUM32+0
STA ACCUM32+1
@ -17,7 +17,13 @@ export asm accum32zero#0
STA ACCUM32+3
RTS
end
export asm accum32neg#0
export asm zext16to32#0
LDA #$00
STA ACCUM32+2
STA ACCUM32+3
RTS
end
export asm neg32#0
LDA #$00
SEC
SBC ACCUM32+0
@ -33,23 +39,10 @@ export asm accum32neg#0
STA ACCUM32+3
RTS
end
export asm accum32loadi(imm16)#0
LDY #$00
LDA ESTKL+0,X
STA ACCUM32+0
LDA ESTKH+0,X
BPL + ; SIGN EXTEND
DEY
+ STA ACCUM32+1
STY ACCUM32+2
STY ACCUM32+3
INX
RTS
end
export asm accum32load(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
export asm load32(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA SRCL
LDA ESTKH+0,X ; I32PTR
LDA ESTKH+0,X ; I32PTR
STA SRCL
LDY #$00
LDA (SRC),Y
@ -66,10 +59,23 @@ export asm accum32load(i32ptr)#0
INX
RTS
end
export asm accum32store(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
export asm loadi16(imm16)#0
LDY #$00
LDA ESTKL+0,X ; IMM16L
STA ACCUM32+0
LDA ESTKH+0,X ; IMM16H
BPL + ; SIGN EXTEND
DEY
+ STA ACCUM32+1
STY ACCUM32+2
STY ACCUM32+3
INX
RTS
end
export asm store32(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA DSTL
LDA ESTKH+0,X ; I32PTR
LDA ESTKH+0,X ; I32PTR
STA DSTL
LDY #$00
LDA ACCUM32+0
@ -85,13 +91,38 @@ export asm accum32store(i32ptr)#0
STA (DST),Y
RTS
end
export asm accum32addi(imm16)#0
export asm add32(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA SRCL
LDA ESTKH+0,X ; I32PTR
STA SRCL
LDY #$00
LDA ESTKL+0,X ; IMM16
LDA (SRC),Y
CLC
ADC ACCUM32+0
STA ACCUM32+0
LDA ESTKH+0,X ; IMM16
INY
LDA (SRC),Y
ADC ACCUM32+1
STA ACCUM32+1
INY
LDA (SRC),Y
ADC ACCUM32+2
STA ACCUM32+2
INY
LDA (SRC),Y
ADC ACCUM32+3
STA ACCUM32+3
INX
RTS
end
export asm addi16(imm16)#0
LDY #$00
LDA ESTKL+0,X ; IMM16L
CLC
ADC ACCUM32+0
STA ACCUM32+0
LDA ESTKH+0,X ; IMM16H
BPL +
DEY
+ ADC ACCUM32+1
@ -105,35 +136,38 @@ export asm accum32addi(imm16)#0
INX
RTS
end
export asm accum32add(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
export asm sub32(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA SRCL
LDA ESTKH+0,X ; I32PTR
LDA ESTKH+0,X ; I32PTR
STA SRCL
LDY #$00
LDA (SRC),Y
CLC
ADC ACCUM32+0
SEC
SBC ACCUM32+0
STA ACCUM32+0
INY
ADC ACCUM32+1
LDA (SRC),Y
SBC ACCUM32+1
STA ACCUM32+1
INY
ADC ACCUM32+2
LDA (SRC),Y
SBC ACCUM32+2
STA ACCUM32+2
INY
ADC ACCUM32+3
LDA (SRC),Y
SBC ACCUM32+3
STA ACCUM32+3
INX
RTS
end
export asm accum32subi(imm16)#0
export asm subi16(imm16)#0
LDY #$00
LDA ESTKL+0,X ; IMM16
LDA ESTKL+0,X ; IMM16L
SEC
SBC ACCUM32+0
STA ACCUM32+0
LDA ESTKH+0,X ; IMM16
LDA ESTKH+0,X ; IMM16H
BPL +
DEY
+ SBC ACCUM32+1
@ -147,44 +181,43 @@ export asm accum32subi(imm16)#0
INX
RTS
end
export asm accum32sub(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA SRCL
LDA ESTKH+0,X ; I32PTR
STA SRCL
LDY #$00
LDA (SRC),Y
SEC
SBC ACCUM32+0
STA ACCUM32+0
INY
SBC ACCUM32+1
STA ACCUM32+1
INY
SBC ACCUM32+2
STA ACCUM32+2
INY
SBC ACCUM32+3
STA ACCUM32+3
INX
RTS
end
export asm accum32shl(imm8)#0
LDA ESTKL+0,X ; IMM8
export asm shl32(imm8)#0
LDA ESTKL+0,X ; IMM8
AND #$01F
BEQ +
TAY
CMP #16
BCC +
LDY ACCUM32+1
STY ACCUM32+3
LDY ACCUM32+0
STY ACCUM32+2
LDY #$00
STY ACCUM32+1
STY ACCUM32+0
SBC #16
+ CMP #8
BCC +
LDY ACCUM32+2
STY ACCUM32+3
LDY ACCUM32+1
STY ACCUM32+2
LDY ACCUM32+0
STY ACCUM32+1
LDY #$00
STY ACCUM32+0
SBC #8
+ TAY
BEQ ++
- ASL ACCUM32+0
ROL ACCUM32+1
ROL ACCUM32+2
ROL ACCUM32+3
DEY
BNE -
INX
++ INX
RTS
end
export asm accum32shr(imm8)#0
LDA ESTKL+0,X ; IMM8
export asm shr32(imm8)#0
LDA ESTKL+0,X ; IMM8
AND #$01F
BEQ +
TAY
@ -196,31 +229,34 @@ export asm accum32shr(imm8)#0
ROR ACCUM32+0
DEY
BNE -
INX
+ INX
RTS
end
export asm accum32muli(imm16)#0
LDY #$00
LDA ESTKL+0,X ; IMM16
STA SRC+0
LDA ESTKH+0,X ; IMM16
STA SRC+1
BPL + ; SIGN EXTENR
DEY
+ STY SRC+2
STY SRC+3
end
export asm accum32mul(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
export asm mul32(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
STA TMPL
LDA ESTKH+0,X ; I32PTR
LDA ESTKH+0,X ; I32PTR
STA TMPH
LDY #$03
- LDA (TMP),Y
STA SRC,Y
DEY
BPL -
LDA ACCUM32+0
INY
BEQ _MUL
end
export asm muli16(imm16)#0
LDY #$00
LDA ESTKL+0,X ; IMM16L
STA SRC+0
LDA ESTKH+0,X ; IMM16H
STA SRC+1
BPL + ; SIGN EXTEND
DEY
+ STY SRC+2
STY SRC+3
LDY #$00
_MUL LDA ACCUM32+0
STA ESTKL-1,X
LDA ACCUM32+1
STA ESTKH-1,X
@ -228,15 +264,14 @@ export asm accum32mul(i32ptr)#0
STA ESTKL+0,X
LDA ACCUM32+3
STA ESTKH+0,X
LDA #$00
STA ACCUM32+0
STA ACCUM32+1
STA ACCUM32+2
STA ACCUM32+3
STY ACCUM32+0
STY ACCUM32+1
STY ACCUM32+2
STY ACCUM32+3
LDY #$03
LDA #$80
STA TMPL
_MULLP AND SRC,Y
- AND SRC,Y
BEQ +
CLC
LDA ESTKL-1,X
@ -261,101 +296,323 @@ _MULLP AND SRC,Y
ROL ACCUM32+2
ROL ACCUM32+3
LDA TMPL
BNE _MULLP
BNE -
++ INX
RTS
end
export asm accum32div(i32ptr)#0
LDA ESTKL+0,X ; I32PTR
export asm div32(i32ptr)#2
LDA ESTKL+0,X ; I32PTR
STA TMPL
LDA ESTKH+0,X ; I32PTR
LDA ESTKH+0,X ; I32PTR
STA TMPH
LDY #$03 ; DVSR = SRC..SRC+3
LDA (TMP),Y
BMI +
STA SRC+3
DEY
- LDA (TMP),Y
STA SRC,Y
DEY
BPL -
INY
BEQ _DIV
+ SEC
- LDA #$00
SBC (TMP),Y
STA SRC,Y
DEY
BPL -
LDY #$01
BNE _DIV
end
export asm divi16(imm16)#2
LDY #$00 ; DVSR = SRC..SRC+3
STY SRC+2
STY SRC+3
LDA ESTKH+0,X ; IMM16H
BPL +
TYA ; DVSR IS NEG
SEC
SBC ESTKL+0,X ; IMM16L
STA SRC+0
TYA
SBC ESTKH+0,X ; IMM16L
STA SRC+1
INY
BNE _DIV
+ STA SRC+1
LDA ESTKL+0,X ; IMM16L
STA SRC+0
_DIV STY DIVSGN ; LSB = SIGN OF DVSR
DEX ; REMNDR = ESTK..ESTK+1
LDY #$00
STY ESTKL+0,X
STY ESTKH+0,X
STY ESTKL+1,X
STY ESTKH+1,X
LDA SRC+0 ; DIVIDE BY 0?
ORA SRC+1
ORA SRC+2
ORA SRC+3
BNE +
STA ACCUM32+0 ; SET TO 0 AND EXIT
STA ACCUM32+1
STA ACCUM32+2
STA ACCUM32+3
- RTS
+ LDA ACCUM32+0 ; DIVIDE 0?
ORA ACCUM32+1
ORA ACCUM32+2
ORA ACCUM32+3
BEQ -
LDA ACCUM32+3 ; DVDND = ACCUM32
BPL +
LDA #$81 ; DVDND IS NEG
CLC
ADC DIVSGN
STA DIVSGN
TYA
SEC
SBC ACCUM32+0
STA ACCUM32+0
TYA
SBC ACCUM32+1
STA ACCUM32+1
TYA
SBC ACCUM32+2
STA ACCUM32+2
TYA
SBC ACCUM32+3
STA ACCUM32+3
+ LDY #$21 ; #BITS+1
- ASL ACCUM32+0 ; SKIP DVDND LEADING 0 BITS
ROL ACCUM32+1
ROL ACCUM32+2
ROL ACCUM32+3
DEY
BCC -
- ROL ESTKL+0,X ; REMNDR
ROL ESTKH+0,X
ROL ESTKL+1,X
ROL ESTKH+1,X
LDA ESTKL+0,X ; REMNDR
CMP SRC+0 ; DVSR
LDA ESTKH+0,X ; COMPARE
SBC SRC+1
LDA ESTKL+1,X
SBC SRC+2
LDA ESTKH+1,X
SBC SRC+3
BCC + ; IS LESS THAN?
STA ESTKH+1,X
LDA ESTKL+0,X ; REMNDR
SBC SRC+0 ; DVSR
STA ESTKL+0 ; SUBTRACT
LDA ESTKH+0,X
SBC SRC+1
STA ESTKH+0,X
LDA ESTKL+1,X
SBC SRC+2
STA ESTKL+1,X
SEC
+ ROL ACCUM32+0 ; DVDND
ROL ACCUM32+1 ; ROTATE IN RESULT
ROL ACCUM32+2
ROL ACCUM32+3
DEY
BNE -
LDA DIVSGN
BPL +
TYA
SEC
SBC ESTKL+0,X
STA ESTKL+0,X
TYA
SBC ESTKH+0,X
STA ESTKH+0,X
TYA
SBC ESTKL+1,X
STA ESTKL+1,X
TYA
SBC ESTKH+1,X
STA ESTKH+1,X
LDA DIVSGN
+ LSR
BCC +
TYA
SEC
SBC ACCUM32+0
STA ACCUM32+0
TYA
SBC ACCUM32+1
STA ACCUM32+1
TYA
SBC ACCUM32+2
STA ACCUM32+2
TYA
SBC ACCUM32+3
STA ACCUM32+3
+ RTS
end
export asm iseq32(i32ptr)#1
LDA ESTKL+0,X ; I32PTR
STA TMPL
LDA ESTKH+0,X ; I32PTR
STA TMPH
LDY #$03
- LDA (TMP),Y
STA SRC,Y
DEY
BPL -
LDA ACCUM32+3
BMI +
STA ESTKH+0,X
LDA ACCUM32+2
STA ESTKL+0,X
INY
BEQ _ISEQ
end
export asm iseqi16(imm16)#1
LDY #$00
LDA ESTKL+0,X ; IMM16L
STA SRC+0
LDA ESTKH+0,X ; IMM16H
STA SRC+1
BPL + ; SIGN EXTEND
DEY
+ STY SRC+2
STY SRC+3
LDY #$00
_ISEQ LDA ACCUM32+0
CMP SRC+0
BNE +
LDA ACCUM32+1
STA ESTKH-1,X
LDA ACCUM32+0
STA ESTKL-1,X
SEC
LDA #$00
SBC ACCUM32+0
STA ESTKL-1,X
LDA #$00
SBC ACCUM32+1
STA ESTKH-1,X
LDA #$00
SBC ACCUM32+2
STA ESTKL+0,X
LDA #$00
SBC ACCUM32+3
STA ESTKH+0,X
LDA #$00
STA ACCUM32+0
STA ACCUM32+1
STA ACCUM32+2
STA ACCUM32+3
LDY #$03
_NEG LDA #$00
SEC
SBC ESTKL,X
STA ESTKL,X
LDA #$00
SBC ESTKH,X
STA ESTKH,X
RTS
_DIV STY IPY
LDY #$11 ; #BITS+1
LDA #$00
STA TMPL ; REMNDRL
STA TMPH ; REMNDRH
STA DVSIGN
LDA ESTKH+1,X
BPL +
INX
JSR _NEG
DEX
LDA #$81
STA DVSIGN
+ ORA ESTKL+1,X ; DVDNDL
BEQ _DIVEX
LDA ESTKH,X
BPL _DIV1
JSR _NEG
INC DVSIGN
_DIV1 ASL ESTKL+1,X ; DVDNDL
ROL ESTKH+1,X ; DVDNDH
CMP SRC+1
BNE +
LDA ACCUM32+2
CMP SRC+2
BNE +
LDA ACCUM32+3
CMP SRC+3
BNE +
DEY
BCC _DIV1
_DIVLP ROL TMPL ; REMNDRL
ROL TMPH ; REMNDRH
LDA TMPL ; REMNDRL
CMP ESTKL,X ; DVSRL
LDA TMPH ; REMNDRH
SBC ESTKH,X ; DVSRH
BCC +
STA TMPH ; REMNDRH
LDA TMPL ; REMNDRL
SBC ESTKL,X ; DVSRL
STA TMPL ; REMNDRL
SEC
+ ROL ESTKL+1,X ; DVDNDL
ROL ESTKH+1,X ; DVDNDH
DEY
BNE _DIVLP
_DIVEX INX
LDY IPY
+ STY ESTKL+0,X
STY ESTKH+0,X
RTS
end
export asm isge32(i32ptr)#1
LDA ESTKL+0,X ; I32PTR
STA TMPL
LDA ESTKH+0,X ; I32PTR
STA TMPH
LDY #$03
- LDA (TMP),Y
STA SRC,Y
DEY
BPL -
INY
BEQ _ISGE
end
export asm isgei16(imm16)#1
LDY #$00
LDA ESTKL+0,X ; IMM16L
STA SRC+0
LDA ESTKH+0,X ; IMM16H
STA SRC+1
BPL + ; SIGN EXTEND
DEY
+ STY SRC+2
STY SRC+3
LDY #$00
_ISGE LDA ACCUM32+0
CMP SRC+0
LDA ACCUM32+1
SBC SRC+1
LDA ACCUM32+2
SBC SRC+2
LDA ACCUM32+3
SBC SRC+3
BVC +
EOR #$80
+ BMI +
DEY
+ STY ESTKL+0,X
STY ESTKH+0,X
RTS
done
export asm isle32(i32ptr)#1
LDA ESTKL+0,X ; I32PTR
STA TMPL
LDA ESTKH+0,X ; I32PTR
STA TMPH
LDY #$03
- LDA (TMP),Y
STA SRC,Y
DEY
BPL -
INY
BEQ _ISLE
end
export asm islei16(imm16)#1
LDY #$00
LDA ESTKL+0,X ; IMM16L
STA SRC+0
LDA ESTKH+0,X ; IMM16H
STA SRC+1
BPL + ; SIGN EXTEND
DEY
+ STY SRC+2
STY SRC+3
LDY #$00
_ISLE LDA SRC+0
CMP ACCUM32+0
LDA SRC+1
SBC ACCUM32+1
LDA SRC+2
SBC ACCUM32+2
LDA SRC+3
SBC ACCUM32+3
BVC +
EOR #$80
+ BMI +
DEY
+ STY ESTKL+0,X
STY ESTKH+0,X
RTS
done
ISGT LDA ESTKL,X
CMP ESTKL+1,X
LDA ESTKH,X
SBC ESTKH+1,X
BVS +
BMI ISTRU
BPL ISFLS
+
- BMI ISFLS
BPL ISTRU
ISLT LDA ESTKL+1,X
CMP ESTKL,X
LDA ESTKH+1,X
SBC ESTKH,X
BVS -
BMI ISTRU
BPL ISFLS
done
def puti32(i32ptr)#0
res[t_i32] save
var iptr, rem
char[12] istr
iptr = @istr.11
store32(@save)
load32(i32ptr)
if i32ptr->3 & $80
neg32()
putc('-')
fin
repeat
rem = divi16(10)
^iptr = rem + '0'
iptr--
until isgti16(0)
^iptr = @istr.11 - iptr
puts(iptr)
load32(@save)
done