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VBL test compatible with IIe and IIc

This commit is contained in:
dschmenk 2023-03-20 10:55:46 -07:00
parent 655e410a1d
commit 9932639b1b
5 changed files with 45 additions and 32 deletions

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@ -6,6 +6,7 @@ import dgrlib
predef dgrTile(x, y, src)#0
predef dgrTileStr(x, y, tilestr, strlen, tilebuff)#0
predef dgrFill(x, y, tile)#0
predef dgrVLB#0
predef dgrClear(clr)#0
predef dgrMode(mode)#1
predef dgrShow(page)#1

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@ -6,6 +6,7 @@ import grlib
predef grTile(x, y, src)#0
predef grTileStr(x, y, tilestr, strlen, tilebuff)#0
predef grFill(x, y, tile)#0
predef dgrVLB#0
predef grClear(clr)#0
predef grMode(mode)#1
predef grShow(page)#1

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@ -492,39 +492,23 @@ asm _dgrFillTile
RTS
end
//
// Wait for VLB - Only IIe/IIGS.
// Wait for VLB
//
asm vlbWait#0
export asm dgrVLB#0
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BMI -
- LDA $C019
BPL -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
PLP
RTS
end
// Wait for VBL on IIc is entirely different from others.
// Setup, one-time *only* if polling will be used exclusively.
// Otherwise requires restoring the mode on exit,
// and setting up per-use instead.
// [php]
// sei ; otherwise interrupt is still raised
// sta $C07F ; enable access to VBL register
// sta $C05B ; enable VBL polling
// sta $C07E ; disable access to VBL register
//
// wait for VBL:
// - bit $C019
// bpl -
// lda $C070 ; $c019 bit 7 is sticky, reset it
//
// To allow other methods of VBL, restore access:
// - bit $C019
// bpl -
// lda $C070 ; $c019 bit 7 is sticky, reset it
// sta $C07F ; enable access to VBL register
// sta $C05A ; disable VBL polling
// sta $C07E ; disable access to VBL register
// [plp]
//
// Clear the buffer
//

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@ -407,6 +407,28 @@ asm _grFillTile
RTS
end
//
// Wait for VLB
//
export asm grVLB#0
LDA $BF98
AND #$C0
CMP #$80
BNE +
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BMI -
- LDA $C019
BPL -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
PLP
+ RTS
end
//
// Clear the buffer
//
export def grClear(clr)#0
@ -458,6 +480,7 @@ export def grShow(page)#1
return page ^ 1
end
export def grSwap#0
//vlbWait
^(showpage1 + drawpage)
drawpage = drawpage ^ 1
drawbuff = grbuff[drawpage]

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@ -994,22 +994,26 @@ def keyin3
end
def keyin2e
byte key, vbl
^$C07F = 0 // IOUDis: off
^$C05B // Enable VBL Ints on a //c
^$C079 = 0 // IOU enable and clear VBL int on //c
^$C05B = 0 // Enable VBL Ints on //c
vbl = ^$C019
repeat
vbl = ^$C019
if flags & showcurs
if flash == 0
^cursptr = curschr
elsif flash == 128
^cursptr = underchr
fin
if vbl ^ ^$C019; flash = flash + 8; fin
if vbl ^ ^$C019
flash = flash + 8
vbl = ^$C019
^$C079 = 0 // Clear VBL int on //c
fin
fin
key = ^keyboard
until key >= 128
^$C05A // Disable VBL Ints on a //c
^$C07E = 0 // IOUDis: on
^$C05A = 0 // Disable VBL Ints on //c
^$C078 = 0 // IOU disable on //c
^keystrobe
if ^pushbttn2 & 128 // Closed Apple pressed
when key