Merge pull request #56 from peterferrie/master

notes on IIc VBL

src/libsrc/apple/dgrlib.pla

@@ -196,9 +196,8 @@ export asm dgrBLT(x, y, width, height, src)#0
         CLC
         ADC     ESTKL+2,X   ; WIDTH
         STA     SRCL
-        LDA     SRCH
-        ADC     #$00
-        STA     SRCH
+        BCC     +++
+        INC     SRCH
         BNE     +++
 +       AND     #$FE
         TAY
@@ -356,9 +355,8 @@ export asm dgrTile(x, y, src)#0
         LDA     SRCL        ; SKIP TO NEXT ROW
         ADC     #$07        ; CARRY = 1
         STA     SRCL
-        LDA     SRCH
-        ADC     #$00
-        STA     SRCH
+        BCC     +++
+        INC     SRCH
         BNE     +++
 +       AND     #$FE
         TAY
@@ -494,7 +492,7 @@ asm _dgrFillTile
         RTS
 end
 //
-// Wait for VLB - Shouldn't work on //c, but seems to.
+// Wait for VLB - Only IIe/IIGS.
 //
 asm vlbWait#0
 -       LDA     $C019
@@ -503,6 +501,30 @@ asm vlbWait#0
         BPL     -
         RTS
 end
+// Wait for VBL on IIc is entirely different from others.
+// Setup, one-time *only* if polling will be used exclusively.
+// Otherwise requires restoring the mode on exit,
+// and setting up per-use instead.
+//   [php]
+//   sei         ; otherwise interrupt is still raised
+//   sta   $C07F ; enable access to VBL register
+//   sta   $C05B ; enable VBL polling
+//   sta   $C07E ; disable access to VBL register
+//
+// wait for VBL:
+// - bit   $C019
+//   bpl   -
+//   lda   $C070 ; $c019 bit 7 is sticky, reset it
+//
+// To allow other methods of VBL, restore access:
+// - bit   $C019
+//   bpl   -
+//   lda   $C070 ; $c019 bit 7 is sticky, reset it
+//   sta   $C07F ; enable access to VBL register
+//   sta   $C05A ; disable VBL polling
+//   sta   $C07E ; disable access to VBL register
+//   [plp]
+
 //
 // Clear the buffer
 //

src/libsrc/apple/mouse.pla

@@ -270,7 +270,7 @@ CHKSIG: LDY #$05
     LDA (TMPTR),Y
     CMP #$01
     BNE :+
-    LDY #$0C
+    INY
     TXA         ; LOOK FOR MATCHING ID
     CMP (TMPTR),Y
     BNE :+
@@ -283,7 +283,6 @@ CHKSIG: LDY #$05
     LDA TMPTR+1
     CMP #$C8
     BCC CHKSIG
-    SEC
     RTS
 
 ;*