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Don't fudge the name of IndexRefs; dig in to find the ref's name.

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This commit is contained in:
Chris Pressey
2018-02-13 17:17:27 +00:00
parent 6039e59999
commit 5fa8c69bd2
2 changed files with 5 additions and 6 deletions
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8
src/sixtypical/compiler.py
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@@ -156,9 +156,9 @@ class Compiler(object):
elif isinstance(src, ConstantRef):
self.emitter.emit(LDA(Immediate(Byte(src.value))))
elif isinstance(src, IndexedRef) and src.index == REG_X:
self.emitter.emit(LDA(AbsoluteX(self.get_label(src.name))))
self.emitter.emit(LDA(AbsoluteX(self.get_label(src.ref.name))))
elif isinstance(src, IndexedRef) and src.index == REG_Y:
self.emitter.emit(LDA(AbsoluteY(self.get_label(src.name))))
self.emitter.emit(LDA(AbsoluteY(self.get_label(src.ref.name))))
elif isinstance(src, IndirectRef) and isinstance(src.ref.type, PointerType):
self.emitter.emit(LDA(IndirectY(self.get_label(src.ref.name))))
else:
@@ -169,7 +169,7 @@ class Compiler(object):
elif isinstance(src, ConstantRef):
self.emitter.emit(LDX(Immediate(Byte(src.value))))
elif isinstance(src, IndexedRef) and src.index == REG_Y:
self.emitter.emit(LDX(AbsoluteY(self.get_label(src.name))))
self.emitter.emit(LDX(AbsoluteY(self.get_label(src.ref.name))))
else:
self.emitter.emit(LDX(Absolute(self.get_label(src.name))))
elif dest == REG_Y:
@@ -178,7 +178,7 @@ class Compiler(object):
elif isinstance(src, ConstantRef):
self.emitter.emit(LDY(Immediate(Byte(src.value))))
elif isinstance(src, IndexedRef) and src.index == REG_X:
self.emitter.emit(LDY(AbsoluteX(self.get_label(src.name))))
self.emitter.emit(LDY(AbsoluteX(self.get_label(src.ref.name))))
else:
self.emitter.emit(LDY(Absolute(self.get_label(src.name))))
else:

3
src/sixtypical/model.py
View File

@@ -202,8 +202,7 @@ class IndexedRef(Ref):
@property
def name(self):
return self.ref.name
#return '{}+{}'.format(self.ref.name, self.index.name)
return '{}+{}'.format(self.ref.name, self.index.name)
def is_constant(self):
return False