2018-08-05 15:33:15 +00:00
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;ACME 0.96.4
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2012-02-27 21:14:46 +00:00
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2014-06-02 00:47:46 +00:00
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!ifdef lib_65816_std_a !eof
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2017-11-03 17:48:49 +00:00
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lib_65816_std_a = 2
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2012-02-27 21:14:46 +00:00
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; Labels and macros for Western Digital's 65c816 processor
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2014-06-02 00:47:46 +00:00
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!address {
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cpu_e_cop = $fff4
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cpu_e_abort = $fff8
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cpu_e_nmi = $fffa
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cpu_e_reset = $fffc
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cpu_e_irq = $fffe
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2017-11-03 17:48:49 +00:00
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cpu_n_cop = $ffe4
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cpu_n_brk = $ffe6
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cpu_n_abort = $ffe8
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cpu_n_nmi = $ffea
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; no reset vector for native mode because reset always enters emulation mode
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cpu_n_irq = $ffee
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2014-06-02 00:47:46 +00:00
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}
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2012-02-27 21:14:46 +00:00
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!macro cpu_emu {; switch to emulation mode
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sec
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xce
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}
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!macro cpu_native {; switch to native mode
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clc
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xce
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}
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!macro a8 {; switch A to 8 bit
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sep #%..#.....
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!as
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}
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!macro a16 {; switch A to 16 bit
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rep #%..#.....
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!al
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}
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!macro i8 {; switch X/Y to 8 bit
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sep #%...#....
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!rs
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}
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!macro i16 {; switch X/Y to 16 bit
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rep #%...#....
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!rl
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}
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!macro ai8 {; switch A/X/Y to 8 bit
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sep #%..##....
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!as
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!rs
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}
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!macro ai16 {; switch A/X/Y to 16 bit
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rep #%..##....
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!al
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!rl
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}
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!macro a8i16 {; switch A to 8, X/Y to 16 bit
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+a8
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+i16
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}
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!macro a16i8 {; switch A to 16, X/Y to 8 bit
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+a16
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+i8
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}
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2018-08-05 15:33:15 +00:00
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!macro inc24 @t {; increase 24-bit counter
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inc @t
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2014-06-02 00:47:46 +00:00
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bne +
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2018-08-05 15:33:15 +00:00
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inc @t + 1
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2014-06-02 00:47:46 +00:00
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bne +
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2018-08-05 15:33:15 +00:00
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inc @t + 2
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2014-06-02 00:47:46 +00:00
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+
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2012-02-27 21:14:46 +00:00
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}
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