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https://github.com/uffejakobsen/acme.git
synced 2024-06-15 12:29:32 +00:00
added more constants to vdc.a
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@20 4df02467-bbd4-4a76-a152-e7ce94205b78
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marcobaye
parent
70a5f68708
commit
1683e2bb3c
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@ -3,7 +3,31 @@
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!ifdef lib_cbm_c128_vdc_a !eof
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lib_cbm_c128_vdc_a = 1
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; access macros
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; there are three different versions of the C128's Video Display Controller:
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; v0: VDC 8563 R7A in C128 and C128-D
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; v1: VDC 8563 R8/R9 in C128 and C128-D
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; v2: VDC 8568 in C128-DCR
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; 8563 and 8568 have different pinouts, so do not try to use one of them on a
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; board intended for the other!
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; hardware differences:
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; the 8563 uses external circuitry to convert RGBIHV to monochrome/luminance.
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; the 8568 does a part of this internally and therefore needs fewer external
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; components.
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; the 8568 has an additional register (r37) to change sync polarities.
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; software differences:
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; the horizontal scroll bits of r25 differ between v0 and v1/v2: in v0, set these
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; bits to zero. in v1/v2, set these bits to the same value as bits4-7 of r22.
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; the additional register r37 can be ignored (as the C128 kernal does).
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; access macros:
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!macro vdc_lda {
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- bit vdc_state
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@ -41,7 +65,8 @@ lib_cbm_c128_vdc_a = 1
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sty vdc_data
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}
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; color codes
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; color codes:
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; These are the colors officially available on the C128 - the same names as if
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; using a C64's VIC, but different codes of course.
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@ -98,6 +123,7 @@ vdccolor_DGRAY = %...# ; "light black" => "dark grey"
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vdccolor_LGRAY = %###. ; "dark white" => "light grey"
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vdccolor_WHITE = %#### ; "light white" => "white"
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; attribute flags (2rufRGBI)
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vdcattr_2ND = %#....... ; second character set
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vdcattr_REVS = %.#...... ; reverse mode
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@ -108,52 +134,90 @@ vdcattr_G = %.....#.. ; green
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vdcattr_B = %......#. ; blue
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vdcattr_I = %.......# ; intensity
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; direct registers
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vdc_state = $d600 ; 1b "ready", 1b "lightpen", 1b "rescan", 5b "version"
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vdc_reg = $d600
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vdc_data = $d601
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; indirect registers
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vdcr_htotal = $00 ; card columns (total), minus one
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vdcr_columns = $01 ; card columns actually displayed
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vdcr_hdisp = $01
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vdcr_hsync_pos = $02 ; card to send horizontal sync in
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vdcr_syncwidth = $03 ; 4b vertical, 4b horizontal
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vdcr_vtotal = $04 ; card lines (total), minus one
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vdcr_vadjust = $05 ; additionally scan lines
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vdcr_lines = $06 ; card lines actually displayed
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vdcr_vdisp = $06
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vdcr_vsync_pos = $07 ; card line to send vertical sync in
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vdcr_interlace = $08 ; interlace mode
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vdcr_cardheight = $09 ; 5b total, minus one
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vdcr_crsr_start = $0a ; 2b mode, 5b scanline
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vdcr_crsr_end = $0b ; 5b scanline
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vdcr_display_hi = $0c ; RAM address of display buffer
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vdcr_display_lo = $0d
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vdcr_crsr_hi = $0e ; RAM address of cursor
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vdcr_crsr_lo = $0f
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vdcr_lp_y = $10 ; y position of light pen
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vdcr_lp_x = $11 ; x position
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vdcr_ram_hi = $12 ; RAM address of register $1f
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vdcr_ram_lo = $13
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vdcr_attr_hi = $14 ; RAM address of attribute buffer
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vdcr_attr_lo = $15
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vdcr_cardwidth_charwidth = $16; 4b total, 4b displayed
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vdcr_charheight = $17 ; 5b displayed, minus one
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vdcr_control_v = $18 ; vertical scroll and much other stuff
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vdcr_control_h = $19 ; horizontal scroll and much other stuff
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vdcr_color = $1a ; 4b foreground, 4b background
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vdcr_row_inc = $1b ; Address increment per row
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vdcr_charset = $1c ; 3b charset pointer, 1b RAM type, 4b unused
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vdcr_underline = $1d ; 5b scanline
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vdcr_cycles = $1e ; number of write- or copy-cycles. 0 means 256.
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vdcr_access = $1f ; RAM content of address r$12/13
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vdcr_source_hi = $20 ; RAM address of cycle start
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vdcr_source_lo = $21
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vdcr_enable_start = $22 ; column to enable display in
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vdcr_enable_end = $23 ; column to disable display in
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vdcr_dram_refresh = $24 ; RAM refresh rate
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vdcr_sync_polarity = $25 ; only in type 2 VDCs
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; direct registers
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vdc_state = $d600 ; READING this location yields status flags:
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vdcstate_READY = %#....... ; RAM access is finished
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vdcstate_LIGHTPEN = %.#...... ; light pen has been activated
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vdcstate_IN_BORDER = %..#..... ; electron beam is in upper or lower border
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vdcstate_VERSIONMASK = %...##### ; vdc version (0, 1 or 2)
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vdc_reg = $d600 ; WRITING this location selects an indirect register
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vdc_data = $d601 ; data of selected indirect register
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; indirect registers (default value, see $e179 in C128 kernal)
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vdcr_htotal = $00 ; 126 (127 for PAL, depends on kernal version) characters per line, minus one
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vdcr_columns = $01 ; 80 characters per line, actually displayed
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vdcr_hdisp = $01
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vdcr_hsync_pos = $02 ; 102 character position to send horizontal sync in
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vdcr_syncwidth = $03 ; $49 4b vertical, 4b horizontal
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vdcr_vtotal = $04 ; 32 (39 or 38 for PAL, depends on kernal version) character lines per screen, minus one
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vdcr_vadjust = $05 ; 0 additional scan lines per screen (to fix timings)
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vdcr_lines = $06 ; 25 character lines per screen, actually displayed
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vdcr_vdisp = $06
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vdcr_vsync_pos = $07 ; 29 (32 for PAL) character line to send vertical sync in
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vdcr_interlace = $08 ; 0 interlace mode (0=2=std, 1=jitter, 3=interlace)
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vdcr_charheight_total = $09 ; 7 5b total, minus one
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vdcr_crsr_start = $0a ; $20 2b mode, 5b scanline
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vdcr_CRSRSTART_MODE_MASK = %.##.....
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; vdcr_CRSRSTART_MODE_FIXED = %........ ; fixed cursor
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vdcr_CRSRSTART_MODE_OFF = %..#..... ; invisible
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vdcr_CRSRSTART_MODE_FAST = %.#...... ; flashing with 1/16 of refresh freq
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vdcr_CRSRSTART_MODE_SLOW = %.##..... ; flashing with 1/32 of refresh freq
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vdcr_crsr_end = $0b ; 7 5b scanline
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vdcr_display_hi = $0c ; 0 RAM address of display buffer
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vdcr_display_lo = $0d ; 0
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vdcr_crsr_hi = $0e ; 0 RAM address of cursor
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vdcr_crsr_lo = $0f ; 0
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vdcr_lp_y = $10 ; -- y position of light pen (lines, plus 1)
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vdcr_lp_x = $11 ; -- x position if light pen (characters, plus 8)
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vdcr_ram_hi = $12 ; -- RAM address of register $1f
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vdcr_ram_lo = $13 ; --
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vdcr_attr_hi = $14 ; $08 RAM address of attribute buffer
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vdcr_attr_lo = $15 ; $00
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vdcr_charwidth = $16 ; $78 4b total minus one, 4b displayed minus one
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vdcr_charheight_disp = $17 ; 8 5b displayed, minus one
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vdcr_control_v = $18 ; $20 vertical scroll and much other stuff
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vdcr_CONTROLV_BLOCKMODE_MASK = %#.......
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; vdcr_CONTROLV_BLOCKMODE_WRITE = %........
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vdcr_CONTROLV_BLOCKMODE_COPY = %#.......
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vdcr_CONTROLV_REVERSESCREEN = %.#......
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vdcr_CONTROLV_FLASHFREQ_MASK = %..#.....
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; vdcr_CONTROLV_FLASHFREQ_FAST = %........
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vdcr_CONTROLV_FLASHFREQ_SLOW = %..#.....
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vdcr_CONTROLV_UPSCROLL_MASK = %...#####
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vdcr_control_h = $19 ; $47 ($40 for vdc version 0) horizontal scroll and much other stuff
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vdcr_CONTROLH_MODE_MASK = %#.......
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; vdcr_CONTROLH_MODE_TEXT = %........
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vdcr_CONTROLH_MODE_BITMAP = %#.......
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vdcr_CONTROLH_ATTRIBUTES_MASK = %.#......
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; vdcr_CONTROLH_ATTRIBUTES_OFF = %........
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vdcr_CONTROLH_ATTRIBUTES_ON = %.#......
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vdcr_CONTROLH_SEMIGRAPHICS = %..#.....
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vdcr_CONTROLH_PIXELWIDTH_MASK = %...#....
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; vdcr_CONTROLH_PIXELWIDTH_NARROW = %........
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vdcr_CONTROLH_PIXELWIDTH_WIDE = %...#....
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vdcr_CONTROLH_LEFTSCROLL_MASK = %....####
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vdcr_color = $1a ; $f0 4b foreground, 4b background
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vdcr_COLOR_FOREGROUND_MASK = %####.... ; only used if attributes are off
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vdcr_COLOR_BACKGROUND_MASK = %....####
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vdcr_row_inc = $1b ; 0 address increment per row
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vdcr_charset = $1c ; $20 3b charset pointer, 1b RAM type, 4b unused
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vdcr_CHARSET_ADRESS_MASK = %###.....
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vdcr_CHARSET_RAMTYPE_MASK = %...#....
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; vdcr_CHARSET_RAMTYPE_16K = %........
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vdcr_CHARSET_RAMTYPE_64K = %...#....
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vdcr_underline = $1d ; 7 5b scanline
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vdcr_cycles = $1e ; -- number of write- or copy-cycles. 0 means 256.
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vdcr_access = $1f ; -- RAM content of address r$12/13
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vdcr_source_hi = $20 ; -- RAM address of cycle start
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vdcr_source_lo = $21 ; --
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vdcr_enable_start = $22 ; 125 column to enable display in
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vdcr_enable_end = $23 ; 100 column to disable display in
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vdcr_dram_refresh = $24 ; 5 RAM refresh rate (lower 4 bits)
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vdcr_sync_polarity = $25 ; -- only in VDC 8568
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vdcr_HSYNC_POLARITY = %#.......
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vdcr_VSYNC_POLARITY = %.#......
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; the c128 ROMs contain look-up tables to convert vic color values to vdc color
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; values and vice-versa:
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