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Added library files for GeoRAM and CBM REU. Expanded library files for C128's VIC, VDC and MMU.
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@14 4df02467-bbd4-4a76-a152-e7ce94205b78
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marcobaye
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@ -3,24 +3,143 @@
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!ifdef lib_cbm_c128_mmu_a !eof
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lib_cbm_c128_mmu_a = 1
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; mirrored registers, available in every configuration:
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mmu_cr = $ff00
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mmu_lcra = $ff01
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mmu_lcrb = $ff02
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mmu_lcrc = $ff03
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mmu_lcrd = $ff04
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; Memory Management Unit (MMU) 8722
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; "normal" registers, only available when accessing i/o space:
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;mmu_cr = $d500; need not be defined: If $d500 works, $ff00 does as well.
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mmu_pcra = $d501
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mmu_pcrb = $d502
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mmu_pcrc = $d503
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mmu_pcrd = $d504
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; registers in i/o area (i/o needs to be enabled to access these):
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; configuration register
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mmu_cr_d500 = $d500 ; same as "mmu_cr" at $ff00. Use "mmu_cr" instead, as that is *always* available.
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; preconfiguration registers (internal format just like mmu_cr)
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mmu_pcr_a = $d501 ; c128 kernel default is $3f (BANK 0)
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mmu_pcr_b = $d502 ; c128 kernel default is $7f (BANK 1)
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mmu_pcr_c = $d503 ; c128 kernel default is $01 (BANK 14)
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mmu_pcr_d = $d504 ; c128 kernel default is $41 (all system roms, with ram 1)
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; contents of cr and all four pcr:
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mmu_CR_RAMBANK_MASK = %##...... ; this controls which RAM bank is used in areas where RAM is enabled
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; mmu_CR_RAMBANK_0 = %........
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mmu_CR_RAMBANK_1 = %.#......
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mmu_CR_RAMBANK_2 = %#....... ; on an unmodified c128, there is no ram bank 2 (0 will be used instead)
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mmu_CR_RAMBANK_3 = %##...... ; on an unmodified c128, there is no ram bank 3 (1 will be used instead)
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mmu_CR_HIGH_MASK = %..##.... ; this controls the "high area" (c000..ffff), but i/o (d000..dfff) is separate
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; mmu_CR_HIGH_SYSROM = %........ ; editor, charset (or i/o, see below), kernel
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mmu_CR_HIGH_INTFUNCROM = %...#....
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mmu_CR_HIGH_EXTFUNCROM = %..#.....
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mmu_CR_HIGH_RAM = %..##....
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mmu_CR_MID_MASK = %....##.. ; this controls the "middle area" (8000..bfff)
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; mmu_CR_MID_SYSROM = %........ ; this is the upper half of basic
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mmu_CR_MID_INTFUNCROM = %.....#..
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mmu_CR_MID_EXTFUNCROM = %....#...
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mmu_CR_MID_RAM = %....##..
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mmu_CR_LOW_MASK = %......#. ; this controls the "low area" (4000..7fff)
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; mmu_CR_LOW_SYSROM = %........ ; this is the lower half of basic
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mmu_CR_LOW_RAM = %......#.
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mmu_CR_IO_MASK = %.......# ; this controls i/o space (d000..dfff)
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; mmu_CR_IO_ON = %........
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mmu_CR_IO_OFF = %.......# ; if i/o is off, contents depend on "high area"
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; configuration register values used by C128 firmware (lookup table at $f7f0, see end of file):
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mmu_CR_BANK0 = $3f ; full 64 KiB ram bank 0
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mmu_CR_BANK1 = $7f ; full 64 KiB ram bank 1
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mmu_CR_BANK2 = $bf ; full 64 KiB ram bank 2
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mmu_CR_BANK3 = $ff ; full 64 KiB ram bank 3
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mmu_CR_BANK4 = $16 ; 32 KiB bank 0; 32 KiB IFROM with i/o overlay
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mmu_CR_BANK5 = $56 ; 32 KiB bank 1; 32 KiB IFROM with i/o overlay
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mmu_CR_BANK6 = $96 ; 32 KiB bank 2; 32 KiB IFROM with i/o overlay
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mmu_CR_BANK7 = $d6 ; 32 KiB bank 3; 32 KiB IFROM with i/o overlay
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mmu_CR_BANK8 = $2a ; 32 KiB bank 0; 32 KiB EFROM with i/o overlay
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mmu_CR_BANK9 = $6a ; 32 KiB bank 1; 32 KiB EFROM with i/o overlay
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mmu_CR_BANK10 = $aa ; 32 KiB bank 2; 32 KiB EFROM with i/o overlay
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mmu_CR_BANK11 = $ea ; 32 KiB bank 3; 32 KiB EFROM with i/o overlay
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mmu_CR_BANK12 = $06 ; 32 KiB bank 0; 16 KiB IFROM; 16 KiB kernel with i/o overlay
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mmu_CR_BANK13 = $0a ; 32 KiB bank 0; 16 KiB EFROM; 16 KiB kernel with i/o overlay
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mmu_CR_BANK14 = $01 ; 16 KiB bank 0; 32 KiB basic; 16 KiB kernel with font overlay
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mmu_CR_BANK15 = $00 ; 16 KiB bank 0; 32 KiB basic; 16 KiB kernel with i/o overlay
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; An unmodified C128 does not have a "ram bank 2" or "ram bank 3".
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; Whenever one of these is activated, ram banks 0 and 1 will be used instead.
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; IFROM means internal function ROM (socket U36)
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; EFROM means external function ROM (socket in a REU, for example)
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; mode configuration register
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mmu_mcr = $d505
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; contents:
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mmu_MCR_40COLUMNS = %#....... ; 40/80 key: 0 means pressed, 1 means released (writable! if cleared, will always read as 0!)
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mmu_MCR_C64MODE = %.#...... ; setting this bit makes the MMU disappear from the memory map :)
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mmu_MCR_EXROM = %..#..... ; if zero on boot, system will enter c64 mode (writable!)
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mmu_MCR_GAME = %...#.... ; if zero on boot, system will enter c64 mode (writable!)
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mmu_MCR_FSDIR_OUTPUT = %....#... ; direction of fast serial bus
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mmu_MCR_UNUSED = %.....##. ; always set
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mmu_MCR_8502MODE = %.......# ; setting this to zero switches to Z80 cpu
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; ram configuration register
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mmu_rcr = $d506
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mmu_p0l = $d507
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mmu_p0h = $d508
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mmu_p1l = $d509
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mmu_p1h = $d50a
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mmu_vr = $d50b
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; contents:
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mmu_RCR_VICBANK_MASK = %##...... ; this controls which RAM bank is "seen" by VIC
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; mmu_RCR_VICBANK_0 = %........
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mmu_RCR_VICBANK_1 = %.#......
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mmu_RCR_VICBANK_2 = %#....... ; on an unmodified c128, there is no ram bank 2 (0 will be used instead)
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mmu_RCR_VICBANK_3 = %##...... ; on an unmodified c128, there is no ram bank 3 (1 will be used instead)
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mmu_RCR_RAMBLOCK_MASK = %..##.... ; on an unmodified c128, these bits are irrelevant (they select 256 KiB of 1 MiB of memory)
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; mmu_RCR_RAMBLOCK_0 = %........
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mmu_RCR_RAMBLOCK_1 = %...#.... ; on an unmodified c128, there is only ram block 0
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mmu_RCR_RAMBLOCK_2 = %..#..... ; on an unmodified c128, there is only ram block 0
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mmu_RCR_RAMBLOCK_3 = %..##.... ; on an unmodified c128, there is only ram block 0
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mmu_RCR_SHARE_MASK = %....##..
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; mmu_RCR_SHARE_NONE = %........
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mmu_RCR_SHARE_BOTTOM = %.....#.. ; system default
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mmu_RCR_SHARE_TOP = %....#...
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mmu_RCR_SHARESIZE_MASK = %......##
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; mmu_RCR_SHARESIZE_1K = %........ ; system default
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mmu_RCR_SHARESIZE_4K = %.......#
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mmu_RCR_SHARESIZE_8K = %......#.
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mmu_RCR_SHARESIZE_16K = %......##
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; page pointers. writes to "high" register will be latched (reading gives old value) until "low" register is written to
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mmu_p0low = $d507 ; page 0 pointer low (a8..a15), default $00
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mmu_p0high = $d508 ; page 0 pointer high (a16..a19), default $00 (on an unmodified c128, only bit0 is meaningful)
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mmu_p1low = $d509 ; page 1 pointer low (a8..a15), default $01
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mmu_p1high = $d50a ; page 1 pointer high (a16..a19), default $00 (on an unmodified c128, only bit0 is meaningful)
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mmu_PxH_UNUSED = %####.... ; always set
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mmu_PxH_RAMBLOCK_MASK = %....##..
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; mmu_PxH_RAMBLOCK_0 = %........
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mmu_PxH_RAMBLOCK_1 = %.....#.. ; on an unmodified c128, there is only ram block 0
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mmu_PxH_RAMBLOCK_2 = %....#... ; on an unmodified c128, there is only ram block 0
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mmu_PxH_RAMBLOCK_3 = %....##.. ; on an unmodified c128, there is only ram block 0
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mmu_PxH_RAMBANK_MASK = %......##
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; mmu_PxH_RAMBANK_0 = %........
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mmu_PxH_RAMBANK_1 = %.......#
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mmu_PxH_RAMBANK_2 = %......#. ; on an unmodified c128, there is no ram bank 2 (0 will be used instead)
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mmu_PxH_RAMBANK_3 = %......## ; on an unmodified c128, there is no ram bank 3 (1 will be used instead)
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; version register
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mmu_vr = $d50b ; read-only, value is $20
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mmu_VR_BANKS_MASK = %####.... ; 2 ram banks
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mmu_VR_VERSION_MASK = %....#### ; mmu version 0
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; reading addresses up until $d5ff returns $ff
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; these registers are always available (in *every* memory configuration) unless C64 mode is entered:
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; configuration register
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mmu_cr = $ff00 ; always use this instead of $d500
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; load configuration registers:
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; a read access will return the value of the corresponding preconfiguration register
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; any write access will copy the value of the corresponding preconfiguration register to mmu_cr
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mmu_lcr_a = $ff01 ; c128 kernel default is $3f (BANK 0)
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mmu_lcr_b = $ff02 ; c128 kernel default is $7f (BANK 1)
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mmu_lcr_c = $ff03 ; c128 kernel default is $01 (BANK 14)
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mmu_lcr_d = $ff04 ; c128 kernel default is $41 (all system roms, with ram 1)
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; the c128 ROMs contain a look-up table to convert bank numbers to their
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; corresponding configuration register values:
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; romc_* needs "high rom area" enabled ($c000..$ffff)
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romc_bank_to_cr_table = $f7f0 ; 3f 7f bf ff 16 56 96 d6 2a 6a aa ea 06 0a 01 00
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@ -154,3 +154,12 @@ vdcr_enable_start = $22 ; column to enable display in
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vdcr_enable_end = $23 ; column to disable display in
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vdcr_dram_refresh = $24 ; RAM refresh rate
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vdcr_sync_polarity = $25 ; only in type 2 VDCs
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; the c128 ROMs contain look-up tables to convert vic color values to vdc color
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; values and vice-versa:
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; rom4_* needs "low rom area" enabled ($4000..$7fff)
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; rom8_* needs "middle rom area" enabled ($8000..$bfff)
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; romc_* needs "high rom area" enabled ($c000..$ffff)
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rom4_vic_to_vdc_color_table = $6a4c ; 00 0f 08 07 0b 04 02 0d 0a 0c 09 06 01 05 03 0e
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rom8_vdc_to_vic_color_table = $81f3 ; 00 0c 06 0e 05 0d 0b 03 02 0a 08 04 09 07 0f 01
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romc_vic_to_vdc_color_table = $ce5c ; 00 0f 08 07 0b 04 02 0d 0a 0c 09 06 01 05 03 0e
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@ -8,3 +8,10 @@ lib_cbm_c128_vic_a = 1
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; registers only present in the C128 variant of this chip:
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vic_keyboard = $d02f
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vic_clock = $d030
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; the c128 ROMs contain two copies of a look-up table to convert vic color
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; values to their corresponding petscii color codes:
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; rom4_* needs "low rom area" enabled ($4000..$7fff)
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; romc_* needs "high rom area" enabled ($c000..$ffff)
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rom4_vic_to_petscii_color_table = $76b5 ; 90 05 1c 9f 9c 1e 1f 9e 81 95 96 97 98 99 9a 9b
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romc_vic_to_petscii_color_table = $ce4c ; 90 05 1c 9f 9c 1e 1f 9e 81 95 96 97 98 99 9a 9b
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33
ACME_Lib/cbm/c64/georam.a
Normal file
33
ACME_Lib/cbm/c64/georam.a
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@ -0,0 +1,33 @@
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;ACME 0.94.4
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!ifdef lib_cbm_c64_georam_a !eof
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lib_cbm_c64_georam_a = 1
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; This file contains definitions for accessing the "GeoRAM" RAM expansion and
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; its clones (BBG, BBU, NeoRAM, ...)
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; These units allow access to a single page of memory (256 bytes) visible at
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; address $de00 in i/o space. Writing to registers allows to change which
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; memory page is visible at that location.
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; memory page
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georam_page = $de00
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; control registers (write-only, these registers can not be read)
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georam_track = $dffe ; 0..63, i.e. the lower six bits are significant
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georam_sector = $dfff ; 0..31, i.e. the lower five bits are significant
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; these are the official addresses - actually the registers are accessible
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; *everywhere* at $dfxx, but using these locations does not clash with the
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; registers of a Commodore REU.
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; Upgraded units and clones may have more memory, in those cases the registers
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; will have more significant bits.
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; I could have called the registers "row" and "column" instead of track and
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; sector, but the fact that this device was designed with one six-bit register
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; and one five-bit register (instead of one eight-bit register and one
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; three-bit register) tells me that this was meant as an easily programmable
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; RAM disk: A 1541 disk has 35 tracks with (at most) 21 sectors. Numbers in
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; these ranges can be written to the GeoRAM registers without the need to
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; shift bits around.
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; Knowing this is a handy way of remembering the number of significant bits of
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; GeoRAM registers.
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55
ACME_Lib/cbm/c64/reu.a
Normal file
55
ACME_Lib/cbm/c64/reu.a
Normal file
@ -0,0 +1,55 @@
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;ACME 0.94.4
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!ifdef lib_cbm_c64_reu_a !eof
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lib_cbm_c64_reu_a = 1
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; This file contains definitions for accessing a RAM Expansion Unit (REU) of
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; type 1700, 1764, 1750 and compatible. These units contain a chip called REC
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; (RAM Expansion Controller) capable of direct memory access (DMA).
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; Standard base address of control registers is $df00 in i/o space.
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; status register
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rec_status = $df00 ; reading will clear IRQ, END and ERROR bits
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rec_STATUS_IRQ = %#.......
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rec_STATUS_END = %.#......
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rec_STATUS_ERROR = %..#..... ; for verify command
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rec_STATUS_TYPE = %...#.... ; chip type (do not use to determine unit size!)
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rec_STATUS_VERSION = %....####
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; command register
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rec_command = $df01
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rec_COMMAND_EXECUTE = %#.......
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;reserved = %.#......
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rec_COMMAND_RELOAD = %..#.....
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rec_COMMAND_IMMEDIATELY = %...#.... ; do not wait for $ff00 write
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;reserved = %....##..
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rec_COMMAND_MODE_MASK = %......## ; bit mask for the four modes
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rec_COMMAND_MODE_STASH = %........ ; computer-to-REU
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rec_COMMAND_MODE_FETCH = %.......# ; REU-to-computer
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rec_COMMAND_MODE_SWAP = %......#. ; exchange
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rec_COMMAND_MODE_VERIFY = %......## ; compare
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rec_COMMAND_STASH = %#.#..... ; these wait for $ff00 before
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rec_COMMAND_FETCH = %#.#....# ; starting and then reload values.
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; internal address (computer RAM)
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rec_int_low = $df02
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rec_int_high = $df03
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; external address (expansion RAM)
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rec_ext_low = $df04
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rec_ext_high = $df05
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rec_ext_bank = $df06
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; A stock 1700 unit has two banks (128 KiB).
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; A stock 1764 unit has four banks (256 KiB).
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; A stock 1750 unit has eight banks (512 KiB).
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; Upgraded units and clones may have more, but the REC chip will always
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; "wrap around" after eight banks if crossing bank borders!
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; amount of bytes to process
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rec_amount_low = $df07
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rec_amount_high = $df08
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; when to request interrupts
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rec_irqctrl = $df09
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rec_IRQCTRL_ENABLE = %#.......
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rec_IRQCTRL_ON_END = %.#......
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rec_IRQCTRL_ON_ERROR = %..#..... ; for verify errors
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; address control (set to zero for normal operation)
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rec_addrctrl = $df0a
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rec_ADDRCTRL_FIX_INT = %#.......
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rec_ADDRCTRL_FIX_EXT = %.#......
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