marcobaye b03b217979 disabled all indexed addressing for m65's "quad" mode, except for LDQ. ... git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@287 4df02467-bbd4-4a76-a152-e7ce94205b78		2020-07-29 23:30:33 +00:00
..
all.txt	disabled all indexed addressing for m65's "quad" mode, except for LDQ.	2020-07-29 23:30:33 +00:00
cpu 65c02.txt	added 65c02 opcode table to docs	2019-03-18 21:26:38 +00:00
cpu 65ce02.txt	added 65ce02 and 4502 opcode tables to docs	2019-03-19 00:37:46 +00:00
cpu 4502.txt	added 65ce02 and 4502 opcode tables to docs	2019-03-19 00:37:46 +00:00
cpu 6502.txt	added 65816 opcode table to docs	2019-03-18 21:56:19 +00:00
cpu 65816.txt	docs only	2020-06-28 00:30:43 +00:00
cpu m65.txt	disabled all indexed addressing for m65's "quad" mode, except for LDQ.	2020-07-29 23:30:33 +00:00
cpu nmos6502.txt	nmos6502 mode now also accepts ALR mnemonic (alias for ASR)	2020-07-28 23:08:07 +00:00
cpu r65c02.txt	added r65c02 and w65c02 opcode tables to docs	2019-03-18 22:24:47 +00:00
cpu w65c02.txt	added r65c02 and w65c02 opcode tables to docs	2019-03-18 22:24:47 +00:00