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cc65/cfg/atarixl.cfg

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Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
FEATURES {
atarixl linker cfg file cleanups; set default load address to 400 for atarixl
2013-09-13 18:29:24 +00:00
STARTADDRESS: default = $2400;
Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
}
SYMBOLS {
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
__EXEHDR__: type = import;
__SYSTEM_CHECK__: type = import; # force inclusion of "system check" load chunk
__AUTOSTART__: type = import; # force inclusion of autostart "trailer"
__STACKSIZE__: type = weak, value = $0800; # 2k stack
__STARTADDRESS__: type = export, value = %S;
Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
}
MEMORY {
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
ZP: file = "", define = yes, start = $0082, size = $007E;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
# just $FFFF
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
HEADER: file = %O, start = $0000, size = $0002;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
# "system check" load chunk
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
SYSCHKHDR: file = %O, start = $0000, size = $0004;
SYSCHKCHNK: file = %O, start = $2E00, size = $0300;
SYSCHKTRL: file = %O, start = $0000, size = $0006;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
# "shadow RAM preparation" load chunk
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
SRPREPHDR: file = %O, start = $0000, size = $0004;
SRPREPCHNK: file = %O, define = yes, start = %S, size = $7C20 - %S - $07FF; # $07FF: space for temp. chargen buffer, 1K aligned
SRPREPTRL: file = %O, start = $0000, size = $0006;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
# "main program" load chunk
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
MAINHDR: file = %O, start = $0000, size = $0004;
MAIN: file = %O, define = yes, start = %S + __LOWBSS_SIZE__, size = $D000 - __STACKSIZE__ - %S - __LOWBSS_SIZE__;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
adjust size of SRPREP to account for 1K aligned character generator (not page aligned as I thought before)
2013-09-04 20:25:29 +00:00
# defines entry point into program
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
TRAILER: file = %O, start = $0000, size = $0006;
adjust size of SRPREP to account for 1K aligned character generator (not page aligned as I thought before)
2013-09-04 20:25:29 +00:00
Default atatixl.cfg file now leaves the character generator at $E000. This reduces the potential to flicker, but creates two separate memory areas in the high memory. For applications which require a large continuous memory space in high memory, atarixl-largehimem.cfg is provided. With high IRQ activity or DL interrupt there might be flicker.
2013-09-17 22:38:29 +00:00
# memory beneath the ROM preceeding the character generator
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
HIDDEN_RAM2: file = "", define = yes, start = $D800, size = $0800;
Default atatixl.cfg file now leaves the character generator at $E000. This reduces the potential to flicker, but creates two separate memory areas in the high memory. For applications which require a large continuous memory space in high memory, atarixl-largehimem.cfg is provided. With high IRQ activity or DL interrupt there might be flicker.
2013-09-17 22:38:29 +00:00
# address of relocated character generator (same addess as ROM version)
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
CHARGEN: file = "", define = yes, start = $E000, size = $0400;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
# memory beneath the ROM
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
HIDDEN_RAM: file = "", define = yes, start = $E400, size = $FFFA - $E400;
Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
}
SEGMENTS {
Renamed INITBSS to INIT and INIT to ONCE. The way we want to use the INITBSS segment - and especially the fact that it won't have the type bss on all ROM based targets - means that the name INITBSS is misleading. After all INIT is the best name from my perspective as it serves several purposes and therefore needs a rather generic name. Unfortunately this means that the current INIT segment needs to be renamed too. Looking for a short (ideally 4 letter) name I came up with ONCE as it contains all code (and data) accessed only once during initialization.
2016-03-06 20:26:22 +00:00
ZEROPAGE: load = ZP, type = zp;
EXTZP: load = ZP, type = zp, optional = yes;
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
EXEHDR: load = HEADER, type = ro;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
SYSCHKHDR: load = SYSCHKHDR, type = ro, optional = yes;
SYSCHK: load = SYSCHKCHNK, type = rw, define = yes, optional = yes;
SYSCHKTRL: load = SYSCHKTRL, type = ro, optional = yes;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
SRPREPHDR: load = SRPREPHDR, type = ro;
rename LOWDATA segment to LOWBSS
2013-10-16 16:15:17 +00:00
LOWBSS: load = SRPREPCHNK, type = bss, define = yes; # shared btw. SRPREPCHNK and RAM, not zero initialized
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
SRPREP: load = SRPREPCHNK, type = rw, define = yes;
Default atatixl.cfg file now leaves the character generator at $E000. This reduces the potential to flicker, but creates two separate memory areas in the high memory. For applications which require a large continuous memory space in high memory, atarixl-largehimem.cfg is provided. With high IRQ activity or DL interrupt there might be flicker.
2013-09-17 22:38:29 +00:00
SHADOW_RAM: load = SRPREPCHNK, run = HIDDEN_RAM, type = rw, define = yes, optional = yes;
SHADOW_RAM2: load = SRPREPCHNK, run = HIDDEN_RAM2, type = rw, define = yes, optional = yes;
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
SRPREPTRL: load = SRPREPTRL, type = ro;
Add two load chunks: - First chunk checks system (if it's XL and memory is ok). - Second chunk contains the contents for the shadow memory beneath the ROM and copies the contents to their destination address. It also moves the screen memory to low memory in front of the program.
2013-05-30 00:26:15 +00:00
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
MAINHDR: load = MAINHDR, type = ro;
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
STARTUP: load = MAIN, type = ro, define = yes;
Atari: fix interrupt handling if extended memory is banked in Extendend memory is mapped over the main memory in the 0x4000..0x7FFF area. Many DOSes disable interrupts while extended memory is banked in, but not all (e.g. SpartaDOS-X). This change modifies the initial interrupt handler to map in main memory before chaining to the "worker" handlers. Since the initial interrupt handler uses a data segment to store the trampoline to chain to the original handler, introduce a new "LOWBSS" segment to hold this trampoline. Otherwise the trampoline may end up inside the 0x4000..0x7FFF area. Add a link time warning if "LOWCODE" segment lays within the extended memory window.
2018-09-02 21:07:03 +00:00
LOWBSS: load = MAIN, type = rw, optional = yes; # not zero-initialized
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
LOWCODE: load = MAIN, type = ro, define = yes, optional = yes;
ONCE: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro, define = yes;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;
Fixed INIT properties. The main chunk load header references __BSS_LOAD__ so BSS must be the first bss type segment. Subsequent changes will move ONCE to share its address with the BSS. Then it'll be necessary to load INIT from disk. Therefore we do it right now.
2016-03-13 21:18:51 +00:00
INIT: load = MAIN, type = rw, optional = yes;
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
BSS: load = MAIN, type = bss, define = yes;
Some formatting and style fixes.
2013-10-01 09:32:08 +00:00
AUTOSTRT: load = TRAILER, type = ro;
Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
}
FEATURES {
CONDES: type = constructor,
label = __CONSTRUCTOR_TABLE__,
count = __CONSTRUCTOR_COUNT__,
Renamed INITBSS to INIT and INIT to ONCE. The way we want to use the INITBSS segment - and especially the fact that it won't have the type bss on all ROM based targets - means that the name INITBSS is misleading. After all INIT is the best name from my perspective as it serves several purposes and therefore needs a rather generic name. Unfortunately this means that the current INIT segment needs to be renamed too. Looking for a short (ideally 4 letter) name I came up with ONCE as it contains all code (and data) accessed only once during initialization.
2016-03-06 20:26:22 +00:00
segment = ONCE;
Introduced target 'atarixl'. The target 'atarixl' is to be used for Atari XL (and better) machines. It will disable the OS ROM and enable the Shadow RAM available on those machine. Note: This commit is only the inital step towards for this goal that just replicates the target 'atari' as a starting point!
2013-05-28 19:56:37 +00:00
CONDES: type = destructor,
label = __DESTRUCTOR_TABLE__,
count = __DESTRUCTOR_COUNT__,
segment = RODATA;
CONDES: type = interruptor,
label = __INTERRUPTOR_TABLE__,
count = __INTERRUPTOR_COUNT__,
segment = RODATA,
import = __CALLIRQ__;
}
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