2014-11-29 13:18:48 +00:00
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; Startup code for cc65 (PCEngine version)
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;
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; by Groepaz/Hitmen <groepaz@gmx.net>
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; based on code by Ullrich von Bassewitz <uz@cc65.org>
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;
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; This must be the *first* file on the linker command line
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;
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.export _exit
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2014-11-30 10:20:57 +00:00
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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2014-11-29 13:18:48 +00:00
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.import initlib, donelib
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.import push0, _main, zerobss
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.import initheap
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.import tmp1,tmp2,tmp3
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.import __RAM_START__, __RAM_SIZE__ ; Linker generated
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;; .import __SRAM_START__, __SRAM_SIZE__ ; Linker generated
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.import __ROM0_START__, __ROM0_SIZE__ ; Linker generated
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.import __ROM_START__, __ROM_SIZE__ ; Linker generated
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.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__ ; Linker generated
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.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__ ; Linker generated
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.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__ ; Linker generated
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.import __DATA_LOAD__,__DATA_RUN__, __DATA_SIZE__ ; Linker generated
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.import __BSS_SIZE__
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.include "pcengine.inc"
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.importzp sp
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.importzp ptr1,ptr2
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; ------------------------------------------------------------------------
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; Create an empty LOWCODE segment to avoid linker warnings
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.segment "LOWCODE"
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; ------------------------------------------------------------------------
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; Place the startup code in a special segment.
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.segment "STARTUP"
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start:
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; setup the CPU and System-IRQ
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2015-07-12 08:32:55 +00:00
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; Initialize CPU
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sei
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nop
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csh ; set high speed CPU mode
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nop
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cld
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nop
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; Setup stack and memory mapping
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ldx #$FF ; Stack top ($21FF)
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txs
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; at startup all MPRs are set to 0, so init them
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lda #$ff
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tam #1 ; 0000-1FFF = Hardware page
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lda #$F8
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tam #2 ; 2000-3FFF = Work RAM
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;lda #$F7
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;tam #2 ; 4000-5FFF = Save RAM
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;lda #1
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;tam #3 ; 6000-7FFF Page 2
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;lda #2
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;tam #4 ; 8000-9FFF Page 3
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;lda #3
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;tam #5 ; A000-BFFF Page 4
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;lda #4
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;tam #6 ; C000-DFFF Page 5
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;lda #0
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;tam #7 ; e000-fFFF hucard/syscard bank 0
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; Clear work RAM (2000-3FFF)
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stz <$00
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tii $2000, $2001, $1FFF
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; Initialize hardware
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stz TIMER_COUNT ; Timer off
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lda #$07
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sta IRQ_MASK ; Interrupts off
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stz IRQ_STATUS ; Acknowledge timer
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;; i dont know why the heck this one doesnt
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;; work when called from a constructor :/
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.import vdc_init
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jsr vdc_init
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2014-11-29 13:18:48 +00:00
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;; jsr joy_init
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2015-07-12 08:32:55 +00:00
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; Turn on background and VD interrupt/IRQ1
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lda #$05
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sta IRQ_MASK ; IRQ1=on
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cli
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2014-11-29 13:18:48 +00:00
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; Clear the BSS data
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jsr zerobss
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; Copy the .data segment to RAM
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lda #<(__DATA_LOAD__)
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;;lda #<(__ROM0_START__ + __STARTUP_SIZE__+ __CODE_SIZE__+ __RODATA_SIZE__)
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;;lda #<(__ROM_START__ + __CODE_SIZE__+ __RODATA_SIZE__)
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sta ptr1
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lda #>(__DATA_LOAD__)
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;;lda #>(__ROM_START__ + __CODE_SIZE__+ __RODATA_SIZE__)
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sta ptr1+1
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lda #<(__DATA_RUN__)
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;;lda #<(__SRAM_START__)
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sta ptr2
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lda #>(__DATA_RUN__)
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;;lda #>(__SRAM_START__)
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sta ptr2+1
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ldx #>(__DATA_SIZE__)
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@l2:
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beq @s1 ; no more full pages
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; copy one page
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ldy #0
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@l1:
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lda (ptr1),y
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sta (ptr2),y
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iny
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bne @l1
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inc ptr1+1
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inc ptr2+1
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dex
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bne @l2
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; copy remaining bytes
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@s1:
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; copy one page
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ldy #0
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@l3:
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lda (ptr1),y
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sta (ptr2),y
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iny
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cpy #<(__DATA_SIZE__)
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bne @l3
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; setup the stack
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; lda #<(__RAM_START__ + __DATA_SIZE__ + __BSS_SIZE__)
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lda #<(__RAM_START__+__RAM_SIZE__)
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sta sp
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; lda #>(__RAM_START__ + __DATA_SIZE__ + __BSS_SIZE__)
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lda #>(__RAM_START__+__RAM_SIZE__)
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sta sp+1 ; Set argument stack ptr
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; Init the Heap
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jsr initheap
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;jmp *
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; Call module constructors
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jsr initlib
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2015-07-12 08:32:55 +00:00
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.import initconio
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jsr initconio
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2014-11-29 13:18:48 +00:00
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; Pass an empty command line
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;jmp *
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jsr push0 ; argc
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jsr push0 ; argv
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go:
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ldy #4 ; Argument size
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jsr _main ; call the users code
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; Call module destructors. This is also the _exit entry.
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_exit:
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jsr donelib ; Run module destructors
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; reset the PCEngine
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jmp start
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; ------------------------------------------------------------------------
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; System V-Blank Interupt
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; ------------------------------------------------------------------------
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_irq1:
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2015-07-12 08:32:55 +00:00
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pha
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phx
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phy
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2014-11-29 13:18:48 +00:00
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2015-07-12 08:32:55 +00:00
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inc _tickcount
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bne @s
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inc _tickcount+1
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2014-11-29 13:18:48 +00:00
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@s:
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2015-07-12 08:32:55 +00:00
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; Acknowlege interrupt
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ldaio VDC_CTRL
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2014-11-29 13:18:48 +00:00
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2015-07-12 08:32:55 +00:00
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ply
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plx
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pla
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rti
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2014-11-29 13:18:48 +00:00
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_irq2:
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2015-07-12 08:32:55 +00:00
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rti
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2014-11-29 13:18:48 +00:00
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_nmi:
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2015-07-12 08:32:55 +00:00
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rti
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2014-11-29 13:18:48 +00:00
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_timer:
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2015-07-12 08:32:55 +00:00
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stz IRQ_STATUS
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rti
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2014-11-29 13:18:48 +00:00
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2015-07-12 08:32:55 +00:00
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.export initmainargs
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2014-11-29 13:18:48 +00:00
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initmainargs:
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2015-07-12 08:32:55 +00:00
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rts
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2014-11-29 13:18:48 +00:00
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; ------------------------------------------------------------------------
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; hardware vectors
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; ------------------------------------------------------------------------
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.segment "VECTORS"
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;;.org $fff6
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.word _irq2 ; $fff6 IRQ2 (External IRQ, BRK)
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.word _irq1 ; $fff8 IRQ1 (VDC)
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.word _timer ; $fffa Timer
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.word _nmi ; $fffc NMI
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.word start ; $fffe reset
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