2014-11-29 13:18:48 +00:00
|
|
|
;
|
2015-11-26 20:06:20 +00:00
|
|
|
; Start-up code for cc65 (PC-Engine version)
|
2014-11-29 13:18:48 +00:00
|
|
|
;
|
2015-10-02 14:50:22 +00:00
|
|
|
; by Groepaz/Hitmen <groepaz@gmx.net>,
|
2015-11-26 20:06:20 +00:00
|
|
|
; based on code by Ullrich von Bassewitz <uz@cc65.org>
|
2014-11-29 13:18:48 +00:00
|
|
|
;
|
2015-11-26 20:06:20 +00:00
|
|
|
; 2018-02-24, Greg King
|
2014-11-29 13:18:48 +00:00
|
|
|
;
|
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
.export _exit
|
2015-11-26 20:06:20 +00:00
|
|
|
.export __STARTUP__ : absolute = 1 ; Mark as start-up
|
2015-07-12 14:40:52 +00:00
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
.import initlib, donelib
|
2018-02-23 21:06:49 +00:00
|
|
|
.import push0, _main
|
2015-11-26 20:06:20 +00:00
|
|
|
.import IRQStub, __nmi
|
|
|
|
.importzp sp
|
2015-07-12 14:40:52 +00:00
|
|
|
|
2018-02-23 21:06:49 +00:00
|
|
|
; Linker-generated
|
|
|
|
.import __CARTSIZE__
|
|
|
|
.import __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
|
|
|
|
.import __BSS_RUN__, __BSS_SIZE__
|
|
|
|
.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
|
2015-07-12 14:40:52 +00:00
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
.include "pce.inc"
|
2015-09-19 13:37:39 +00:00
|
|
|
.include "extzp.inc"
|
2015-07-12 14:40:52 +00:00
|
|
|
|
2014-11-29 13:18:48 +00:00
|
|
|
; ------------------------------------------------------------------------
|
2015-11-26 20:06:20 +00:00
|
|
|
; Place the start-up code in a special segment.
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-10-02 14:50:22 +00:00
|
|
|
.segment "STARTUP"
|
2015-08-29 13:58:57 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Initialize the CPU.
|
2015-10-02 14:50:22 +00:00
|
|
|
start: sei
|
2015-08-29 13:58:57 +00:00
|
|
|
nop
|
2015-10-02 14:50:22 +00:00
|
|
|
csh ; Set high-speed CPU mode
|
2015-08-29 13:58:57 +00:00
|
|
|
nop
|
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Set up the stack and the memory mapping.
|
2015-08-29 13:58:57 +00:00
|
|
|
ldx #$FF ; Stack top ($21FF)
|
|
|
|
txs
|
|
|
|
|
2018-02-23 21:06:49 +00:00
|
|
|
; At power-on, most MPRs have random values; so, initiate them.
|
|
|
|
lda #$FF
|
|
|
|
tam #%00000001 ; $0000-$1FFF = Hardware bank
|
2015-08-29 13:58:57 +00:00
|
|
|
lda #$F8
|
2018-02-23 21:06:49 +00:00
|
|
|
tam #%00000010 ; $2000-$3FFF = Work RAM
|
2015-08-29 13:58:57 +00:00
|
|
|
;lda #$F7
|
2018-02-23 21:06:49 +00:00
|
|
|
;tam #%00000100 ; $4000-$47FF = 2K Battery-backed RAM
|
2015-08-29 13:58:57 +00:00
|
|
|
;lda #4
|
2018-02-23 21:06:49 +00:00
|
|
|
;tam #%00001000 ; $6000-$7FFF
|
|
|
|
|
|
|
|
lda #$01
|
|
|
|
ldx #>$8000
|
|
|
|
cpx #>__CARTSIZE__
|
|
|
|
bcc @L1 ;(blt)
|
|
|
|
tam #%00010000 ; $8000-$9FFF = ROM bank 1 (32K block of ROM)
|
|
|
|
inc a
|
|
|
|
tam #%00100000 ; $A000-$BFFF = ROM bank 2
|
|
|
|
inc a
|
|
|
|
@L1: tam #%01000000 ; $C000-$DFFF = ROM bank 3 (32K) or 1 (16K)
|
|
|
|
;lda #$00 ; (The reset default)
|
2015-10-02 14:50:22 +00:00
|
|
|
;tam #%10000000 ; $E000-$FFFF Hucard/Syscard bank 0
|
2015-08-29 13:58:57 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Initialize the hardware.
|
2015-09-19 13:37:39 +00:00
|
|
|
stz TIMER_CTRL ; Timer off
|
2015-11-26 20:06:20 +00:00
|
|
|
lda #%00000111
|
2015-08-29 13:58:57 +00:00
|
|
|
sta IRQ_MASK ; Interrupts off
|
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; FIXME; I don't know why the heck this one doesn't work when called from a constructor. -Groepaz :-/
|
|
|
|
.if 0 ; It now seems to work (at least, in Mednafen). -Greg King
|
2015-08-29 13:58:57 +00:00
|
|
|
.import vdc_init
|
|
|
|
jsr vdc_init
|
2015-11-26 20:06:20 +00:00
|
|
|
.endif
|
2015-08-29 13:58:57 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Allow interrupts from the VDC.
|
|
|
|
lda #%00000101
|
2015-11-17 14:14:15 +00:00
|
|
|
sta IRQ_MASK ; IRQ1 = on
|
2015-08-29 13:58:57 +00:00
|
|
|
|
|
|
|
; Copy the .data segment to RAM
|
2015-10-22 17:48:21 +00:00
|
|
|
tii __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2018-02-23 21:06:49 +00:00
|
|
|
; Clear the .bss segment
|
|
|
|
stz __BSS_RUN__
|
|
|
|
tii __BSS_RUN__, __BSS_RUN__ + 1, __BSS_SIZE__ - 1
|
|
|
|
|
2016-03-07 00:44:19 +00:00
|
|
|
; Set up the stack
|
2018-02-23 21:06:49 +00:00
|
|
|
lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
|
|
|
|
ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
|
2015-08-29 13:58:57 +00:00
|
|
|
sta sp
|
2015-11-17 14:14:15 +00:00
|
|
|
stx sp+1
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Call the module constructors.
|
2015-08-29 13:58:57 +00:00
|
|
|
jsr initlib
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
stz IRQ_STATUS ; Clear IRQs
|
|
|
|
cli ; Allow IRQ only after constructors have run
|
2015-07-16 14:54:40 +00:00
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
; Pass an empty command line
|
|
|
|
jsr push0 ; argc
|
|
|
|
jsr push0 ; argv
|
2015-07-12 08:32:55 +00:00
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
ldy #4 ; Argument size
|
2015-10-02 14:50:22 +00:00
|
|
|
jsr _main ; Call the user's code
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Call the module destructors. This is also the exit() entry.
|
|
|
|
_exit: jsr donelib
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-11-26 20:06:20 +00:00
|
|
|
; Reset the PCEngine (start over).
|
2015-08-29 13:58:57 +00:00
|
|
|
jmp start
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-08-29 13:58:57 +00:00
|
|
|
.export initmainargs
|
2014-11-29 13:18:48 +00:00
|
|
|
initmainargs:
|
2015-08-29 13:58:57 +00:00
|
|
|
rts
|
2014-11-29 13:18:48 +00:00
|
|
|
|
|
|
|
; ------------------------------------------------------------------------
|
|
|
|
; hardware vectors
|
|
|
|
; ------------------------------------------------------------------------
|
2015-10-02 14:50:22 +00:00
|
|
|
.segment "VECTORS"
|
2014-11-29 13:18:48 +00:00
|
|
|
|
2015-10-02 14:50:22 +00:00
|
|
|
.word IRQStub ; $FFF6 IRQ2 (External IRQ, BRK)
|
|
|
|
.word IRQStub ; $FFF8 IRQ1 (VDC)
|
|
|
|
.word IRQStub ; $FFFA Timer
|
2015-11-26 20:06:20 +00:00
|
|
|
.word __nmi ; $FFFC NMI
|
2015-10-02 14:50:22 +00:00
|
|
|
.word start ; $FFFE reset
|