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Fix for multiplication optimization issue #367
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@ -6,7 +6,7 @@
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/* */
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/* */
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/* */
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/* (C) 2001-2013, Ullrich von Bassewitz */
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/* (C) 2001-2019, Ullrich von Bassewitz */
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/* Roemerstrasse 52 */
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/* D-70794 Filderstadt */
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/* EMail: uz@cc65.org */
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@ -122,7 +122,7 @@ struct StackOpData {
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const OptFuncDesc* OptFunc;
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/* ZP register usage inside the sequence */
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unsigned UsedRegs;
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unsigned ZPUsage;
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/* Register load information for lhs and rhs */
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LoadInfo Lhs;
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@ -1771,7 +1771,7 @@ static void ResetStackOpData (StackOpData* Data)
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/* Reset the given data structure */
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{
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Data->OptFunc = 0;
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Data->UsedRegs = REG_NONE;
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Data->ZPUsage = REG_NONE;
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ClearLoadInfo (&Data->Lhs);
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ClearLoadInfo (&Data->Rhs);
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@ -1832,14 +1832,16 @@ static int PreCondOk (StackOpData* D)
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return 0;
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}
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/* Determine the zero page locations to use */
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if ((D->UsedRegs & REG_PTR1) == REG_NONE) {
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/* Determine the zero page locations to use. We've tracked the used
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* ZP locations, so try to find some for us that are unused.
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*/
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if ((D->ZPUsage & REG_PTR1) == REG_NONE) {
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D->ZPLo = "ptr1";
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D->ZPHi = "ptr1+1";
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} else if ((D->UsedRegs & REG_SREG) == REG_NONE) {
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} else if ((D->ZPUsage & REG_SREG) == REG_NONE) {
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D->ZPLo = "sreg";
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D->ZPHi = "sreg+1";
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} else if ((D->UsedRegs & REG_PTR2) == REG_NONE) {
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} else if ((D->ZPUsage & REG_PTR2) == REG_NONE) {
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D->ZPLo = "ptr2";
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D->ZPHi = "ptr2+1";
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} else {
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@ -1959,7 +1961,7 @@ unsigned OptStackOps (CodeSeg* S)
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break;
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} else {
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/* Track register usage */
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Data.UsedRegs |= (E->Use | E->Chg);
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Data.ZPUsage |= (E->Use | E->Chg);
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TrackLoads (&Data.Rhs, E, I);
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}
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@ -1991,7 +1993,7 @@ unsigned OptStackOps (CodeSeg* S)
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} else {
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/* Other stuff: Track register usage */
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Data.UsedRegs |= (E->Use | E->Chg);
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Data.ZPUsage |= (E->Use | E->Chg);
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TrackLoads (&Data.Rhs, E, I);
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}
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/* If the registers from the push (A/X) are used before they're
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@ -2009,21 +2011,32 @@ unsigned OptStackOps (CodeSeg* S)
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case FoundOp:
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/* Track zero page location usage beyond this point */
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Data.UsedRegs |= GetRegInfo (S, I, REG_SREG | REG_PTR1 | REG_PTR2);
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Data.ZPUsage |= GetRegInfo (S, I, REG_SREG | REG_PTR1 | REG_PTR2);
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/* Finalize the load info */
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FinalizeLoadInfo (&Data.Lhs, S);
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FinalizeLoadInfo (&Data.Rhs, S);
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/* If the Lhs loads do load from zeropage, we have to include
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** them into UsedRegs registers used. The Rhs loads have already
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** been tracked.
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/* Check if the lhs loads from zeropage. If this is true, these
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* zero page locations have to be added to ZPUsage, because
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* they cannot be used for intermediate storage. In addition,
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* if one of these zero page locations is destroyed between
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* pushing the lhs and the actual operation, we cannot use the
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* original zero page locations for the final op, but must
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* use another ZP location to save them.
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*/
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ChangedRegs &= REG_ZP;
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if (Data.Lhs.A.LoadEntry && Data.Lhs.A.LoadEntry->AM == AM65_ZP) {
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Data.UsedRegs |= Data.Lhs.A.LoadEntry->Use;
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Data.ZPUsage |= Data.Lhs.A.LoadEntry->Use;
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if ((Data.Lhs.A.LoadEntry->Use & ChangedRegs) != 0) {
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Data.Lhs.A.Flags &= ~(LI_DIRECT | LI_RELOAD_Y);
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}
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}
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if (Data.Lhs.X.LoadEntry && Data.Lhs.X.LoadEntry->AM == AM65_ZP) {
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Data.UsedRegs |= Data.Lhs.X.LoadEntry->Use;
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Data.ZPUsage |= Data.Lhs.X.LoadEntry->Use;
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if ((Data.Lhs.X.LoadEntry->Use & ChangedRegs) != 0) {
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Data.Lhs.X.Flags &= ~(LI_DIRECT | LI_RELOAD_Y);
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}
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}
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/* Check the preconditions. If they aren't ok, reset the insn
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12
test/val/bug367.c
Normal file
12
test/val/bug367.c
Normal file
@ -0,0 +1,12 @@
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#include "unittest.h"
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TEST
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{
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unsigned int y=192;
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unsigned int d=y&0xFFF8;
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unsigned int e=d*32+d*8;
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unsigned int f=d*40;
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ASSERT_AreEqual(f, e, "%u", "Multiplication results differ (should be 7680)!");
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}
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ENDTEST
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