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Fixed an error: When guessing the address size of an expression used in an

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instruction that contains undefined symbols, and the effective address allows
just one address size, use this size instead of the default data segment size.


git-svn-id: svn://svn.cc65.org/cc65/trunk@5658 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
uz
2012-05-25 16:28:46 +00:00
parent 7d62062bd2
commit 47c87eb335
3 changed files with 38 additions and 15 deletions
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4
src/ca65/ea65.c
View File

@@ -90,7 +90,7 @@ void GetEA (EffAddr* A)
/* #val */ /* #val */
NextTok (); NextTok ();
A->Expr = Expression (); A->Expr = Expression ();
A->AddrModeSet = AM65_IMM; A->AddrModeSet = AM65_ALL_IMM;
} else if (CurTok.Tok == TOK_A) { } else if (CurTok.Tok == TOK_A) {
@@ -203,4 +203,4 @@ void GetEA (EffAddr* A)

34
src/ca65/instr.c
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@@ -945,17 +945,29 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A)
A->Expr = SimplifyExpr (A->Expr, &ED); A->Expr = SimplifyExpr (A->Expr, &ED);
if (ED.AddrSize == ADDR_SIZE_DEFAULT) { if (ED.AddrSize == ADDR_SIZE_DEFAULT) {
/* If we don't know how big the expression is, assume the /* We don't know how big the expression is. If the instruction
* default address size for data. If this default address * allows just one addressing mode, assume this as address size
* size is unequal to zero page addressing, but zero page * for the expression. Otherwise assume the default address size
* addressing is allowed by the instruction, mark all symbols * for data.
* in the expression tree. This mark will be checked at end
* of assembly, and a warning is issued, if a zero page symbol
* was guessed wrong here.
*/ */
ED.AddrSize = DataAddrSize; if ((A->AddrModeSet & ~AM65_ALL_ZP) == 0) {
if (ED.AddrSize > ADDR_SIZE_ZP && (A->AddrModeSet & AM65_SET_ZP)) { ED.AddrSize = ADDR_SIZE_ZP;
ExprGuessedAddrSize (A->Expr, ADDR_SIZE_ZP); } else if ((A->AddrModeSet & ~AM65_ALL_ABS) == 0) {
ED.AddrSize = ADDR_SIZE_ABS;
} else if ((A->AddrModeSet & ~AM65_ALL_FAR) == 0) {
ED.AddrSize = ADDR_SIZE_FAR;
} else {
ED.AddrSize = DataAddrSize;
/* If the default address size of the data segment is unequal
* to zero page addressing, but zero page addressing is
* allowed by the instruction, mark all symbols in the
* expression tree. This mark will be checked at end of
* assembly, and a warning is issued, if a zero page symbol
* was guessed wrong here.
*/
if (ED.AddrSize > ADDR_SIZE_ZP && (A->AddrModeSet & AM65_SET_ZP)) {
ExprGuessedAddrSize (A->Expr, ADDR_SIZE_ZP);
}
} }
} }
@@ -989,7 +1001,7 @@ static int EvalEA (const InsDesc* Ins, EffAddr* A)
* emit a warning. This warning protects against a typo, where the '#' * emit a warning. This warning protects against a typo, where the '#'
* for the immediate operand is omitted. * for the immediate operand is omitted.
*/ */
if (A->Expr && (Ins->AddrMode & AM65_IMM) && if (A->Expr && (Ins->AddrMode & AM65_ALL_IMM) &&
(A->AddrModeSet & (AM65_DIR | AM65_ABS | AM65_ABS_LONG)) && (A->AddrModeSet & (AM65_DIR | AM65_ABS | AM65_ABS_LONG)) &&
ExtBytes[A->AddrMode] == 1) { ExtBytes[A->AddrMode] == 1) {

15
src/ca65/instr.h
View File

@@ -82,7 +82,6 @@
#define AM65_IMM_ACCU 0x00200000UL #define AM65_IMM_ACCU 0x00200000UL
#define AM65_IMM_INDEX 0x00400000UL #define AM65_IMM_INDEX 0x00400000UL
#define AM65_IMM_IMPLICIT 0x00800000UL #define AM65_IMM_IMPLICIT 0x00800000UL
#define AM65_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT)
#define AM65_BLOCKMOVE 0x01000000UL #define AM65_BLOCKMOVE 0x01000000UL
#define AM65_BLOCKXFER 0x02000000UL #define AM65_BLOCKXFER 0x02000000UL
@@ -90,7 +89,19 @@
#define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND) #define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
/* Bitmask for all ABS operations that have correspondent FAR ops */ /* Bitmask for all ABS operations that have correspondent FAR ops */
#define AM65_SET_ABS (AM65_ABS | AM65_ABS_X) #define AM65_SET_ABS (AM65_ABS | AM65_ABS_X)
/* Bitmask for all ZP operations */
#define AM65_ALL_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND)
/* Bitmask for all ABS operations */
#define AM65_ALL_ABS (AM65_ABS | AM65_ABS_X | AM65_ABS_Y | AM65_ABS_IND | AM65_ABS_X_IND)
/* Bitmask for all FAR operations */
#define AM65_ALL_FAR (AM65_ABS_LONG | AM65_ABS_LONG_X)
/* Bitmask for all immediate operations */
#define AM65_ALL_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT)
/* Bit numbers and count */ /* Bit numbers and count */
#define AM65I_IMM_ACCU 21 #define AM65I_IMM_ACCU 21