From ba038e921fcd7c224ea144d68af6043afafde537 Mon Sep 17 00:00:00 2001
From: bbbradsmith <bbbradsmith@users.noreply.github.com>
Date: Tue, 21 Feb 2023 17:06:21 -0500
Subject: [PATCH 1/5] jmp (abs) page wrapping should be an error, not a
warning, also only applies to 6502 CPU
---
src/ca65/instr.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/ca65/instr.c b/src/ca65/instr.c
index d0d7ce64c..503304b5b 100644
--- a/src/ca65/instr.c
+++ b/src/ca65/instr.c
@@ -1605,11 +1605,12 @@ static void PutJMP (const InsDesc* Ins)
if (EvalEA (Ins, &A)) {
/* Check for indirect addressing */
- if (A.AddrModeBit & AM65_ABS_IND) {
+ if (A.AddrModeBit & AM65_ABS_IND && CPU < CPU_65SC02) {
/* Compare the low byte of the expression to 0xFF to check for
** a page cross. Be sure to use a copy of the expression otherwise
- ** things will go weird later.
+ ** things will go weird later. This only affects the 6502 CPU,
+ ** and was corrected in 65C02 and later CPUs in this family.
*/
ExprNode* E = GenNE (GenByteExpr (CloneExpr (A.Expr)), 0xFF);
@@ -1617,7 +1618,7 @@ static void PutJMP (const InsDesc* Ins)
unsigned Msg = GetStringId ("\"jmp (abs)\" across page border");
/* Generate the assertion */
- AddAssertion (E, ASSERT_ACT_WARN, Msg);
+ AddAssertion (E, ASSERT_ACT_ERROR, Msg);
}
/* No error, output code */
From 07f08fc547b7e0f5b37aef23dd482a3d5f483352 Mon Sep 17 00:00:00 2001
From: bbbradsmith <bbbradsmith@users.noreply.github.com>
Date: Sat, 19 Aug 2023 14:36:30 -0400
Subject: [PATCH 2/5] tests verifying jmp (indirect) page crossing error on
6502, and the lack of error for other CPU types
---
test/asm/err/jmp-indirect-6502-error.s | 4 ++++
test/asm/val/jmp-indirect-success.s | 18 ++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 test/asm/err/jmp-indirect-6502-error.s
create mode 100644 test/asm/val/jmp-indirect-success.s
diff --git a/test/asm/err/jmp-indirect-6502-error.s b/test/asm/err/jmp-indirect-6502-error.s
new file mode 100644
index 000000000..aadc37b30
--- /dev/null
+++ b/test/asm/err/jmp-indirect-6502-error.s
@@ -0,0 +1,4 @@
+; test that jmp (indirect) on a page boundary will give an error for 6502 CPU
+
+.p02
+jmp ($10FF)
diff --git a/test/asm/val/jmp-indirect-success.s b/test/asm/val/jmp-indirect-success.s
new file mode 100644
index 000000000..0cdc8c32c
--- /dev/null
+++ b/test/asm/val/jmp-indirect-success.s
@@ -0,0 +1,18 @@
+; test that jmp (indirect) on a page boundary will not give an error for non-6502 CPUs
+
+.pc02
+jmp ($10FF)
+
+.psc02
+jmp ($10FF)
+
+.p816
+jmp ($10FF)
+
+; main always returns success (the tested issue is only whether the assembly errors)
+.import _exit
+.export _main
+_main:
+ lda #0
+ tax
+ jmp _exit
From f31d8efc1e8a921b098142ec4d501753e59cc4d2 Mon Sep 17 00:00:00 2001
From: bbbradsmith <bbbradsmith@users.noreply.github.com>
Date: Sat, 19 Aug 2023 15:07:32 -0400
Subject: [PATCH 3/5] tabs are forbidden
---
test/asm/val/jmp-indirect-success.s | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/test/asm/val/jmp-indirect-success.s b/test/asm/val/jmp-indirect-success.s
index 0cdc8c32c..592666576 100644
--- a/test/asm/val/jmp-indirect-success.s
+++ b/test/asm/val/jmp-indirect-success.s
@@ -13,6 +13,6 @@ jmp ($10FF)
.import _exit
.export _main
_main:
- lda #0
- tax
- jmp _exit
+ lda #0
+ tax
+ jmp _exit
From 28ffe2f59bfc988ea7f3b7f0ed8adf3d3ec8b43e Mon Sep 17 00:00:00 2001
From: bbbradsmith <bbbradsmith@users.noreply.github.com>
Date: Sat, 19 Aug 2023 15:39:51 -0400
Subject: [PATCH 4/5] add jmp page crossing to --relax-checks, document it, fix
--relax-checks documentation (segment branch error is not suppressed)
---
doc/ca65.sgml | 13 ++++++++-----
src/ca65/instr.c | 2 +-
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/doc/ca65.sgml b/doc/ca65.sgml
index b4ef3e188..29e04a29e 100644
--- a/doc/ca65.sgml
+++ b/doc/ca65.sgml
@@ -120,7 +120,7 @@ Long options:
--list-bytes n Maximum number of bytes per listing line
--memory-model model Set the memory model
--pagelength n Set the page length for the listing
- --relax-checks Relax some checks (see docs)
+ --relax-checks Disables some error checks (see <ref id="option--relax-checks" name="below">)
--smart Enable smart mode
--target sys Set the target system
--verbose Increase verbosity
@@ -265,14 +265,17 @@ Here is a description of all the command line options:
<label id="option--relax-checks">
<tag><tt>--relax-checks</tt></tag>
- Relax some checks done by the assembler. This will allow code that is an
+ Disables some error checks done by the assembler. This will allow code that is an
error in most cases and flagged as such by the assembler, but can be valid
in special situations.
- Examples are:
+ Disabled checks are:
<itemize>
-<item>Short branches between two different segments.
-<item>Byte sized address loads where the address is not a zeropage address.
+<item>Address vs. fragment size: a byte sized load from an non-zeropage
+ address is truncated instead of producing an error.
+<item>Indirect jump on page boundary: <tt>jmp (label)</tt> on a label that
+ resides on a page boundary (<tt>$xxFF</tt>) fetches the second byte from the
+ wrong address on 6502 CPUs, now allowed instead of producing an error.
</itemize>
diff --git a/src/ca65/instr.c b/src/ca65/instr.c
index 0afa281b4..da6bd6e44 100644
--- a/src/ca65/instr.c
+++ b/src/ca65/instr.c
@@ -1618,7 +1618,7 @@ static void PutJMP (const InsDesc* Ins)
if (EvalEA (Ins, &A)) {
/* Check for indirect addressing */
- if ((A.AddrModeBit & AM65_ABS_IND) && (CPU < CPU_65SC02)) {
+ if ((A.AddrModeBit & AM65_ABS_IND) && (CPU < CPU_65SC02) && (RelaxChecks == 0)) {
/* Compare the low byte of the expression to 0xFF to check for
** a page cross. Be sure to use a copy of the expression otherwise
From 97e59b0756eead4faa5a75185928c3c9e6cdd0fe Mon Sep 17 00:00:00 2001
From: bbbradsmith <bbbradsmith@users.noreply.github.com>
Date: Sat, 19 Aug 2023 15:50:22 -0400
Subject: [PATCH 5/5] ref link doesn't work within the usage verb
---
doc/ca65.sgml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/ca65.sgml b/doc/ca65.sgml
index 29e04a29e..dc727eb49 100644
--- a/doc/ca65.sgml
+++ b/doc/ca65.sgml
@@ -120,7 +120,7 @@ Long options:
--list-bytes n Maximum number of bytes per listing line
--memory-model model Set the memory model
--pagelength n Set the page length for the listing
- --relax-checks Disables some error checks (see <ref id="option--relax-checks" name="below">)
+ --relax-checks Disables some error checks
--smart Enable smart mode
--target sys Set the target system
--verbose Increase verbosity