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Merge pull request #283 from polluks/sp65
Fixed CPU definition of Lynx.
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commit
62c2177599
@ -4,7 +4,7 @@
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;
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;
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; Reference:
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; Reference:
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; Bastian Schick's Lynx Documentation
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; Bastian Schick's Lynx Documentation
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; http://www.geocities.com/SiliconValley/Byte/4242/lynx/
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; http://www.geocities.ws/SiliconValley/Byte/4242/lynx/
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;
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;
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; ***
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; ***
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@ -1,8 +1,7 @@
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; supervision symbols
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; supervision symbols
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; supervision 65c02s
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; supervision 65c02s
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; in cc65 up to 2.9.1 65c02 means 65c02s
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; in cc65 up to 2.9.1 65c02 means 65sc02
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.pc02
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lcd_addr = $4000
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lcd_addr = $4000
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LCD_LINESIZE = $30
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LCD_LINESIZE = $30
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@ -139,7 +139,7 @@ struct TargetEntry {
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};
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};
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/* Table that maps target names to ids. Sorted alphabetically for bsearch.
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/* Table that maps target names to ids. Sorted alphabetically for bsearch.
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** Allows mupltiple entries for one target id (target name aliases).
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** Allows multiple entries for one target id (target name aliases).
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*/
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*/
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static const TargetEntry TargetMap[] = {
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static const TargetEntry TargetMap[] = {
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{ "apple2", TGT_APPLE2 },
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{ "apple2", TGT_APPLE2 },
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@ -170,7 +170,6 @@ static const TargetEntry TargetMap[] = {
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{ "sim6502", TGT_SIM6502 },
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{ "sim6502", TGT_SIM6502 },
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{ "sim65c02", TGT_SIM65C02 },
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{ "sim65c02", TGT_SIM65C02 },
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{ "supervision", TGT_SUPERVISION },
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{ "supervision", TGT_SUPERVISION },
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{ "vc20", TGT_VIC20 },
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{ "vic20", TGT_VIC20 },
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{ "vic20", TGT_VIC20 },
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};
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};
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#define MAP_ENTRY_COUNT (sizeof (TargetMap) / sizeof (TargetMap[0]))
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#define MAP_ENTRY_COUNT (sizeof (TargetMap) / sizeof (TargetMap[0]))
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@ -201,7 +200,7 @@ static const TargetProperties PropertyTable[TGT_COUNT] = {
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{ "atmos", CPU_6502, BINFMT_BINARY, CTNone },
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{ "atmos", CPU_6502, BINFMT_BINARY, CTNone },
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{ "nes", CPU_6502, BINFMT_BINARY, CTNone },
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{ "nes", CPU_6502, BINFMT_BINARY, CTNone },
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{ "supervision", CPU_65SC02, BINFMT_BINARY, CTNone },
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{ "supervision", CPU_65SC02, BINFMT_BINARY, CTNone },
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{ "lynx", CPU_65C02, BINFMT_BINARY, CTNone },
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{ "lynx", CPU_65SC02, BINFMT_BINARY, CTNone },
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{ "sim6502", CPU_6502, BINFMT_BINARY, CTNone },
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{ "sim6502", CPU_6502, BINFMT_BINARY, CTNone },
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{ "sim65c02", CPU_65C02, BINFMT_BINARY, CTNone },
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{ "sim65c02", CPU_65C02, BINFMT_BINARY, CTNone },
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{ "pce", CPU_HUC6280, BINFMT_BINARY, CTNone },
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{ "pce", CPU_HUC6280, BINFMT_BINARY, CTNone },
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