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Add 65C02 specific optimization: Use TSB/TRB
git-svn-id: svn://svn.cc65.org/cc65/trunk@1185 b7a2c559-68d2-44c3-8de9-860c34a00d81
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@ -1352,6 +1352,7 @@ struct OptFunc {
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#define OptFuncEntry(func) static OptFuncDesc D##func = { func, #func, 0 }
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#define OptFuncEntry(func) static OptFuncDesc D##func = { func, #func, 0 }
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/* A list of all the function descriptions */
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/* A list of all the function descriptions */
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static OptFunc DOpt65C02BitOps = { Opt65C02BitOps, "Opt65C02BitOps", 66, 0, 0, 0, 0, 0 };
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static OptFunc DOpt65C02Ind = { Opt65C02Ind, "Opt65C02Ind", 100, 0, 0, 0, 0, 0 };
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static OptFunc DOpt65C02Ind = { Opt65C02Ind, "Opt65C02Ind", 100, 0, 0, 0, 0, 0 };
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static OptFunc DOptAdd1 = { OptAdd1, "OptAdd1", 60, 0, 0, 0, 0, 0 };
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static OptFunc DOptAdd1 = { OptAdd1, "OptAdd1", 60, 0, 0, 0, 0, 0 };
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static OptFunc DOptAdd2 = { OptAdd2, "OptAdd2", 200, 0, 0, 0, 0, 0 };
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static OptFunc DOptAdd2 = { OptAdd2, "OptAdd2", 200, 0, 0, 0, 0, 0 };
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@ -1406,6 +1407,7 @@ static OptFunc DOptUnusedStores = { OptUnusedStores, "OptUnusedStores", 0, 0,
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/* Table containing all the steps in alphabetical order */
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/* Table containing all the steps in alphabetical order */
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static OptFunc* OptFuncs[] = {
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static OptFunc* OptFuncs[] = {
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&DOpt65C02BitOps,
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&DOpt65C02Ind,
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&DOpt65C02Ind,
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&DOptAdd1,
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&DOptAdd1,
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&DOptAdd2,
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&DOptAdd2,
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@ -1776,13 +1778,15 @@ static unsigned RunOptGroup3 (CodeSeg* S)
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static unsigned RunOptGroup4 (CodeSeg* S)
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static unsigned RunOptGroup4 (CodeSeg* S)
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/* 65C02 specific optimizations. */
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/* 65C02 specific optimizations. */
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{
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{
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unsigned C;
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unsigned Changes = 0;
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unsigned Changes = 0;
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if (CPU >= CPU_65C02) {
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if (CPU >= CPU_65C02) {
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Changes += RunOptFunc (S, &DOpt65C02BitOps, 1);
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/* Replace (zp),y by (zp) if Y is zero. If we have changes, run register
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/* Replace (zp),y by (zp) if Y is zero. If we have changes, run register
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* load optimization again, since loads of Y may have become unnecessary.
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* load optimization again, since loads of Y may have become unnecessary.
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*/
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*/
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unsigned C = RunOptFunc (S, &DOpt65C02Ind, 1);
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C = RunOptFunc (S, &DOpt65C02Ind, 1);
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Changes += C;
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Changes += C;
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if (C) {
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if (C) {
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Changes += RunOptFunc (S, &DOptUnusedLoads, 1);
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Changes += RunOptFunc (S, &DOptUnusedLoads, 1);
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@ -6,7 +6,7 @@
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/* */
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/* */
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/* */
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/* */
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/* */
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/* */
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/* (C) 2001 Ullrich von Bassewitz */
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/* (C) 2001-2002 Ullrich von Bassewitz */
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/* Wacholderweg 14 */
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/* Wacholderweg 14 */
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/* D-70597 Stuttgart */
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/* D-70597 Stuttgart */
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/* EMail: uz@cc65.org */
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/* EMail: uz@cc65.org */
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@ -107,4 +107,81 @@ unsigned Opt65C02Ind (CodeSeg* S)
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unsigned Opt65C02BitOps (CodeSeg* S)
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/* Use special bit op instructions of the C02 */
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{
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unsigned Changes = 0;
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unsigned I;
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/* Generate register info for this step */
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CS_GenRegInfo (S);
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/* Walk over the entries */
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I = 0;
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while (I < CS_GetEntryCount (S)) {
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CodeEntry* L[3];
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/* Get next entry */
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L[0] = CS_GetEntry (S, I);
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/* Check for the sequence */
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if (L[0]->OPC == OP65_LDA &&
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(L[0]->AM == AM65_ZP || L[0]->AM == AM65_ABS) &&
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!CS_RangeHasLabel (S, I+1, 2) &&
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CS_GetEntries (S, L+1, I+1, 2) &&
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(L[1]->OPC == OP65_AND || L[1]->OPC == OP65_ORA) &&
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CE_KnownImm (L[1]) &&
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L[2]->OPC == OP65_STA &&
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L[2]->AM == L[0]->AM &&
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strcmp (L[2]->Arg, L[0]->Arg) == 0 &&
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!RegAUsed (S, I+3)) {
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char Buf[32];
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CodeEntry* X;
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/* Use TRB for AND and TSB for ORA */
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if (L[1]->OPC == OP65_AND) {
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/* LDA #XX */
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sprintf (Buf, "$%02X", (int) ((~L[1]->Num) & 0xFF));
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X = NewCodeEntry (OP65_LDA, AM65_IMM, Buf, 0, L[1]->LI);
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CS_InsertEntry (S, X, I);
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/* TRB */
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X = NewCodeEntry (OP65_TRB, L[0]->AM, L[0]->Arg, 0, L[0]->LI);
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CS_InsertEntry (S, X, I+1);
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} else {
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/* LDA #XX */
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sprintf (Buf, "$%02X", (int) L[1]->Num);
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X = NewCodeEntry (OP65_LDA, AM65_IMM, Buf, 0, L[1]->LI);
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CS_InsertEntry (S, X, I);
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/* TRB */
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X = NewCodeEntry (OP65_TSB, L[0]->AM, L[0]->Arg, 0, L[0]->LI);
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CS_InsertEntry (S, X, I+1);
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}
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/* Delete the old stuff */
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CS_DelEntries (S, I+2, 3);
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/* We had changes */
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++Changes;
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}
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/* Next entry */
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++I;
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}
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/* Free register info */
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CS_FreeRegInfo (S);
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/* Return the number of changes made */
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return Changes;
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}
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@ -6,7 +6,7 @@
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/* */
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/* */
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/* */
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/* */
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/* */
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/* */
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/* (C) 2001 Ullrich von Bassewitz */
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/* (C) 2001-2002 Ullrich von Bassewitz */
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/* Wacholderweg 14 */
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/* Wacholderweg 14 */
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/* D-70597 Stuttgart */
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/* D-70597 Stuttgart */
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/* EMail: uz@cc65.org */
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/* EMail: uz@cc65.org */
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@ -52,6 +52,9 @@
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unsigned Opt65C02Ind (CodeSeg* S);
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unsigned Opt65C02Ind (CodeSeg* S);
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/* Try to use the indirect addressing mode where possible */
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/* Try to use the indirect addressing mode where possible */
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unsigned Opt65C02BitOps (CodeSeg* S);
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/* Use special bit op instructions of the C02 */
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/* End of coptc02.h */
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/* End of coptc02.h */
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