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migrated opcodes tests for assembler from testcode to test for inclusion on automated testing

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This commit is contained in:
Sven Oliver Moll 2016-09-03 16:45:59 +02:00
parent 48f64de720
commit 89e2bf89cb
22 changed files with 1583 additions and 615 deletions
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2
test/Makefile
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@ -40,12 +40,14 @@ $(WORKDIR)/bdiff$(EXE): bdiff.c | $(WORKDIR)
dotests: mostlyclean continue
continue: $(WORKDIR)/bdiff$(EXE)
@$(MAKE) -C assembler all
@$(MAKE) -C val all
@$(MAKE) -C ref all
@$(MAKE) -C err all
@$(MAKE) -C misc all
mostlyclean:
@$(MAKE) -C assembler clean
@$(MAKE) -C val clean
@$(MAKE) -C ref clean
@$(MAKE) -C err clean

2
testcode/assembler/.gitignore → test/assembler/.gitignore vendored
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@ -1,3 +1,3 @@
*.bin
*.o
*.bin
*.lst

0
testcode/assembler/4510all.ref → test/assembler/4510-opcodes.ref
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2
testcode/assembler/4510all.s → test/assembler/4510-opcodes.s
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@ -1,4 +1,4 @@
.setcpu "4510"
.setcpu "4510"
brk
ora ($05,x)

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test/assembler/6502-opcodes.ref Normal file
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257
test/assembler/6502-opcodes.s Normal file
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@ -0,0 +1,257 @@
.setcpu "6502"
brk
ora ($12,x)
.byte $02
.byte $03
.byte $04
ora $12
asl $12
.byte $07
php
ora #$12
asl a
.byte $0B
.byte $0C
ora $3456
asl $3456
.byte $0F
bpl *+122
ora ($12),y
.byte $12
.byte $13
.byte $14
ora $12,x
asl $12,x
.byte $17
clc
ora $3456,y
.byte $1A
.byte $1B
.byte $1C
ora $3456,x
asl $3456,x
.byte $1F
jsr $3456
and ($12,x)
.byte $22
.byte $23
bit $12
and $12
rol $12
.byte $27
plp
and #$12
rol a
.byte $2B
bit $3456
and $3456
rol $3456
.byte $2F
bmi *+122
and ($12),y
.byte $32
.byte $33
.byte $34
and $12,x
rol $12,x
.byte $37
sec
and $3456,y
.byte $3A
.byte $3B
.byte $3C
and $3456,x
rol $3456,x
.byte $3F
rti
eor ($12,x)
.byte $42
.byte $43
.byte $44
eor $12
lsr $12
.byte $47
pha
eor #$12
lsr a
.byte $4B
jmp $3456
eor $3456
lsr $3456
.byte $4F
bvc *+122
eor ($12),y
.byte $52
.byte $53
.byte $54
eor $12,x
lsr $12,x
.byte $57
cli
eor $3456,y
.byte $5A
.byte $5B
.byte $5C
eor $3456,x
lsr $3456,x
.byte $5F
rts
adc ($12,x)
.byte $62
.byte $63
.byte $64
adc $12
ror $12
.byte $67
pla
adc #$12
ror a
.byte $6B
jmp ($3456)
adc $3456
ror $3456
.byte $6F
bvs *+122
adc ($12),y
.byte $72
.byte $73
.byte $74
adc $12,x
ror $12,x
.byte $77
sei
adc $3456,y
.byte $7A
.byte $7B
.byte $7C
adc $3456,x
ror $3456,x
.byte $7F
.byte $80
sta ($12,x)
.byte $82
.byte $83
sty $12
sta $12
stx $12
.byte $87
dey
.byte $89
txa
.byte $8B
sty $3456
sta $3456
stx $3456
.byte $8F
bcc *+122
sta ($12),y
.byte $92
.byte $93
sty $12,x
sta $12,x
stx $12,y
.byte $97
tya
sta $3456,y
txs
.byte $9B
.byte $9C
sta $3456,x
.byte $9E
.byte $9F
ldy #$12
lda ($12,x)
ldx #$12
.byte $A3
ldy $12
lda $12
ldx $12
.byte $A7
tay
lda #$12
tax
.byte $AB
ldy $3456
lda $3456
ldx $3456
.byte $AF
bcs *+122
lda ($12),y
.byte $B2
.byte $B3
ldy $12,x
lda $12,x
ldx $12,y
.byte $B7
clv
lda $3456,y
tsx
.byte $BB
ldy $3456,x
lda $3456,x
ldx $3456,y
.byte $BF
cpy #$12
cmp ($12,x)
.byte $C2
.byte $C3
cpy $12
cmp $12
dec $12
.byte $C7
iny
cmp #$12
dex
.byte $CB
cpy $3456
cmp $3456
dec $3456
.byte $CF
bne *+122
cmp ($12),y
.byte $D2
.byte $D3
.byte $D4
cmp $12,x
dec $12,x
.byte $D7
cld
cmp $3456,y
.byte $DA
.byte $DB
.byte $DC
cmp $3456,x
dec $3456,x
.byte $DF
cpx #$12
sbc ($12,x)
.byte $E2
.byte $E3
cpx $12
sbc $12
inc $12
.byte $E7
inx
sbc #$12
.byte $EB
cpx $3456
sbc $3456
inc $3456
.byte $EF
beq *+122
sbc ($12),y
.byte $F2
.byte $F3
.byte $F4
sbc $12,x
inc $12,x
.byte $F7
sed
sbc $3456,y
.byte $FA
.byte $FB
.byte $FC
sbc $3456,x
inc $3456,x
.byte $FF

BIN
test/assembler/6502x-opcodes.ref Normal file
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258
test/assembler/6502x-opcodes.s Normal file
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@ -0,0 +1,258 @@
.setcpu "6502X"
brk
ora ($12,x)
jam
slo ($12,x)
nop $12
ora $12
asl $12
slo $12
php
ora #$12
asl a
anc #$12
nop $3456
ora $3456
asl $3456
slo $3456
bpl *+122
ora ($12),y
.byte $12 ; jam
slo ($12),y
nop $12,x
ora $12,x
asl $12,x
slo $12,x
clc
ora $3456,y
.byte $1a ; nop
slo $3456,y
nop $3456,x
ora $3456,x
asl $3456,x
slo $3456,x
jsr $3456
and ($12,x)
.byte $22 ; jam
rla ($12,x)
bit $12
and $12
rol $12
rla $12
plp
and #$12
rol a
.byte $2b ; anc #$12
bit $3456
and $3456
rol $3456
rla $3456
bmi *+122
and ($12),y
.byte $32 ; jam
rla ($12),y
.byte $34,$12 ; nop $12,x
and $12,x
rol $12,x
rla $12,x
sec
and $3456,y
.byte $3a ; nop
rla $3456,y
.byte $3c,$56,$34 ; nop $3456,x
and $3456,x
rol $3456,x
rla $3456,x
rti
eor ($12,x)
.byte $42 ; jam
sre ($12,x)
.byte $44,$12 ; nop $12
eor $12
lsr $12
sre $12
pha
eor #$12
lsr a
alr #$12
jmp $3456
eor $3456
lsr $3456
sre $3456
bvc *+122
eor ($12),y
.byte $52 ; jam
sre ($12),y
.byte $54,$12 ; nop $12,x
eor $12,x
lsr $12,x
sre $12,x
cli
eor $3456,y
.byte $5a ; nop
sre $3456,y
nop $3456,x
eor $3456,x
lsr $3456,x
sre $3456,x
rts
adc ($12,x)
.byte $62 ; jam
rra ($12,x)
.byte $64,$12 ; nop $12
adc $12
ror $12
rra $12
pla
adc #$12
ror a
arr #$12
jmp ($3456)
adc $3456
ror $3456
rra $3456
bvs *+122
adc ($12),y
.byte $72 ; jam
rra ($12),y
.byte $74,$12 ; nop $12,x
adc $12,x
ror $12,x
rra $12,x
sei
adc $3456,y
.byte $7a ; nop
rra $3456,y
.byte $7c,$56,$34 ; nop $3456,x
adc $3456,x
ror $3456,x
rra $3456,x
nop #$12
sta ($12,x)
.byte $82,$12 ; nop #$12
sax ($12,x)
sty $12
sta $12
stx $12
sax $12
dey
.byte $89,$12 ; nop #$12
txa
.byte $8b,$12 ; xaa #$12
sty $3456
sta $3456
stx $3456
sax $3456
bcc *+122
sta ($12),y
.byte $92 ; jam
.byte $93,$12 ; ahx ($12),y
sty $12,x
sta $12,x
stx $12,y
sax $12,y
tya
sta $3456,y
txs
tas $3456,y
shy $3456,x
sta $3456,x
shx $3456,y
.byte $9f,$56,$34 ; ahx $3456,y
ldy #$12
lda ($12,x)
ldx #$12
lax ($12,x)
ldy $12
lda $12
ldx $12
lax $12
tay
lda #$12
tax
lax #$12
ldy $3456
lda $3456
ldx $3456
lax $3456
bcs *+122
lda ($12),y
.byte $b2 ; jam
lax ($12),y
ldy $12,x
lda $12,x
ldx $12,y
lax $12,y
clv
lda $3456,y
tsx
las $3456,y
ldy $3456,x
lda $3456,x
ldx $3456,y
lax $3456,y
cpy #$12
cmp ($12,x)
.byte $c2,$12 ; nop #$12
dcp ($12,x)
cpy $12
cmp $12
dec $12
dcp $12
iny
cmp #$12
dex
axs #$12
cpy $3456
cmp $3456
dec $3456
dcp $3456
bne *+122
cmp ($12),y
.byte $d2 ; jam
dcp ($12),y
.byte $d4,$12 ; nop $12,x
cmp $12,x
dec $12,x
dcp $12,x
cld
cmp $3456,y
.byte $da ; nop
dcp $3456,y
.byte $dc,$56,$34 ; nop $3456,x
cmp $3456,x
dec $3456,x
dcp $3456,x
cpx #$12
sbc ($12,x)
.byte $e2,$12 ; nop #$12
isc ($12,x)
cpx $12
sbc $12
inc $12
isc $12
inx
sbc #$12
nop
.byte $eb ; nop
cpx $3456
sbc $3456
inc $3456
isc $3456
beq *+122
sbc ($12),y
.byte $f2 ; jam
isc ($12),y
.byte $f4,$12 ; nop $12,x
sbc $12,x
inc $12,x
isc $12,x
sed
sbc $3456,y
.byte $fa ; nop
isc $3456,y
.byte $fc,$56,$34 ; nop $3456,x
sbc $3456,x
inc $3456,x
isc $3456,x

BIN
test/assembler/65c02-opcodes.ref Normal file
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258
test/assembler/65c02-opcodes.s Normal file
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@ -0,0 +1,258 @@
.setcpu "65C02"
brk
ora ($12,x)
.byte $02
.byte $03
tsb $12
ora $12
asl $12
rmb0 $12
php
ora #$12
asl a
.byte $0B
tsb $3456
ora $3456
asl $3456
bbr0 $12,*+122
bpl *+122
ora ($12),y
ora ($12)
.byte $13
trb $12
ora $12,x
asl $12,x
rmb1 $12
clc
ora $3456,y
inc a
.byte $1B
trb $3456
ora $3456,x
asl $3456,x
bbr1 $12,*+122
jsr $3456
and ($12,x)
.byte $22
.byte $23
bit $12
and $12
rol $12
rmb2 $12
plp
and #$12
rol a
.byte $2B
bit $3456
and $3456
rol $3456
bbr2 $12,*+122
bmi *+122
and ($12),y
and ($12)
.byte $33
bit $12,x
and $12,x
rol $12,x
rmb3 $12
sec
and $3456,y
dec a
.byte $3B
bit $3456,x
and $3456,x
rol $3456,x
bbr3 $12,*+122
rti
eor ($12,x)
.byte $42
.byte $43
.byte $44
eor $12
lsr $12
rmb4 $12
pha
eor #$12
lsr a
.byte $4B
jmp $3456
eor $3456
lsr $3456
bbr4 $12,*+122
bvc *+122
eor ($12),y
eor ($12)
.byte $53
.byte $54
eor $12,x
lsr $12,x
rmb5 $12
cli
eor $3456,y
phy
.byte $5B
.byte $5C
eor $3456,x
lsr $3456,x
bbr5 $12,*+122
rts
adc ($12,x)
.byte $62
.byte $63
stz $12
adc $12
ror $12
rmb6 $12
pla
adc #$12
ror a
.byte $6B
jmp ($3456)
adc $3456
ror $3456
bbr6 $12,*+122
bvs *+122
adc ($12),y
adc ($12)
.byte $73
stz $12,x
adc $12,x
ror $12,x
rmb7 $12
sei
adc $3456,y
ply
.byte $7B
jmp ($3456,x)
adc $3456,x
ror $3456,x
bbr7 $12,*+122
bra *+122
sta ($12,x)
.byte $82
.byte $83
sty $12
sta $12
stx $12
smb0 $12
dey
bit #$12
txa
.byte $8B
sty $3456
sta $3456
stx $3456
bbs0 $12,*+122
bcc *+122
sta ($12),y
sta ($12)
.byte $93
sty $12,x
sta $12,x
stx $12,y
smb1 $12
tya
sta $3456,y
txs
.byte $9B
stz $3456
sta $3456,x
stz $3456,x
bbs1 $12,*+122
ldy #$12
lda ($12,x)
ldx #$12
.byte $A3
ldy $12
lda $12
ldx $12
smb2 $12
tay
lda #$12
tax
.byte $AB
ldy $3456
lda $3456
ldx $3456
bbs2 $12,*+122
bcs *+122
lda ($12),y
lda ($12)
.byte $B3
ldy $12,x
lda $12,x
ldx $12,y
smb3 $12
clv
lda $3456,y
tsx
.byte $BB
ldy $3456,x
lda $3456,x
ldx $3456,y
bbs3 $12,*+122
cpy #$12
cmp ($12,x)
.byte $C2
.byte $C3
cpy $12
cmp $12
dec $12
smb4 $12
iny
cmp #$12
dex
.byte $CB
cpy $3456
cmp $3456
dec $3456
bbs4 $12,*+122
bne *+122
cmp ($12),y
cmp ($12)
.byte $D3
.byte $D4
cmp $12,x
dec $12,x
smb5 $12
cld
cmp $3456,y
phx
.byte $DB
.byte $DC
cmp $3456,x
dec $3456,x
bbs5 $12,*+122
cpx #$12
sbc ($12,x)
.byte $E2
.byte $E3
cpx $12
sbc $12
inc $12
smb6 $12
inx
sbc #$12
nop
.byte $EB
cpx $3456
sbc $3456
inc $3456
bbs6 $12,*+122
beq *+122
sbc ($12),y
sbc ($12)
.byte $F3
.byte $F4
sbc $12,x
inc $12,x
smb7 $12
sed
sbc $3456,y
plx
.byte $FB
.byte $FC
sbc $3456,x
inc $3456,x
bbs7 $12,*+122

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test/assembler/65sc02-opcodes.ref Normal file
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258
test/assembler/65sc02-opcodes.s Normal file
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@ -0,0 +1,258 @@
.setcpu "65SC02"
brk
ora ($12,x)
.byte $02
.byte $03
tsb $12
ora $12
asl $12
.byte $07
php
ora #$12
asl a
.byte $0B
tsb $3456
ora $3456
asl $3456
.byte $0F
bpl *+122
ora ($12),y
ora ($12)
.byte $13
trb $12
ora $12,x
asl $12,x
.byte $17
clc
ora $3456,y
inc a
.byte $1B
trb $3456
ora $3456,x
asl $3456,x
.byte $1F
jsr $3456
and ($12,x)
.byte $22
.byte $23
bit $12
and $12
rol $12
.byte $27
plp
and #$12
rol a
.byte $2B
bit $3456
and $3456
rol $3456
.byte $2F
bmi *+122
and ($12),y
and ($12)
.byte $33
bit $12,x
and $12,x
rol $12,x
.byte $37
sec
and $3456,y
dec a
.byte $3B
bit $3456,x
and $3456,x
rol $3456,x
.byte $3F
rti
eor ($12,x)
.byte $42
.byte $43
.byte $44
eor $12
lsr $12
.byte $47
pha
eor #$12
lsr a
.byte $4B
jmp $3456
eor $3456
lsr $3456
.byte $4F
bvc *+122
eor ($12),y
eor ($12)
.byte $53
.byte $54
eor $12,x
lsr $12,x
.byte $57
cli
eor $3456,y
phy
.byte $5B
.byte $5C
eor $3456,x
lsr $3456,x
.byte $5F
rts
adc ($12,x)
.byte $62
.byte $63
stz $12
adc $12
ror $12
.byte $67
pla
adc #$12
ror a
.byte $6B
jmp ($3456)
adc $3456
ror $3456
.byte $6F
bvs *+122
adc ($12),y
adc ($12)
.byte $73
stz $12,x
adc $12,x
ror $12,x
.byte $77
sei
adc $3456,y
ply
.byte $7B
jmp ($3456,x)
adc $3456,x
ror $3456,x
.byte $7F
bra *+122
sta ($12,x)
.byte $82
.byte $83
sty $12
sta $12
stx $12
.byte $87
dey
bit #$12
txa
.byte $8B
sty $3456
sta $3456
stx $3456
.byte $8F
bcc *+122
sta ($12),y
sta ($12)
.byte $93
sty $12,x
sta $12,x
stx $12,y
.byte $97
tya
sta $3456,y
txs
.byte $9B
stz $3456
sta $3456,x
stz $3456,x
.byte $9F
ldy #$12
lda ($12,x)
ldx #$12
.byte $A3
ldy $12
lda $12
ldx $12
.byte $A7
tay
lda #$12
tax
.byte $AB
ldy $3456
lda $3456
ldx $3456
.byte $AF
bcs *+122
lda ($12),y
lda ($12)
.byte $B3
ldy $12,x
lda $12,x
ldx $12,y
.byte $B7
clv
lda $3456,y
tsx
.byte $BB
ldy $3456,x
lda $3456,x
ldx $3456,y
.byte $BF
cpy #$12
cmp ($12,x)
.byte $C2
.byte $C3
cpy $12
cmp $12
dec $12
.byte $C7
iny
cmp #$12
dex
.byte $CB
cpy $3456
cmp $3456
dec $3456
.byte $CF
bne *+122
cmp ($12),y
cmp ($12)
.byte $D3
.byte $D4
cmp $12,x
dec $12,x
.byte $D7
cld
cmp $3456,y
phx
.byte $DB
.byte $DC
cmp $3456,x
dec $3456,x
.byte $DF
cpx #$12
sbc ($12,x)
.byte $E2
.byte $E3
cpx $12
sbc $12
inc $12
.byte $E7
inx
sbc #$12
nop
.byte $EB
cpx $3456
sbc $3456
inc $3456
.byte $EF
beq *+122
sbc ($12),y
sbc ($12)
.byte $F3
.byte $F4
sbc $12,x
inc $12,x
.byte $F7
sed
sbc $3456,y
plx
.byte $FB
.byte $FC
sbc $3456,x
inc $3456,x
.byte $FF

30
test/assembler/Makefile Normal file
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@ -0,0 +1,30 @@
# makefile for the assembler regression tests
BINDIR = ../../bin
#WORKDIR := ../../testwrk
WORKDIR := .
TARGETS = 6502 6502x 65sc02 65c02
#TARGETS += 65816
TARGETS += 4510
TARGETS += huc6280
#TARGETS += m740
all: $(addprefix $(WORKDIR)/, $(addsuffix -opcodes.bin, $(TARGETS)))
@#
.PHONY: $(addprefix $(WORKDIR)/, $(addsuffix -opcodes.bin, $(TARGETS)))
clean:
rm -f *.o *.bin *.lst
define build
$$(WORKDIR)/$(1)-opcodes.bin: $(1)-opcodes.s
@$$(BINDIR)/cl65 --cpu $(1) -t none -l $$(WORKDIR)/$(1)-opcodes.lst --obj-path $$(WORKDIR) -o $$@ $$<
@diff -q $(1)-opcodes.ref $$@ || (cat $$(WORKDIR)/$(1)-opcodes.lst ; exit 1)
@echo ca65 --cpu $(1) ok
endef
$(foreach target,$(TARGETS),$(eval $(call build,$(target))))

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.setcpu "huc6280"
brk
ora ($12,x)
sxy
st0 #$12
tsb $12
ora $12
asl $12
rmb0 $12
php
ora #$12
asl a
.byte $0B
tsb $3456
ora $3456
asl $3456
bbr0 $12,*+122
bpl *+122
ora ($12),y
ora ($12)
st1 #$12
trb $12
ora $12,x
asl $12,x
rmb1 $12
clc
ora $3456,y
inc a
.byte $1B
trb $3456
ora $3456,x
asl $3456,x
bbr1 $12,*+122
jsr $3456
and ($12,x)
sax
st2 #$12
bit $12
and $12
rol $12
rmb2 $12
plp
and #$12
rol a
.byte $2B
bit $3456
and $3456
rol $3456
bbr2 $12,*+122
bmi *+122
and ($12),y
and ($12)
.byte $33
bit $12,x
and $12,x
rol $12,x
rmb3 $12
sec
and $3456,y
dec a
.byte $3B
bit $3456,x
and $3456,x
rol $3456,x
bbr3 $12,*+122
rti
eor ($12,x)
say
tma #$02
bsr *+122
eor $12
lsr $12
rmb4 $12
pha
eor #$12
lsr a
.byte $4B
jmp $3456
eor $3456
lsr $3456
bbr4 $12,*+122
bvc *+122
eor ($12),y
eor ($12)
tam #$12
csl
eor $12,x
lsr $12,x
rmb5 $12
cli
eor $3456,y
phy
.byte $5B
.byte $5C
eor $3456,x
lsr $3456,x
bbr5 $12,*+122
rts
adc ($12,x)
cla
.byte $63
stz $12
adc $12
ror $12
rmb6 $12
pla
adc #$12
ror a
.byte $6B
jmp ($3456)
adc $3456
ror $3456
bbr6 $12,*+122
bvs *+122
adc ($12),y
adc ($12)
tii $3333,$7373,$1111
stz $12,x
adc $12,x
ror $12,x
rmb7 $12
sei
adc $3456,y
ply
.byte $7B
jmp ($3456,x)
adc $3456,x
ror $3456,x
bbr7 $12,*+122
bra *+122
sta ($12,x)
clx
tst #$12,$EA
sty $12
sta $12
stx $12
smb0 $12
dey
bit #$12
txa
.byte $8B
sty $3456
sta $3456
stx $3456
bbs0 $12,*+122
bcc *+122
sta ($12),y
sta ($12)
tst #$12,$EAEA
sty $12,x
sta $12,x
stx $12,y
smb1 $12
tya
sta $3456,y
txs
.byte $9B
stz $3456
sta $3456,x
stz $3456,x
bbs1 $12,*+122
ldy #$12
lda ($12,x)
ldx #$12
tst #$12,$EA,x
ldy $12
lda $12
ldx $12
smb2 $12
tay
lda #$12
tax
.byte $AB
ldy $3456
lda $3456
ldx $3456
bbs2 $12,*+122
bcs *+122
lda ($12),y
lda ($12)
tst #$12,$EAEA,x
ldy $12,x
lda $12,x
ldx $12,y
smb3 $12
clv
lda $3456,y
tsx
.byte $BB
ldy $3456,x
lda $3456,x
ldx $3456,y
bbs3 $12,*+122
cpy #$12
cmp ($12,x)
cly
tdd $3333,$C3C3,$1111
cpy $12
cmp $12
dec $12
smb4 $12
iny
cmp #$12
dex
.byte $CB
cpy $3456
cmp $3456
dec $3456
bbs4 $12,*+122
bne *+122
cmp ($12),y
cmp ($12)
tin $3333,$D3D3,$1111
.byte $D4
cmp $12,x
dec $12,x
smb5 $12
cld
cmp $3456,y
phx
.byte $DB
.byte $DC
cmp $3456,x
dec $3456,x
bbs5 $12,*+122
cpx #$12
sbc ($12,x)
.byte $E2
tia $3333,$E3E3,$1111
cpx $12
sbc $12
inc $12
smb6 $12
inx
sbc #$12
nop
.byte $EB
cpx $3456
sbc $3456
inc $3456
bbs6 $12,*+122
beq *+122
sbc ($12),y
sbc ($12)
tai $3333,$F3F3,$1111
.byte $F4
sbc $12,x
inc $12,x
smb7 $12
sed
sbc $3456,y
plx
.byte $FB
.byte $FC
sbc $3456,x
inc $3456,x
bbs7 $12,*+122

260
test/assembler/m740-opcodes.s Normal file
View File

@ -0,0 +1,260 @@
.setcpu "65C02"
; copy of 65c02, comments note changes to the m740 according to
; http://documentation.renesas.com/doc/products/mpumcu/rej09b0322_740sm.pdf
brk
ora ($12,x)
.byte $02,$00,$00 ; jsr zp,ind
.byte $03,$00,$00 ; bbs 0,a
tsb $12 ; .byte $04
ora $12
asl $12
rmb0 $12 ; bbs 0,zp
php
ora #$12
asl a
.byte $0B,$00,$00 ; seb 0,a
tsb $3456 ; .byte $0c
ora $3456
asl $3456
bbr0 $12,*+122 ; seb 0,zp
bpl *+122
ora ($12),y
ora ($12) ; clt
.byte $13,$00,$00 ; bbc 0,a
trb $12 ; .byte $14
ora $12,x
asl $12,x
rmb1 $12 ; bbc 0,zp
clc
ora $3456,y
inc a
.byte $1B,$00,$00 ; clb 0,a
trb $3456 ; .byte $1c
ora $3456,x
asl $3456,x
bbr1 $12,*+122 ; clb 0,zp
jsr $3456
and ($12,x)
.byte $22,$00,$00 ; jsr sp
.byte $23,$00,$00 ; bbs 1,a
bit $12
and $12
rol $12
rmb2 $12 ; bbs 1,zp
plp
and #$12
rol a
.byte $2B,$00,$00 ; seb 1,a
bit $3456
and $3456
rol $3456
bbr2 $12,*+122 ; seb 1,zp
bmi *+122
and ($12),y
and ($12) ; set
.byte $33,$00,$00 ; bbc 1,a
bit $12,x ; .byte $34
and $12,x
rol $12,x
rmb3 $12 ; bbc 1,zp
sec
and $3456,y
dec a
.byte $3B,$00,$00 ; clb 1,a
bit $3456,x ; ldm zp
and $3456,x
rol $3456,x
bbr3 $12,*+122 ; clb 1,zp
rti
eor ($12,x)
.byte $42,$00,$00 ; stp
.byte $43,$00,$00 ; bbs 2,a
.byte $44,$00,$00 ; com zp
eor $12
lsr $12
rmb4 $12 ; bbs 2,zp
pha
eor #$12
lsr a
.byte $4B,$00,$00 ; seb 2,a
jmp $3456
eor $3456
lsr $3456
bbr4 $12,*+122 ; seb 2,zp
bvc *+122
eor ($12),y
eor ($12) ; .byte $52
.byte $53,$00,$00 ; bbc 2,a
.byte $54,$00,$00
eor $12,x
lsr $12,x
rmb5 $12 ; bbc 2,zp
cli
eor $3456,y
phy
.byte $5B,$00,$00 ; clb 2,a
.byte $5C,$00,$00
eor $3456,x
lsr $3456,x
bbr5 $12,*+122 ; clb 2,zp
rts
adc ($12,x)
.byte $62,$00,$00 ; mul zp,x
.byte $63,$00,$00 ; bbs 3,a
stz $12 ; tst zp
adc $12
ror $12
rmb6 $12 ; bbs 3,zp
pla
adc #$12
ror a
.byte $6B,$00,$00 ; seb 3,a
jmp ($3456)
adc $3456
ror $3456
bbr6 $12,*+122 ; seb 3,zp
bvs *+122
adc ($12),y
adc ($12) ; .byte $72
.byte $73,$00,$00 ; bbc 3,a
stz $12,x ; .byte $74
adc $12,x
ror $12,x
rmb7 $12 ; bbc 3,zp
sei
adc $3456,y
ply
.byte $7B,$00,$00 ; clb 3,a
jmp ($3456,x) ; .byte $7c
adc $3456,x
ror $3456,x
bbr7 $12,*+122 ; clb 3,zp
bra *+122
sta ($12,x)
.byte $82,$00,$00 ; rrf zp
.byte $83,$00,$00 ; bbs 4,a
sty $12
sta $12
stx $12
smb0 $12 ; bbs 4,zp
dey
bit #$12
txa
.byte $8B,$00,$00 ; seb 4,a
sty $3456
sta $3456
stx $3456
bbs0 $12,*+122 ; seb 4,zp
bcc *+122
sta ($12),y
sta ($12) ; .byte $92
.byte $93,$00,$00 ; bbc 4,a
sty $12,x
sta $12,x
stx $12,y
smb1 $12 ; bbc 4,zp
tya
sta $3456,y
txs
.byte $9B,$00,$00 ; clb 4,a
stz $3456 ; .byte $9c
sta $3456,x
stz $3456,x ; .byte $9e
bbs1 $12,*+122 ; clb 4,zp
ldy #$12
lda ($12,x)
ldx #$12
.byte $A3,$00,$00 ; bbs 5,a
ldy $12
lda $12
ldx $12
smb2 $12 ; bbs 5,zp
tay
lda #$12
tax
.byte $AB,$00,$00 ; seb 5,a
ldy $3456
lda $3456
ldx $3456
bbs2 $12,*+122 ; seb 5,zp
bcs *+122
lda ($12),y
lda ($12) ; .byte $b2
.byte $B3,$00,$00 ; bbc 5,a
ldy $12,x
lda $12,x
ldx $12,y
smb3 $12 ; bbc 5,zp
clv
lda $3456,y
tsx
.byte $BB,$00,$00 ; clb 5,a
ldy $3456,x
lda $3456,x
ldx $3456,y
bbs3 $12,*+122 ; clb 5,zp
cpy #$12
cmp ($12,x)
.byte $C2,$00,$00 ; wit
.byte $C3,$00,$00 ; bbs 6,a
cpy $12
cmp $12
dec $12
smb4 $12 ; bbs 6,zp
iny
cmp #$12
dex
.byte $CB,$00,$00 ; seb 6,a
cpy $3456
cmp $3456
dec $3456
bbs4 $12,*+122 ; seb 6,zp
bne *+122
cmp ($12),y
cmp ($12) ; .byte $d2
.byte $D3,$00,$00 ; bbc 6,a
.byte $D4,$00,$00
cmp $12,x
dec $12,x
smb5 $12 ; bbc 6,zp
cld
cmp $3456,y
phx
.byte $DB,$00,$00 ; clb 6,a
.byte $DC,$00,$00
cmp $3456,x
dec $3456,x
bbs5 $12,*+122 ; clb 6,zp
cpx #$12
sbc ($12,x)
.byte $E2,$00,$00 ; div zp,x
.byte $E3,$00,$00 ; bbs 7,a
cpx $12
sbc $12
inc $12
smb6 $12 ; bbs 7,zp
inx
sbc #$12
nop
.byte $EB,$00,$00 ; seb 7,a
cpx $3456
sbc $3456
inc $3456
bbs6 $12,*+122 ; seb 7,zp
beq *+122
sbc ($12),y
sbc ($12) ; .byte $f2
.byte $F3,$00,$00 ; bbc 7,a
.byte $F4,$00,$00
sbc $12,x
inc $12,x
smb7 $12 ; bbc 7,zp
sed
sbc $3456,y
plx
.byte $FB,$00,$00 ; clb 7,a
.byte $FC,$00,$00
sbc $3456,x
inc $3456,x
bbs7 $12,*+122 ; clb 7,zp

32
testcode/assembler/Makefile
View File

@ -1,32 +0,0 @@
all: chklegal.bin chkillegal.bin chkall.bin chk4510.bin
@#
.PHONY: chklegal.bin chkillegal.bin chkall.bin chk4510.bin
chk4510.bin: 4510all.s
$(MAKE) -C ../../src all
../../bin/cl65 --target none --cpu 4510 --listing 4510all.lst -o $@ $<
diff -q 4510all.ref $@ || cat 4510all.lst
chklegal.bin: legal.s
../../bin/cl65 --target none --cpu 6502X -o chklegal.bin legal.s
diff -q legal.ref chklegal.bin || hex chklegal.bin
chkillegal.bin: illegal.s
../../bin/cl65 --target none --cpu 6502X -o chkillegal.bin illegal.s
diff -q illegal.ref chkillegal.bin || hex chkillegal.bin
chkall.bin: all.s
../../bin/cl65 --target none --cpu 6502X -o chkall.bin all.s
ref: legal.s illegal.s
../../bin/cl65 --target none --cpu 6502X -o legal.ref legal.s
../../bin/cl65 --target none --cpu 6502X -o illegal.ref illegal.s
clean:
rm -f legal.o chklegal.bin
rm -f illegal.o chkillegal.bin
rm -f all.o chkall.bin
rm -f 4510all.o chk4510.bin 4510all.lst

260
testcode/assembler/all.s
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@ -1,260 +0,0 @@
.setcpu "6502X"
; all legal and illegal opcodes as they would be disassembled by da65
; note that this would not assemble into the exact same binary
brk ; 00
ora ($12,x) ; 01 12
jam ; 02
slo ($12,x) ; 03 12
nop $12 ; 04 12
ora $12 ; 05 12
asl $12 ; 06 12
slo $12 ; 07 12
php ; 08
ora #$12 ; 09 12
asl a ; 0a
anc #$12 ; 0b 12
nop $1234 ; 0c 34 12
ora $1234 ; 0d 34 12
asl $1234 ; 0e 34 12
slo $1234 ; 0f 34 12
bpl *+$14 ; 10 12
ora ($12),y ; 11 12
jam ; 12
slo ($12),y ; 13 12
nop $12,x ; 14 12
ora $12,x ; 15 12
asl $12,x ; 16 12
slo $12,x ; 17 12
clc ; 18
ora $1234,y ; 19 34 12
nop ; 1a
slo $1234,y ; 1b 34 12
nop $1234,x ; 1c 34 12
ora $1234,x ; 1d 34 12
asl $1234,x ; 1e 34 12
slo $1234,x ; 1f 34 12
jsr $1234 ; 20 34 12
and ($12,x) ; 21 12
jam ; 22
rla ($12,x) ; 23 12
bit $12 ; 24 12
and $12 ; 25 12
rol $12 ; 26 12
rla $12 ; 27 12
plp ; 28
and #$12 ; 29 12
rol a ; 2a
anc #$12 ; 2b 12
bit $1234 ; 2c 34 12
and $1234 ; 2d 34 12
rol $1234 ; 2e 34 12
rla $1234 ; 2f 34 12
bmi *+$14 ; 30 12
and ($12),y ; 31 12
jam ; 32
rla ($12),y ; 33 12
nop $12,x ; 34 12
and $12,x ; 35 12
rol $12,x ; 36 12
rla $12,x ; 37 12
sec ; 38
and $1234,y ; 39 34 12
nop ; 3a
rla $1234,y ; 3b 34 12
nop $1234,x ; 3c 34 12
and $1234,x ; 3d 34 12
rol $1234,x ; 3e 34 12
rla $1234,x ; 3f 34 12
rti ; 40
eor ($12,x) ; 41 12
jam ; 42
sre ($12,x) ; 43 12
nop $12 ; 44 12
eor $12 ; 45 12
lsr $12 ; 46 12
sre $12 ; 47 12
pha ; 48
eor #$12 ; 49 12
lsr a ; 4a
alr #$12 ; 4b 12
jmp $1234 ; 4c 34 12
eor $1234 ; 4d 34 12
lsr $1234 ; 4e 34 12
sre $1234 ; 4f 34 12
bvc *+$14 ; 50 12
eor ($12),y ; 51 12
jam ; 52
sre ($12),y ; 53 12
nop $12,x ; 54 12
eor $12,x ; 55 12
lsr $12,x ; 56 12
sre $12,x ; 57 12
cli ; 58
eor $1234,y ; 59 34 12
nop ; 5a
sre $1234,y ; 5b 34 12
nop $1234,x ; 5c 34 12
eor $1234,x ; 5d 34 12
lsr $1234,x ; 5e 34 12
sre $1234,x ; 5f 34 12
rts ; 60
adc ($12,x) ; 61 12
jam ; 62
rra ($12,x) ; 63 12
nop $12 ; 64 12
adc $12 ; 65 12
ror $12 ; 66 12
rra $12 ; 67 12
pla ; 68
adc #$12 ; 69 12
ror a ; 6a
arr #$12 ; 6b 12
jmp ($1234) ; 6c 34 12
adc $1234 ; 6d 34 12
ror $1234 ; 6e 34 12
rra $1234 ; 6f 34 12
bvs *+$14 ; 70 12
adc ($12),y ; 71 12
jam ; 72
rra ($12),y ; 73 12
nop $12,x ; 74 12
adc $12,x ; 75 12
ror $12,x ; 76 12
rra $12,x ; 77 12
sei ; 78
adc $1234,y ; 79 34 12
nop ; 7a
rra $1234,y ; 7b 34 12
nop $1234,x ; 7c 34 12
adc $1234,x ; 7d 34 12
ror $1234,x ; 7e 34 12
rra $1234,x ; 7f 34 12
nop #$12 ; 80 12
sta ($12,x) ; 81 12
nop #$12 ; 82 12
sax ($12,x) ; 83 12
sty $12 ; 84 12
sta $12 ; 85 12
stx $12 ; 86 12
sax $12 ; 87 12
dey ; 88
nop #$12 ; 89 12
txa ; 8a
ane #$12 ; 8b 12
sty $1234 ; 8c 34 12
sta $1234 ; 8d 34 12
stx $1234 ; 8e 34 12
sax $1234 ; 8f 34 12
bcc *+$14 ; 90 12
sta ($12),y ; 91 12
jam ; 92
sha ($12),y ; 93 12
sty $12,x ; 94 12
sta $12,x ; 95 12
stx $12,y ; 96 12
sax $12,y ; 97 12
tya ; 98
sta $1234,y ; 99 34 12
txs ; 9a
tas $1234,y ; 9b 34 12
shy $1234,x ; 9c 34 12
sta $1234,x ; 9d 34 12
shx $1234,y ; 9e 34 12
sha $1234,y ; 9f 34 12
ldy #$12 ; a0 12
lda ($12,x) ; a1 12
ldx #$12 ; a2 12
lax ($12,x) ; a3 12
ldy $12 ; a4 12
lda $12 ; a5 12
ldx $12 ; a6 12
lax $12 ; a7 12
tay ; a8
lda #$12 ; a9 12
tax ; aa
lax #$12 ; ab 12
ldy $1234 ; ac 34 12
lda $1234 ; ad 34 12
ldx $1234 ; ae 34 12
lax $1234 ; af 34 12
bcs *+$14 ; b0 12
lda ($12),y ; b1 12
jam ; b2
lax ($12),y ; b3 12
ldy $12,x ; b4 12
lda $12,x ; b5 12
ldx $12,y ; b6 12
lax $12,y ; b7 12
clv ; b8
lda $1234,y ; b9 34 12
tsx ; ba
las $1234,y ; bb 34 12
ldy $1234,x ; bc 34 12
lda $1234,x ; bd 34 12
ldx $1234,y ; be 34 12
lax $1234,y ; bf 34 12
cpy #$12 ; c0 12
cmp ($12,x) ; c1 12
nop #$12 ; c2 12
dcp ($12,x) ; c3 12
cpy $12 ; c4 12
cmp $12 ; c5 12
dec $12 ; c6 12
dcp $12 ; c7 12
iny ; c8
cmp #$12 ; c9 12
dex ; ca
axs #$12 ; cb 12
cpy $1234 ; cc 34 12
cmp $1234 ; cd 34 12
dec $1234 ; ce 34 12
dcp $1234 ; cf 34 12
bne *+$14 ; d0 12
cmp ($12),y ; d1 12
jam ; d2
dcp ($12),y ; d3 12
nop $12,x ; d4 12
cmp $12,x ; d5 12
dec $12,x ; d6 12
dcp $12,x ; d7 12
cld ; d8
cmp $1234,y ; d9 34 12
nop ; da
dcp $1234,y ; db 34 12
nop $1234,x ; dc 34 12
cmp $1234,x ; dd 34 12
dec $1234,x ; de 34 12
dcp $1234,x ; df 34 12
cpx #$12 ; e0 12
sbc ($12,x) ; e1 12
nop #$12 ; e2 12
isc ($12,x) ; e3 12
cpx $12 ; e4 12
sbc $12 ; e5 12
inc $12 ; e6 12
isc $12 ; e7 12
inx ; e8
sbc #$12 ; e9 12
nop ; ea
sbc #$12 ; eb 12
cpx $1234 ; ec 34 12
sbc $1234 ; ed 34 12
inc $1234 ; ee 34 12
isc $1234 ; ef 34 12
beq *+$14 ; f0 12
sbc ($12),y ; f1 12
jam ; f2
isc ($12),y ; f3 12
nop $12,x ; f4 12
sbc $12,x ; f5 12
inc $12,x ; f6 12
isc $12,x ; f7 12
sed ; f8
sbc $1234,y ; f9 34 12
isc $1234,y ; fb 34 12
nop $1234,x ; fc 34 12
sbc $1234,x ; fd 34 12
inc $1234,x ; fe 34 12
isc $1234,x ; ff 34 12

1
testcode/assembler/illegal.ref
View File

@ -1 +0,0 @@
444'/4?4;4#73O4_4[4GCWSo44{4gcwsΟ4ί4Ϋ4ΗΓΧΣο4<12>4ϋ4ηγχσ<12>4‡ƒ—―4Ώ4§£³· kKΛ 44€“<12>4<12>4<12>4›4»4«‹

135
testcode/assembler/illegal.s
View File

@ -1,135 +0,0 @@
.setcpu "6502X"
; all so called "illegal" opcodes. duplicated (functionally identical) ones
; are commented out
; first all totally stable undocs:
slo $12 ; 07 12
slo $1234 ; 0f 34 12
slo $1234,x ; 1f 34 12
slo $1234,y ; 1b 34 12
slo ($12,x) ; 03 12
slo $12,x ; 17 12
slo ($12),y ; 13 12
rla $12 ; 27 12
rla $1234 ; 2f 34 12
rla $1234,x ; 3f 34 12
rla $1234,y ; 3b 34 12
rla ($12,x) ; 23 12
rla $12,x ; 37 12
rla ($12),y ; 33 12
sre $1234 ; 4f 34 12
sre $1234,x ; 5f 34 12
sre $1234,y ; 5b 34 12
sre $12 ; 47 12
sre ($12,x) ; 43 12
sre $12,x ; 57 12
sre ($12),y ; 53 12
rra $1234 ; 6f 34 12
rra $1234,x ; 7f 34 12
rra $1234,y ; 7b 34 12
rra $12 ; 67 12
rra ($12,x) ; 63 12
rra $12,x ; 77 12
rra ($12),y ; 73 12
dcp $1234 ; cf 34 12
dcp $1234,x ; df 34 12
dcp $1234,y ; db 34 12
dcp $12 ; c7 12
dcp ($12,x) ; c3 12
dcp $12,x ; d7 12
dcp ($12),y ; d3 12
isc $1234 ; ef 34 12
isc $1234,x ; ff 34 12
isc $1234,y ; fb 34 12
isc $12 ; e7 12
isc ($12,x) ; e3 12
isc $12,x ; f7 12
isc ($12),y ; f3 12
sax $1234 ; 8f 34 12
sax $12 ; 87 12
sax ($12,x) ; 83 12
sax $12,y ; 97 12
lax $1234 ; af 34 12
lax $1234,y ; bf 34 12
lax $12 ; a7 12
lax ($12,x) ; a3 12
lax ($12),y ; b3 12
lax $12,y ; b7 12
anc #$12 ; 0b 12
;anc #$12 ; 2b 12
arr #$12 ; 6b 12
alr #$12 ; 4b 12
axs #$12 ; cb 12
nop $1234 ; 0c 34 12
nop $1234,x ; 1c 34 12
nop $12 ; 04 12
nop $12,x ; 14 12
nop #$12 ; 80 12
;nop $1234,x ; 3c 34 12
;nop $1234,x ; 5c 34 12
;nop $1234,x ; 7c 34 12
;nop $1234,x ; dc 34 12
;nop $1234,x ; fc 34 12
;nop $12 ; 44 12
;nop $12 ; 64 12
;nop #$12 ; 82 12
;nop #$12 ; 89 12
;nop #$12 ; c2 12
;nop #$12 ; e2 12
;nop $12,x ; 34 12
;nop $12,x ; 54 12
;nop $12,x ; 74 12
;nop $12,x ; d4 12
;nop $12,x ; f4 12
;nop ; 1a
;nop ; 3a
;nop ; 5a
;nop ; 7a
;nop ; da
jam ; 02
;jam ; 12
;jam ; 22
;jam ; 32
;jam ; 42
;jam ; 52
;jam ; 62
;jam ; 72
;jam ; 92
;jam ; b2
;jam ; d2
;jam ; f2
;sbc #$12 ; eb 12
; the so-called "unstable" ones:
sha ($12),y ; 93 12
sha $1234,y ; 9f 34 12
shx $1234,y ; 9e 34 12
shy $1234,x ; 9c 34 12
tas $1234,y ; 9b 34 12
las $1234,y ; bb 34 12
; the two so-called "highly unstable" ones:
lax #$12 ; ab 12
ane #$12 ; 8b 12

BIN
testcode/assembler/legal.ref
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Binary file not shown.

185
testcode/assembler/legal.s
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@ -1,185 +0,0 @@
.setcpu "6502"
adc $1234 ; 6d 34 12
adc $1234,x ; 7d 34 12
adc $1234,y ; 79 34 12
adc $12 ; 65 12
adc #$12 ; 69 12
adc ($12,x) ; 61 12
adc $12,x ; 75 12
adc ($12),y ; 71 12
and $12 ; 25 12
and #$12 ; 29 12
and $1234 ; 2d 34 12
and $1234,x ; 3d 34 12
and $1234,y ; 39 34 12
and ($12,x) ; 21 12
and $12,x ; 35 12
and ($12),y ; 31 12
asl $12 ; 06 12
asl $1234 ; 0e 34 12
asl $1234,x ; 1e 34 12
asl $12,x ; 16 12
asl a ; 0a
bcc *+$14 ; 90 12
bcs *+$14 ; b0 12
beq *+$14 ; f0 12
bmi *+$14 ; 30 12
bne *+$14 ; d0 12
bpl *+$14 ; 10 12
bvc *+$14 ; 50 12
bvs *+$14 ; 70 12
bit $12 ; 24 12
bit $1234 ; 2c 34 12
brk ; 00
clc ; 18
cld ; d8
cli ; 58
clv ; b8
cmp $1234 ; cd 34 12
cmp $1234,x ; dd 34 12
cmp $1234,y ; d9 34 12
cmp $12 ; c5 12
cmp #$12 ; c9 12
cmp ($12,x) ; c1 12
cmp $12,x ; d5 12
cmp ($12),y ; d1 12
cpx $1234 ; ec 34 12
cpx #$12 ; e0 12
cpx $12 ; e4 12
cpy $1234 ; cc 34 12
cpy #$12 ; c0 12
cpy $12 ; c4 12
dec $1234 ; ce 34 12
dec $1234,x ; de 34 12
dec $12 ; c6 12
dec $12,x ; d6 12
dex ; ca
dey ; 88
eor $1234 ; 4d 34 12
eor $1234,x ; 5d 34 12
eor $1234,y ; 59 34 12
eor $12 ; 45 12
eor #$12 ; 49 12
eor ($12,x) ; 41 12
eor $12,x ; 55 12
eor ($12),y ; 51 12
inc $1234 ; ee 34 12
inc $1234,x ; fe 34 12
inc $12 ; e6 12
inc $12,x ; f6 12
inx ; e8
iny ; c8
jmp $1234 ; 4c 34 12
jmp ($1234) ; 6c 34 12
jsr $1234 ; 20 34 12
lda $1234 ; ad 34 12
lda $1234,x ; bd 34 12
lda $1234,y ; b9 34 12
lda $12 ; a5 12
lda #$12 ; a9 12
lda ($12,x) ; a1 12
lda $12,x ; b5 12
lda ($12),y ; b1 12
ldx $1234 ; ae 34 12
ldx $1234,y ; be 34 12
ldx #$12 ; a2 12
ldx $12 ; a6 12
ldx $12,y ; b6 12
ldy $1234 ; ac 34 12
ldy $1234,x ; bc 34 12
ldy #$12 ; a0 12
ldy $12 ; a4 12
ldy $12,x ; b4 12
lsr $1234 ; 4e 34 12
lsr $1234,x ; 5e 34 12
lsr $12 ; 46 12
lsr $12,x ; 56 12
lsr a ; 4a
nop ; ea
ora $12 ; 05 12
ora #$12 ; 09 12
ora $1234 ; 0d 34 12
ora $1234,x ; 1d 34 12
ora $1234,y ; 19 34 12
ora ($12,x) ; 01 12
ora $12,x ; 15 12
ora ($12),y ; 11 12
pha ; 48
php ; 08
pla ; 68
plp ; 28
rol $12 ; 26 12
rol $1234 ; 2e 34 12
rol $1234,x ; 3e 34 12
rol $12,x ; 36 12
rol a ; 2a
ror $1234 ; 6e 34 12
ror $1234,x ; 7e 34 12
ror $12 ; 66 12
ror $12,x ; 76 12
ror a ; 6a
rti ; 40
rts ; 60
sbc $1234 ; ed 34 12
sbc $1234,x ; fd 34 12
sbc $1234,y ; f9 34 12
sbc $12 ; e5 12
sbc #$12 ; e9 12
sbc ($12,x) ; e1 12
sbc $12,x ; f5 12
sbc ($12),y ; f1 12
sec ; 38
sed ; f8
sei ; 78
sta $1234 ; 8d 34 12
sta $1234,x ; 9d 34 12
sta $1234,y ; 99 34 12
sta $12 ; 85 12
sta ($12,x) ; 81 12
sta $12,x ; 95 12
sta ($12),y ; 91 12
stx $1234 ; 8e 34 12
stx $12 ; 86 12
stx $12,y ; 96 12
sty $1234 ; 8c 34 12
sty $12 ; 84 12
sty $12,x ; 94 12
tax ; aa
tay ; a8
tsx ; ba
txa ; 8a
txs ; 9a
tya ; 98