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Added decimal mode (untested): http://www.6502.org/tutorials/decimal_mode.html
git-svn-id: svn://svn.cc65.org/cc65/trunk@4327 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
uz
parent
ca5ada12ba
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@ -124,11 +124,11 @@ static char BreakMsg[1024];
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#define PAGE_CROSS(addr,offs) ((((addr) & 0xFF) + offs) >= 0x100)
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/* #imm */
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#define AC_OP_IMM(op) \
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Cycles = 2; \
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Regs.AC = Regs.AC op MemReadByte (Regs.PC+1); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_IMM(op) \
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Cycles = 2; \
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Regs.AC = Regs.AC op MemReadByte (Regs.PC+1); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 2
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/* zp */
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@ -140,163 +140,196 @@ static char BreakMsg[1024];
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Regs.PC += 2
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/* zp,x */
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#define AC_OP_ZPX(op) \
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unsigned char ZPAddr; \
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Cycles = 4; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.XR; \
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Regs.AC = Regs.AC op MemReadByte (ZPAddr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ZPX(op) \
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unsigned char ZPAddr; \
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Cycles = 4; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.XR; \
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Regs.AC = Regs.AC op MemReadByte (ZPAddr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 2
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/* zp,y */
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#define AC_OP_ZPY(op) \
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unsigned char ZPAddr; \
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Cycles = 4; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.YR; \
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Regs.AC = Regs.AC op MemReadByte (ZPAddr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ZPY(op) \
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unsigned char ZPAddr; \
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Cycles = 4; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.YR; \
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Regs.AC = Regs.AC op MemReadByte (ZPAddr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 2
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/* abs */
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#define AC_OP_ABS(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ABS(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 3
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/* abs,x */
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#define AC_OP_ABSX(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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if (PAGE_CROSS (Addr, Regs.XR)) { \
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++Cycles; \
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} \
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Regs.AC = Regs.AC op MemReadByte (Addr + Regs.XR); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ABSX(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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if (PAGE_CROSS (Addr, Regs.XR)) { \
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++Cycles; \
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} \
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Regs.AC = Regs.AC op MemReadByte (Addr + Regs.XR); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 3
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/* abs,y */
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#define AC_OP_ABSY(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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if (PAGE_CROSS (Addr, Regs.YR)) { \
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++Cycles; \
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} \
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Regs.AC = Regs.AC op MemReadByte (Addr + Regs.YR); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ABSY(op) \
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unsigned Addr; \
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Cycles = 4; \
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Addr = MemReadWord (Regs.PC+1); \
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if (PAGE_CROSS (Addr, Regs.YR)) { \
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++Cycles; \
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} \
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Regs.AC = Regs.AC op MemReadByte (Addr + Regs.YR); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 3
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/* (zp,x) */
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#define AC_OP_ZPXIND(op) \
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unsigned char ZPAddr; \
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unsigned Addr; \
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Cycles = 6; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.XR; \
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Addr = MemReadZPWord (ZPAddr); \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ZPXIND(op) \
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unsigned char ZPAddr; \
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unsigned Addr; \
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Cycles = 6; \
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ZPAddr = MemReadByte (Regs.PC+1) + Regs.XR; \
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Addr = MemReadZPWord (ZPAddr); \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 2
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/* (zp),y */
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#define AC_OP_ZPINDY(op) \
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unsigned char ZPAddr; \
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unsigned Addr; \
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Cycles = 5; \
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ZPAddr = MemReadByte (Regs.PC+1); \
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Addr = MemReadZPWord (ZPAddr) + Regs.YR; \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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#define AC_OP_ZPINDY(op) \
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unsigned char ZPAddr; \
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unsigned Addr; \
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Cycles = 5; \
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ZPAddr = MemReadByte (Regs.PC+1); \
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Addr = MemReadZPWord (ZPAddr) + Regs.YR; \
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Regs.AC = Regs.AC op MemReadByte (Addr); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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Regs.PC += 2
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/* ADC */
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#define ADC(v) \
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if (GET_DF ()) { \
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Warning ("Decimal mode not available"); \
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} else { \
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unsigned old = Regs.AC; \
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unsigned rhs = (v & 0xFF); \
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Regs.AC += rhs + GET_CF (); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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TEST_CF (Regs.AC); \
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SET_OF (!((old ^ rhs) & 0x80) && \
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((old ^ Regs.AC) & 0x80)); \
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Regs.AC &= 0xFF; \
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}
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#define ADC(v) \
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do { \
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unsigned old = Regs.AC; \
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unsigned rhs = (v & 0xFF); \
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if (GET_DF ()) { \
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unsigned lo; \
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int res; \
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lo = (old & 0x0F) + (rhs & 0x0F) + GET_CF (); \
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if (lo >= 0x0A) { \
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lo = ((lo + 0x06) & 0x0F) + 0x10; \
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} \
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Regs.AC = (old & 0xF0) + (rhs & 0xF0) + lo; \
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res = (signed char)(old & 0xF0) + \
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(signed char)(rhs & 0xF0) + \
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(signed char)lo; \
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TEST_ZF (old + rhs + GET_CF ()); \
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TEST_SF (Regs.AC); \
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if (Regs.AC >= 0xA0) { \
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Regs.AC += 0x60; \
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} \
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TEST_CF (Regs.AC); \
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SET_OF ((res < -128) || (res > 127)); \
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} else { \
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Regs.AC += rhs + GET_CF (); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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TEST_CF (Regs.AC); \
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SET_OF (!((old ^ rhs) & 0x80) && \
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((old ^ Regs.AC) & 0x80)); \
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Regs.AC &= 0xFF; \
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} \
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} while (0)
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/* branches */
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#define BRANCH(cond) \
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Cycles = 2; \
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if (cond) { \
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signed char Offs; \
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unsigned char OldPCH; \
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++Cycles; \
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Offs = (signed char) MemReadByte (Regs.PC+1); \
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OldPCH = PCH; \
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Regs.PC += 2 + (int) Offs; \
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if (PCH != OldPCH) { \
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++Cycles; \
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} \
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} else { \
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Regs.PC += 2; \
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#define BRANCH(cond) \
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Cycles = 2; \
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if (cond) { \
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signed char Offs; \
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unsigned char OldPCH; \
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++Cycles; \
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Offs = (signed char) MemReadByte (Regs.PC+1); \
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OldPCH = PCH; \
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Regs.PC += 2 + (int) Offs; \
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if (PCH != OldPCH) { \
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++Cycles; \
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} \
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} else { \
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Regs.PC += 2; \
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}
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/* compares */
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#define CMP(v1,v2) \
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{ \
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unsigned Result = v1 - v2; \
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TEST_ZF (Result & 0xFF); \
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TEST_SF (Result); \
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SET_CF (Result <= 0xFF); \
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}
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#define CMP(v1,v2) \
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do { \
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unsigned Result = v1 - v2; \
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TEST_ZF (Result & 0xFF); \
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TEST_SF (Result); \
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SET_CF (Result <= 0xFF); \
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} while (0)
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/* ROL */
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#define ROL(Val) \
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Val <<= 1; \
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if (GET_CF ()) { \
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Val |= 0x01; \
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} \
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TEST_ZF (Val); \
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TEST_SF (Val); \
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#define ROL(Val) \
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Val <<= 1; \
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if (GET_CF ()) { \
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Val |= 0x01; \
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} \
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TEST_ZF (Val); \
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TEST_SF (Val); \
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TEST_CF (Val)
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/* ROR */
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#define ROR(Val) \
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if (GET_CF ()) { \
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Val |= 0x100; \
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} \
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SET_CF (Val & 0x01); \
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Val >>= 1; \
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TEST_ZF (Val); \
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#define ROR(Val) \
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if (GET_CF ()) { \
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Val |= 0x100; \
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} \
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SET_CF (Val & 0x01); \
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Val >>= 1; \
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TEST_ZF (Val); \
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TEST_SF (Val)
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/* SBC */
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#define SBC(v) \
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if (GET_DF ()) { \
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Warning ("Decimal mode not available"); \
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} else { \
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unsigned old = Regs.AC; \
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unsigned rhs = (v & 0xFF); \
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Regs.AC -= rhs - (!GET_CF ()); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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SET_CF (Regs.AC <= 0xFF); \
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SET_OF (((old^rhs) & (old^Regs.AC) & 0x80)); \
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Regs.AC &= 0xFF; \
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}
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#define SBC(v) \
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do { \
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unsigned old = Regs.AC; \
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unsigned rhs = (v & 0xFF); \
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if (GET_DF ()) { \
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unsigned lo; \
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int res; \
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lo = (old & 0x0F) - (rhs & 0x0F) + GET_CF () - 1; \
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if (lo & 0x80) { \
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lo = ((lo - 0x06) & 0x0F) - 0x10; \
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} \
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Regs.AC = (old & 0xF0) - (rhs & 0xF0) + lo; \
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if (Regs.AC & 0x80) { \
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Regs.AC -= 0x60; \
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} \
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res = Regs.AC - rhs + (!GET_CF ()); \
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TEST_ZF (res); \
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TEST_SF (res); \
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SET_CF (res <= 0xFF); \
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SET_OF (((old^rhs) & (old^res) & 0x80)); \
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} else { \
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Regs.AC -= rhs - (!GET_CF ()); \
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TEST_ZF (Regs.AC); \
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TEST_SF (Regs.AC); \
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SET_CF (Regs.AC <= 0xFF); \
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SET_OF (((old^rhs) & (old^Regs.AC) & 0x80)); \
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Regs.AC &= 0xFF; \
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} \
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} while (0)
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/*****************************************************************************/
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