1
0
mirror of https://github.com/cc65/cc65.git synced 2025-04-13 06:37:20 +00:00

Replaced all C++ style comments from Lynx include files

This commit is contained in:
Alex Thissen 2024-11-09 19:46:11 +01:00
parent 4036912463
commit a945bedefc
3 changed files with 163 additions and 164 deletions

View File

@ -53,59 +53,59 @@ typedef struct _mikey_audio {
/* Define a structure with the mikey register offsets */
struct __mikey {
struct _mikey_timer timer0; // 0xFD00
struct _mikey_timer timer1; // 0xFD04
struct _mikey_timer timer2; // 0xFD08
struct _mikey_timer timer3; // 0xFD0C
struct _mikey_timer timer4; // 0xFD10
struct _mikey_timer timer5; // 0xFD14
struct _mikey_timer timer6; // 0xFD18
struct _mikey_timer timer7; // 0xFD1C
struct _mikey_audio channel_a; // 0xFD20
struct _mikey_audio channel_b; // 0xFD28
struct _mikey_audio channel_c; // 0xFD30
struct _mikey_audio channel_d; // 0xFD38
unsigned char attena; // 0xFD40 ?? not yet allocated?
unsigned char attenb; // 0xFD41 |
unsigned char attenc; // 0xFD42 |
unsigned char attend; // 0xFD43 |
unsigned char panning; // 0xFD44 |
unsigned char unused0[11]; // 0xFD45 - 0xFD4F not used
unsigned char mstereo; // 0xFD50 stereo control bits
unsigned char unused1[47]; // 0xFD51 - 0xFD7F not used
unsigned char intrst; // 0xFD80 interrupt poll 0
unsigned char intset; // 0xFD81 interrupt poll 1
unsigned char unused2[2]; // 0xFD82 - 0xFD83 not used
unsigned char magrdy0; // 0xFD84 mag tape channel0 ready bit
unsigned char magrdy1; // 0xFD85 mag tape channel1 ready bit
unsigned char audin; // 0xFD86 audio in
unsigned char sysctl1; // 0xFD87 control bits
unsigned char mikeyrev; // 0xFD88 mikey hardware rev
unsigned char mikeysrev; // 0xFD89 mikey software rev
unsigned char iodir; // 0xFD8A parallel i/o data dir
unsigned char iodat; // 0xFD8B parallel data
unsigned char serctl; // 0xFD8C serial control register
unsigned char serdat; // 0xFD8D serial data
unsigned char unused3[2]; // 0xFD8E - 0xFD8F not used
unsigned char sdoneack; // 0xFD90 suzy done acknowledge
unsigned char cpusleep; // 0xFD91 cpu bus request disable
unsigned char dispctl; // 0xFD92 video bus request enable, viddma
unsigned char pkbkup; // 0xFD93 magic 'P' count
unsigned char *scrbase; // 0xFD94 start address of video display
unsigned char unused4[6]; // 0xFD96 - 0xFD9B not used
unsigned char mtest0; // 0xFD9C
unsigned char mtest1; // 0xFD9D
unsigned char mtest2; // 0xFD9E
unsigned char unused5; // 0xFD9F not used
unsigned char palette[32]; // 0xFDA0 - 0xFDBF palette 32 bytes
unsigned char unused6[64]; // 0xFDC0 - 0xFDFF not used
unsigned char bootrom[504]; // 0xFE00 - 0xFFD8 boot rom
unsigned char reserved; // 0xFFD8 reserved for future hardware
unsigned char mapctl; // 0xFFF9 map control register
struct _mikey_timer timer0; /* 0xFD00 */
struct _mikey_timer timer1; /* 0xFD04 */
struct _mikey_timer timer2; /* 0xFD08 */
struct _mikey_timer timer3; /* 0xFD0C */
struct _mikey_timer timer4; /* 0xFD10 */
struct _mikey_timer timer5; /* 0xFD14 */
struct _mikey_timer timer6; /* 0xFD18 */
struct _mikey_timer timer7; /* 0xFD1C */
struct _mikey_audio channel_a; /* 0xFD20 */
struct _mikey_audio channel_b; /* 0xFD28 */
struct _mikey_audio channel_c; /* 0xFD30 */
struct _mikey_audio channel_d; /* 0xFD38 */
unsigned char attena; /* 0xFD40 ?? not yet allocated? */
unsigned char attenb; /* 0xFD41 | */
unsigned char attenc; /* 0xFD42 | */
unsigned char attend; /* 0xFD43 | */
unsigned char panning; /* 0xFD44 | */
unsigned char unused0[11]; /* 0xFD45 - 0xFD4F not used */
unsigned char mstereo; /* 0xFD50 stereo control bits */
unsigned char unused1[47]; /* 0xFD51 - 0xFD7F not used */
unsigned char intrst; /* 0xFD80 interrupt poll 0 */
unsigned char intset; /* 0xFD81 interrupt poll 1 */
unsigned char unused2[2]; /* 0xFD82 - 0xFD83 not used */
unsigned char magrdy0; /* 0xFD84 mag tape channel0 ready bit */
unsigned char magrdy1; /* 0xFD85 mag tape channel1 ready bit */
unsigned char audin; /* 0xFD86 audio in */
unsigned char sysctl1; /* 0xFD87 control bits */
unsigned char mikeyrev; /* 0xFD88 mikey hardware rev */
unsigned char mikeysrev; /* 0xFD89 mikey software rev */
unsigned char iodir; /* 0xFD8A parallel i/o data dir */
unsigned char iodat; /* 0xFD8B parallel data */
unsigned char serctl; /* 0xFD8C serial control register */
unsigned char serdat; /* 0xFD8D serial data */
unsigned char unused3[2]; /* 0xFD8E - 0xFD8F not used */
unsigned char sdoneack; /* 0xFD90 suzy done acknowledge */
unsigned char cpusleep; /* 0xFD91 cpu bus request disable */
unsigned char dispctl; /* 0xFD92 video bus request enable, viddma */
unsigned char pkbkup; /* 0xFD93 magic 'P' count */
unsigned char *scrbase; /* 0xFD94 start address of video display */
unsigned char unused4[6]; /* 0xFD96 - 0xFD9B not used */
unsigned char mtest0; /* 0xFD9C */
unsigned char mtest1; /* 0xFD9D */
unsigned char mtest2; /* 0xFD9E */
unsigned char unused5; /* 0xFD9F not used */
unsigned char palette[32]; /* 0xFDA0 - 0xFDBF palette 32 bytes */
unsigned char unused6[64]; /* 0xFDC0 - 0xFDFF not used */
unsigned char bootrom[504]; /* 0xFE00 - 0xFFD8 boot rom */
unsigned char reserved; /* 0xFFD8 reserved for future hardware */
unsigned char mapctl; /* 0xFFF9 map control register */
struct {
unsigned char *nmi; // 0xFFFA NMI vector
unsigned char *reset; // 0xFFFB reset vector
unsigned char *irq; // 0xFFFC IRQ vector
unsigned char *nmi; /* 0xFFFA NMI vector */
unsigned char *reset; /* 0xFFFB reset vector */
unsigned char *irq; /* 0xFFFC IRQ vector */
} vectors;
};
@ -180,12 +180,12 @@ enum {
/* IODIR and IODAT bit definitions */
enum {
AUDIN_BIT = 0x10, // different from AUDIN address
READ_ENABLE = 0x10, // same bit for AUDIN_BIT
AUDIN_BIT = 0x10, /* different from AUDIN address */
READ_ENABLE = 0x10, /* same bit for AUDIN_BIT */
RESTLESS = 0x08,
NOEXP = 0x04, // if set, redeye is not connected
CART_ADDR_DATA = 0x02, //
CART_POWER_OFF = 0x02, // same bit for CART_ADDR_DATA
NOEXP = 0x04, /* if set, redeye is not connected */
CART_ADDR_DATA = 0x02,
CART_POWER_OFF = 0x02, /* same bit for CART_ADDR_DATA */
EXTERNAL_POWER = 0x01
};
@ -214,10 +214,10 @@ enum {
/* DISPCTL bit definitions */
enum {
DISP_COLOR = 0x08, // must be set to 1
DISP_FOURBIT = 0x04, // must be set to 1
DISP_FLIP = 0x02, //
DMA_ENABLE = 0x01 // must be set to 1
DISP_COLOR = 0x08, /* must be set to 1 */
DISP_FOURBIT = 0x04, /* must be set to 1 */
DISP_FLIP = 0x02,
DMA_ENABLE = 0x01 /* must be set to 1 */
};
/* MTEST0 bit definitions */
@ -262,4 +262,3 @@ enum {
};
#endif

View File

@ -209,101 +209,101 @@ typedef struct PENPAL_1 {
/* SPRGO bit definitions */
enum {
SPRITE_GO = 0x01, // sprite process start bit
EVER_ON = 0x04 // everon detector enable
SPRITE_GO = 0x01, /* sprite process start bit */
EVER_ON = 0x04 /* everon detector enable */
};
/* SPRSYS bit definitions for write operations */
enum {
SIGNMATH = 0x80, // signed math
ACCUMULATE = 0x40, // accumulate multiplication results
NO_COLLIDE = 0x20, // do not collide with any sprites (also SPRCOLL bit definition)
VSTRETCH = 0x10, // stretch v
SIGNMATH = 0x80, /* signed math */
ACCUMULATE = 0x40, /* accumulate multiplication results */
NO_COLLIDE = 0x20, /* do not collide with any sprites (also SPRCOLL bit definition) */
VSTRETCH = 0x10, /* stretch v */
LEFTHAND = 0x08,
CLR_UNSAFE = 0x04, // unsafe access reset
SPRITESTOP = 0x02 // request to stop sprite process
CLR_UNSAFE = 0x04, /* unsafe access reset */
SPRITESTOP = 0x02 /* request to stop sprite process */
};
/* SPRSYS bit definitions for read operations */
enum {
MATHWORKING = 0x80, // math operation in progress
MATHWARNING = 0x40, // accumulator overflow on multiple or divide by zero
MATHCARRY = 0x20, // last carry bit
MATHWORKING = 0x80, /* math operation in progress */
MATHWARNING = 0x40, /* accumulator overflow on multiple or divide by zero */
MATHCARRY = 0x20, /* last carry bit */
VSTRETCHING = 0x10,
LEFTHANDED = 0x08,
UNSAFE_ACCESS = 0x04, // unsafe access performed
SPRITETOSTOP = 0x02, // requested to stop
SPRITEWORKING = 0x01 // sprite process is active
UNSAFE_ACCESS = 0x04, /* unsafe access performed */
SPRITETOSTOP = 0x02, /* requested to stop */
SPRITEWORKING = 0x01 /* sprite process is active */
};
/* Suzy hardware registers */
struct __suzy {
unsigned char *tmpadr; // 0xFC00 Temporary address
unsigned int tiltacc; // 0xFC02 Tilt accumulator
unsigned int hoff; // 0xFC04 Offset to H edge of screen
unsigned int voff; // 0xFC06 Offset to V edge of screen
unsigned char *sprbase; // 0xFC08 Base address of sprite
unsigned char *colbase; // 0xFC0A Base address of collision buffer
unsigned char *vidadr; // 0xFC0C Current vid buffer address
unsigned char *coladr; // 0xFC0E Current col buffer address
unsigned char *scbnext; // 0xFC10 Address of next SCB
unsigned char *sprdline; // 0xFC12 start of sprite data line address
unsigned int hposstrt; // 0xFC14 start hpos
unsigned int vposstrt; // 0xFC16 start vpos
unsigned int sprhsize; // 0xFC18 sprite h size
unsigned int sprvsize; // 0xFC1A sprite v size
unsigned int stretchl; // 0xFC1C H size adder
unsigned int tilt; // 0xFC1E H pos adder
unsigned int sprdoff; // 0xFC20 offset to next sprite data line
unsigned int sprvpos; // 0xFC22 current vpos
unsigned int colloff; // 0xFC24 offset to collision depository
unsigned int vsizeacc; // 0xFC26 vertical size accumulator
unsigned int hsizeoff; // 0xFC28 horizontal size offset
unsigned int vsizeoff; // 0xFC2A vertical size offset
unsigned char *scbaddr; // 0xFC2C address of current SCB
unsigned char *procaddr; // 0xFC2E address of current spr data proc
unsigned char unused0[32]; // 0xFC30 - 0xFC4F reserved/unused
unsigned char unused1[2]; // 0xFC50 - 0xFC51 do not use
unsigned char mathd; // 0xFC52
unsigned char mathc; // 0xFC53
unsigned char mathb; // 0xFC54
unsigned char matha; // 0xFC55 write starts a multiply operation
unsigned char mathp; // 0xFC56
unsigned char mathn; // 0xFC57
unsigned char unused2[8]; // 0xFC58 - 0xFC5F do not use
unsigned char mathh; // 0xFC60
unsigned char mathg; // 0xFC61
unsigned char mathf; // 0xFC62
unsigned char mathe; // 0xFC63 write starts a divide operation
unsigned char unused3[8]; // 0xFC64 - 0xFC6B do not use
unsigned char mathm; // 0xFC6C
unsigned char mathl; // 0xFC6D
unsigned char mathk; // 0xFC6E
unsigned char mathj; // 0xFC6F
unsigned char unused4[16]; // 0xFC70 - 0xFC7F do not use
unsigned char sprctl0; // 0xFC80 sprite control bits 0
unsigned char sprctl1; // 0xFC81 sprite control bits 1
unsigned char sprcoll; // 0xFC82 sprite collision number
unsigned char sprinit; // 0xFC83 sprite initialization bits
unsigned char unused5[4]; // 0xFC84 - 0xFC87 unused
unsigned char suzyhrev; // 0xFC88 suzy hardware rev
unsigned char suzysrev; // 0xFC89 suzy software rev
unsigned char unused6[6]; // 0xFC8A - 0xFC8F unused
unsigned char suzybusen; // 0xFC90 suzy bus enable
unsigned char sprgo; // 0xFC91 sprite process start bit
unsigned char sprsys; // 0xFC92 sprite system control bits
unsigned char unused7[29]; // 0xFC93 - 0xFCAF unused
unsigned char joystick; // 0xFCB0 joystick and buttons
unsigned char switches; // 0xFCB1 other switches
unsigned char cart0; // 0xFCB2 cart0 r/w
unsigned char cart1; // 0xFCB3 cart1 r/w
unsigned char unused8[8]; // 0xFCB4 - 0xFCBF unused
unsigned char leds; // 0xFCC0 leds
unsigned char unused9; // 0xFCC1 unused
unsigned char parstat; // 0xFCC2 parallel port status
unsigned char pardata; // 0xFCC3 parallel port data
unsigned char howie; // 0xFCC4 howie (?)
// 0xFCC5 - 0xFCFF unused
unsigned char *tmpadr; /* 0xFC00 Temporary address */
unsigned int tiltacc; /* 0xFC02 Tilt accumulator */
unsigned int hoff; /* 0xFC04 Offset to H edge of screen */
unsigned int voff; /* 0xFC06 Offset to V edge of screen */
unsigned char *sprbase; /* 0xFC08 Base address of sprite */
unsigned char *colbase; /* 0xFC0A Base address of collision buffer */
unsigned char *vidadr; /* 0xFC0C Current vid buffer address */
unsigned char *coladr; /* 0xFC0E Current col buffer address */
unsigned char *scbnext; /* 0xFC10 Address of next SCB */
unsigned char *sprdline; /* 0xFC12 start of sprite data line address */
unsigned int hposstrt; /* 0xFC14 start hpos */
unsigned int vposstrt; /* 0xFC16 start vpos */
unsigned int sprhsize; /* 0xFC18 sprite h size */
unsigned int sprvsize; /* 0xFC1A sprite v size */
unsigned int stretchl; /* 0xFC1C H size adder */
unsigned int tilt; /* 0xFC1E H pos adder */
unsigned int sprdoff; /* 0xFC20 offset to next sprite data line */
unsigned int sprvpos; /* 0xFC22 current vpos */
unsigned int colloff; /* 0xFC24 offset to collision depository */
unsigned int vsizeacc; /* 0xFC26 vertical size accumulator */
unsigned int hsizeoff; /* 0xFC28 horizontal size offset */
unsigned int vsizeoff; /* 0xFC2A vertical size offset */
unsigned char *scbaddr; /* 0xFC2C address of current SCB */
unsigned char *procaddr; /* 0xFC2E address of current spr data proc */
unsigned char unused0[32]; /* 0xFC30 - 0xFC4F reserved/unused */
unsigned char unused1[2]; /* 0xFC50 - 0xFC51 do not use */
unsigned char mathd; /* 0xFC52 */
unsigned char mathc; /* 0xFC53 */
unsigned char mathb; /* 0xFC54 */
unsigned char matha; /* 0xFC55 write starts a multiply operation */
unsigned char mathp; /* 0xFC56 */
unsigned char mathn; /* 0xFC57 */
unsigned char unused2[8]; /* 0xFC58 - 0xFC5F do not use */
unsigned char mathh; /* 0xFC60 */
unsigned char mathg; /* 0xFC61 */
unsigned char mathf; /* 0xFC62 */
unsigned char mathe; /* 0xFC63 write starts a divide operation */
unsigned char unused3[8]; /* 0xFC64 - 0xFC6B do not use */
unsigned char mathm; /* 0xFC6C */
unsigned char mathl; /* 0xFC6D */
unsigned char mathk; /* 0xFC6E */
unsigned char mathj; /* 0xFC6F */
unsigned char unused4[16]; /* 0xFC70 - 0xFC7F do not use */
unsigned char sprctl0; /* 0xFC80 sprite control bits 0 */
unsigned char sprctl1; /* 0xFC81 sprite control bits 1 */
unsigned char sprcoll; /* 0xFC82 sprite collision number */
unsigned char sprinit; /* 0xFC83 sprite initialization bits */
unsigned char unused5[4]; /* 0xFC84 - 0xFC87 unused */
unsigned char suzyhrev; /* 0xFC88 suzy hardware rev */
unsigned char suzysrev; /* 0xFC89 suzy software rev */
unsigned char unused6[6]; /* 0xFC8A - 0xFC8F unused */
unsigned char suzybusen; /* 0xFC90 suzy bus enable */
unsigned char sprgo; /* 0xFC91 sprite process start bit */
unsigned char sprsys; /* 0xFC92 sprite system control bits */
unsigned char unused7[29]; /* 0xFC93 - 0xFCAF unused */
unsigned char joystick; /* 0xFCB0 joystick and buttons */
unsigned char switches; /* 0xFCB1 other switches */
unsigned char cart0; /* 0xFCB2 cart0 r/w */
unsigned char cart1; /* 0xFCB3 cart1 r/w */
unsigned char unused8[8]; /* 0xFCB4 - 0xFCBF unused */
unsigned char leds; /* 0xFCC0 leds */
unsigned char unused9; /* 0xFCC1 unused */
unsigned char parstat; /* 0xFCC2 parallel port status */
unsigned char pardata; /* 0xFCC3 parallel port data */
unsigned char howie; /* 0xFCC4 howie (?) */
/* 0xFCC5 - 0xFCFF unused */
};
/* Hardware math registers */

View File

@ -80,29 +80,29 @@
#define DYN_DRV 0
/* Addresses of static drivers */
extern void lynx_stdjoy_joy[]; // Referred to by joy_static_stddrv[]
extern void lynx_comlynx_ser[]; // Referred to by ser_static_stddrv[]
extern void lynx_160_102_16_tgi[]; // Referred to by tgi_static_stddrv[]
extern void lynx_stdjoy_joy[]; /* Referred to by joy_static_stddrv[] */
extern void lynx_comlynx_ser[]; /* Referred to by ser_static_stddrv[] */
extern void lynx_160_102_16_tgi[]; /* Referred to by tgi_static_stddrv[] */
/* Sound support */
void lynx_snd_init (void); // Initialize the sound driver
void lynx_snd_pause (void); // Pause sound
void lynx_snd_continue (void); // Continue sound after pause
void __fastcall__ lynx_snd_play (unsigned char channel, unsigned char *music); // Play tune on channel
void lynx_snd_stop (void); // Stop sound on all channels
void __fastcall__ lynx_snd_stop_channel (unsigned char channel); // Stop sound on all channels
unsigned char lynx_snd_active(void); // Show which channels are active
void lynx_snd_init (void); /* Initialize the sound driver */
void lynx_snd_pause (void); /* Pause sound */
void lynx_snd_continue (void); /* Continue sound after pause */
void __fastcall__ lynx_snd_play (unsigned char channel, unsigned char *music); /* Play tune on channel */
void lynx_snd_stop (void); /* Stop sound on all channels */
void __fastcall__ lynx_snd_stop_channel (unsigned char channel); /* Stop sound on all channels */
unsigned char lynx_snd_active(void); /* Show which channels are active */
/* Cartridge access */
void __fastcall__ lynx_load (int file_number); // Load a file into RAM using a zero-based index
void __fastcall__ lynx_exec (int file_number); // Load a file into ram and execute it
void __fastcall__ lynx_load (int file_number); /* Load a file into RAM using a zero-based index */
void __fastcall__ lynx_exec (int file_number); /* Load a file into ram and execute it */
/* EEPROM access */
unsigned __fastcall__ lynx_eeprom_read (unsigned char cell); // Read a 16 bit word from the given address
unsigned __fastcall__ lynx_eeprom_write (unsigned char cell, unsigned val); // Write the word at the given address
void __fastcall__ lynx_eeprom_erase (unsigned char cell); // Clear the word at the given address
unsigned __fastcall__ lynx_eeread (unsigned cell); // Read a 16 bit word from the given address 93C46, 93C66 or 93C86
unsigned __fastcall__ lynx_eewrite (unsigned cell, unsigned val); // Write the word at the given address 93C46, 93C66 or 93C86
unsigned __fastcall__ lynx_eeprom_read (unsigned char cell); /* Read a 16 bit word from the given address */
unsigned __fastcall__ lynx_eeprom_write (unsigned char cell, unsigned val); /* Write the word at the given address */
void __fastcall__ lynx_eeprom_erase (unsigned char cell); /* Clear the word at the given address */
unsigned __fastcall__ lynx_eeread (unsigned cell); /* Read a 16 bit word from the given address 93C46, 93C66 or 93C86 */
unsigned __fastcall__ lynx_eewrite (unsigned cell, unsigned val); /* Write the word at the given address 93C46, 93C66 or 93C86 */
/* TGI extras */
#define tgi_sprite(spr) tgi_ioctl(0, spr)
@ -117,11 +117,11 @@ unsigned __fastcall__ lynx_eewrite (unsigned cell, unsigned val); // Write the w
#include <_mikey.h>
#define MIKEY (*(struct __mikey *)0xFD00)
#define _MIKEY_TIMERS (*(struct _mikey_all_timers *) 0xFD00) // mikey_timers[8]
#define _HBL_TIMER (*(struct _mikey_timer *) 0xFD00) // timer0 (HBL)
#define _VBL_TIMER (*(struct _mikey_timer *) 0xFD08) // timer2 (VBL)
#define _UART_TIMER (*(struct _mikey_timer *) 0xFD14) // timer4 (UART)
#define _VIDDMA (*(unsigned int *) 0xFD92) // dispctl/viddma
#define _MIKEY_TIMERS (*(struct _mikey_all_timers *) 0xFD00) /* mikey_timers[8] */
#define _HBL_TIMER (*(struct _mikey_timer *) 0xFD00) /* timer0 (HBL) */
#define _VBL_TIMER (*(struct _mikey_timer *) 0xFD08) /* timer2 (VBL) */
#define _UART_TIMER (*(struct _mikey_timer *) 0xFD14) /* timer4 (UART) */
#define _VIDDMA (*(unsigned int *) 0xFD92) /* DISPCTL/VIDDMA */
#include <_suzy.h>
#define SUZY (*(volatile struct __suzy*)0xFC00)