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mirror of https://github.com/cc65/cc65.git synced 2024-06-09 06:29:38 +00:00

more cleanup

This commit is contained in:
mrdudz 2015-11-29 20:04:10 +01:00
parent c636675521
commit b39a8b7a61
13 changed files with 669 additions and 607 deletions

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@ -51,20 +51,14 @@ COLOR_GREY2 = 1
COLOR_GREY1 = 2 COLOR_GREY1 = 2
COLOR_BLACK = 3 COLOR_BLACK = 3
;-------------------------------------------------------------------------------
; bios zp usage: ; bios zp usage:
;
; 06/07 address of character set bitplane 1
; 08/09 address of character set bitplane 2
; 0a nmi $4800 echo
; 0b irq counter
; 0c nmi call cart nmi
; 0e/0f/10/11 big endian irq counter
; 15/16/17 ?/xpos/ypos
;
; e8 nmi reset to $ff
;
ZP_NMI_4800 = $0a ZP_NMI_4800 = $0a
ZP_NMI_ENABLE = $0c ZP_IRQ_COUNT = $0b
ZP_IRQ_CTRL = $0c
ZP_IRQ_CNT1 = $0e
ZP_IRQ_CNT2 = $0f
ZP_IRQ_CNT3 = $10
ZP_IRQ_CNT4 = $11
ZP_NMI_FLAG = $e8

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@ -8,7 +8,8 @@ SYMBOLS {
MEMORY { MEMORY {
# 0000-03ff is RAM # 0000-03ff is RAM
# FIXME: what zp range can we actually use? # FIXME: what zp range can we actually use?
ZP: start = $0020, size = $e0; # $0a-$11 is used by IRQ/NMI, $e8 is used by NMI
ZP: start = $0012, size = $e8 - $12;
CPUSTACK: start = $0100, size =$100; CPUSTACK: start = $0100, size =$100;
RAM: start = $0200, size = $200 - __STACKSIZE__, define = yes; RAM: start = $0200, size = $200 - __STACKSIZE__, define = yes;

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@ -41,7 +41,8 @@
/* /*
base clock cpu clock/32 ? base clock cpu clock/32 ?
0/1: 1. channel(right): 12 bit frequency: right frequency 0 nothing, 1 high; 3 23khz; 4 17,3; 10 6,9; 15 4.6; $60 720hz; $eff 18,0; $fff 16,9 hz) 0/1: 1. channel(right): 12 bit frequency: right frequency 0 nothing, 1 high;
3 23khz; 4 17,3; 10 6,9; 15 4.6; $60 720hz; $eff 18,0; $fff 16,9 hz)
(delay clock/32) (delay clock/32)
2/3: 2. channel(left): 12 bit frequency 2/3: 2. channel(left): 12 bit frequency
4/5: 3. channel(both): 12 bit frequency 4/5: 3. channel(both): 12 bit frequency
@ -132,6 +133,26 @@
#define LCD_READ 0x5006 /* read from RAM (no auto inc?) */ #define LCD_READ 0x5006 /* read from RAM (no auto inc?) */
#define LCD_DATA 0x5007 /* write to RAM */ #define LCD_DATA 0x5007 /* write to RAM */
/* BIOS zeropage usage */
/* locations 0x0a-0x0c, 0x0e-0x11 and 0xe8 are in use by the BIOS IRQ/NMI handlers */
#define ZP_NMI_4800 0x0a /* content of I/O reg 4800 gets copied here each NMI */
#define ZP_IRQ_COUNT 0x0b /* increments once per IRQ, used elsewhere in the
BIOS for synchronisation purposes */
#define ZP_IRQ_CTRL 0x0c /* if 0 then cartridge irq stubs will not get called */
/* each of the following 4 increments by 1 per IRQ - it is _not_ a 32bit
counter (see code at $ffa6 in BIOS)
these are not used elsewhere in the bios and can be (re)setted as needed by
the user.
*/
#define ZP_IRQ_CNT1 0x0e
#define ZP_IRQ_CNT2 0x0f
#define ZP_IRQ_CNT3 0x10
#define ZP_IRQ_CNT4 0x11
#define ZP_NMI_FLAG 0xe8 /* set to 0xff each NMI */
/* constants for the conio implementation */ /* constants for the conio implementation */
#define COLOR_BLACK 0x03 #define COLOR_BLACK 0x03

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@ -103,8 +103,8 @@ unsigned _clocks_per_sec (void);
# define CLK_TCK 60 /* POSIX */ # define CLK_TCK 60 /* POSIX */
# define CLOCKS_PER_SEC 60 /* ANSI */ # define CLOCKS_PER_SEC 60 /* ANSI */
#elif defined(__GAMATE__) #elif defined(__GAMATE__)
# define CLK_TCK 60 /* POSIX */ /* FIXME */ # define CLK_TCK 135 /* POSIX */ /* FIXME */
# define CLOCKS_PER_SEC 60 /* ANSI */ /* FIXME */ # define CLOCKS_PER_SEC 135 /* ANSI */ /* FIXME */
#elif defined(__GEOS__) #elif defined(__GEOS__)
# define CLK_TCK 1 /* POSIX */ # define CLK_TCK 1 /* POSIX */
# define CLOCKS_PER_SEC 1 /* ANSI */ # define CLOCKS_PER_SEC 1 /* ANSI */

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@ -6,10 +6,10 @@
.export _clrscr .export _clrscr
_clrscr: _clrscr:
ldy #$0 ldy #$0
tya
rowloop: rowloop:
sty LCD_X sty LCD_X
lda #0
sta LCD_Y sta LCD_Y
ldx #$0 ldx #$0

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@ -65,16 +65,6 @@ plot: ldy CURS_X
; position in Y ; position in Y
putchar: putchar:
; FIXME
; ora RVS ; Set revers bit
; sty temp_y
; stx temp_x
; sta temp_a
; lda temp_a
sta ptr3 sta ptr3
txa txa
@ -139,8 +129,6 @@ putchar:
bne @copylp2 bne @copylp2
@skip_plane2: @skip_plane2:
pla pla
tax tax
ldy CURS_X ldy CURS_X

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@ -17,8 +17,12 @@ Start:
sei sei
cld cld
ldx #0
stx ZP_IRQ_CTRL ; disable calling cartridge IRQ/NMI handler
; Setup stack and memory mapping ; Setup stack and memory mapping
ldx #$FF ; Stack top ($01FF) ;ldx #$FF ; Stack top ($01FF)
dex
txs txs
; Clear the BSS data ; Clear the BSS data
@ -36,6 +40,8 @@ Start:
; Call module constructors ; Call module constructors
jsr initlib jsr initlib
lda #1
sta ZP_IRQ_CTRL ; enable calling cartridge IRQ/NMI handler
cli ; allow IRQ only after constructors have run cli ; allow IRQ only after constructors have run
; Pass an empty command line ; Pass an empty command line

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@ -1,7 +1,7 @@
; ;
; extzp.inc for the Gamate ; extzp.inc for the Gamate
; ;
; Groepaz/Hitmen, 2015-11-19 ; Groepaz/Hitmen, 2015-11-27
; ;
; Assembler include file that imports the runtime zero page locations used ; Assembler include file that imports the runtime zero page locations used
; by the Gamate runtime, ready for usage in asm code. ; by the Gamate runtime, ready for usage in asm code.

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@ -1,5 +1,5 @@
; ;
; Groepaz/Hitmen, 2015-11-19 ; Groepaz/Hitmen, 2015-11-27
; ;
; zeropage locations for exclusive use by the library ; zeropage locations for exclusive use by the library
; ;

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@ -30,9 +30,10 @@ doneirq:
; -> guess 16384 clock cycles = 135,28hz (might be audio signal 1/512?) ; -> guess 16384 clock cycles = 135,28hz (might be audio signal 1/512?)
IRQStub: IRQStub:
pha ; A and Y are saved by the BIOS
tya ;pha
pha ;tya
;pha
ldy #<(__INTERRUPTOR_COUNT__ * 2) ldy #<(__INTERRUPTOR_COUNT__ * 2)
beq @L1 beq @L1
@ -45,7 +46,7 @@ IRQStub:
pla pla
tax tax
@L1: pla @L1: ;pla
tay ;tay
pla ;pla
rts rts

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@ -3,5 +3,19 @@
; ;
.export NMIStub .export NMIStub
.segment "INIT"
NMIStub: NMIStub:
rts ; A is saved by the BIOS
;pha
;txa
;pha
;tya
;pha
;pla
;tay
;pla
;tax
;pla
rts

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@ -1,38 +1,40 @@
;
; original audiotest.s by PeT (mess@utanet.at) ; original audiotest.s by PeT (mess@utanet.at)
;
; cl65 -t gamate -o audiotest.bin audiotest.s
;
.include "gamate.inc" .include "gamate.inc"
.zeropage .zeropage
addr: .word 0 addr: .word 0
psa: .word 0 psa: .word 0
readaddr: .word 0
editbuffer1: .byte 0,0,0,0, 0,0,0,0
writeaddr: .word 0
editbuffer2: .byte 0,0,0,0, 0,0,0,0
cursor: .byte 0
controlslast: .byte 0
controlsedge: .byte 0
.word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0 ; get out of sensitiv area .bss
temp_x: .byte 0
temp_y: .byte 0
temp_a: .byte 0
irq_count: .byte 0
nmi_count: .byte 0
psx: .byte 0
psy: .byte 0
xpos: .byte 0
ypos: .byte 0
readaddr: .word 0 .rodata
editbuffer1: .byte 0,0,0,0, 0,0,0,0 ;0,1,2,3,4,5,6,7
writeaddr: .word 0
editbuffer2: .byte 0,0,0,0, 0,0,0,0 ;8,9,$a,$b,$c,$d,$e,$f
cursor: .byte 0
controlslast: .byte 0
controlsedge: .byte 0
.data
temp_x: .byte 0
temp_y: .byte 0
temp_a: .byte 0
irq_count: .byte 0
nmi_count: .byte 0
psx: .byte 0
psy: .byte 0
xpos: .byte 0
ypos: .byte 0
.code
chars: .incbin "cga2.chr" chars: .incbin "cga2.chr"
hex2asc: .byte "0123456789abcdef" hex2asc: .byte "0123456789abcdef"
.code
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.export IRQStub, NMIStub .export IRQStub, NMIStub
@ -41,7 +43,7 @@ hex2asc: .byte "0123456789abcdef"
rts rts
.endproc .endproc
.proc IRQStub .proc IRQStub
inc irq_count inc irq_count
rts rts
.endproc .endproc
@ -50,141 +52,144 @@ hex2asc: .byte "0123456789abcdef"
.export Start .export Start
.proc Start .proc Start
lda #>AUDIO_BASE sei
sta writeaddr+1 lda #0
sta readaddr+1 sta ZP_IRQ_CTRL
lda #<AUDIO_BASE
sta writeaddr
sta readaddr
lda #$10 lda #>AUDIO_BASE
sta editbuffer1+6 sta writeaddr+1
lda #$e sta readaddr+1
sta editbuffer2+5 lda #<AUDIO_BASE
lda #$ff sta writeaddr
sta editbuffer2+3 sta readaddr
lda #$ff
sta editbuffer2+4
lda #$0f
sta editbuffer2
lda #$0f
sta editbuffer2+1
lda #$0e
sta editbuffer2+2
lda #$38
sta editbuffer1+7
lda #0 lda #$10
sta LCD_XPOS sta editbuffer1+6
sta LCD_YPOS lda #$e
sta irq_count sta editbuffer2+5
sta cursor lda #$ff
lda #1 sta editbuffer2+3
sta nmi_count lda #$ff
sta editbuffer2+4
lda #$0f
sta editbuffer2
lda #$0f
sta editbuffer2+1
lda #$0e
sta editbuffer2+2
lda #$38
sta editbuffer1+7
lda #0
sta LCD_XPOS
sta LCD_YPOS
sta irq_count
sta cursor
lda #1
sta nmi_count
cli cli
lda #LCD_MODE_INC_Y lda #LCD_MODE_INC_Y
sta LCD_MODE sta LCD_MODE
jsr printy jsr printy
lda #1 lda #1
sta ZP_NMI_ENABLE sta ZP_IRQ_CTRL
loop: loop:
lda irq_count lda irq_count
loop1: loop1:
cmp irq_count cmp irq_count
beq loop1 beq loop1
lda irq_count lda irq_count
and #7 and #7
bne loop1 bne loop1
lda #LCD_MODE_INC_Y lda #LCD_MODE_INC_Y
sta LCD_MODE sta LCD_MODE
ldx #3 ldx #3
ldy #32 ldy #32
lda irq_count lda irq_count
jsr printhex jsr printhex
lda cursor
lda cursor ldy #0
ldy #0 cmp #20
cmp #20 bcc firstline
bcc firstline
sec sec
sbc #20 sbc #20
ldy #24 ldy #24
firstline: firstline:
sta LCD_X sta LCD_X
sty LCD_Y sty LCD_Y
lda #' ' lda #' '
jsr printsign jsr printsign
norclearcursor: norclearcursor:
jsr inputs jsr inputs
lda irq_count lda irq_count
and #8 and #8
bne nocursor bne nocursor
lda cursor lda cursor
ldy #0 ldy #0
cmp #20 cmp #20
bcc firstline2 bcc firstline2
sec sec
sbc #20 sbc #20
ldy #24 ldy #24
firstline2: firstline2:
sta LCD_X sta LCD_X
sty LCD_Y sty LCD_Y
lda #'x' lda #'x'
jsr printsign jsr printsign
nocursor: nocursor:
lda #LCD_MODE_INC_Y lda #LCD_MODE_INC_Y
sta LCD_MODE sta LCD_MODE
jsr printy jsr printy
jmp loop jmp loop
.endproc .endproc
.proc printy .proc printy
ldy #0 ldy #0
loop1: loop1:
tya tya
pha pha
asl asl
tax tax
lda readaddr,y lda readaddr,y
ldy #8 ldy #8
jsr printhex jsr printhex
pla pla
tay tay
iny iny
cpy #10 cpy #10
bne loop1 bne loop1
loop2: loop2:
tya tya
pha pha
tya tya
sec sec
sbc #10 sbc #10
asl asl
tax tax
lda readaddr,y lda readaddr,y
ldy #16 ldy #16
jsr printhex jsr printhex
pla pla
tay tay
iny iny
cpy #20 cpy #20
bne loop2 bne loop2
ldx #0 ldx #0
ldy #32 ldy #32
lda nmi_count lda nmi_count
jsr printhex jsr printhex
rts rts
.endproc .endproc
@ -192,187 +197,199 @@ loop2:
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.proc inputs .proc inputs
lda controlslast lda controlslast
eor JOY_DATA eor JOY_DATA
and controlslast and controlslast
eor #$ff eor #$ff
sta controlsedge sta controlsedge
and #JOY_DATA_UP and #JOY_DATA_UP
bne notup bne notup
lda cursor lda cursor
lsr lsr
tay tay
bcs uplow bcs uplow
lda readaddr,y lda readaddr,y
clc clc
adc #$10 adc #$10
sta readaddr,y sta readaddr,y
jmp notup jmp notup
uplow:lda readaddr,y uplow:
lda readaddr,y
clc clc
adc #1 adc #1
sta readaddr,y sta readaddr,y
notup:lda controlsedge notup:
and #JOY_DATA_DOWN lda controlsedge
bne notdown and #JOY_DATA_DOWN
lda cursor bne notdown
lda cursor
lsr lsr
tay tay
bcs downlow bcs downlow
lda readaddr,y lda readaddr,y
sec sec
sbc #$10 sbc #$10
sta readaddr,y sta readaddr,y
jmp notdown jmp notdown
downlow: downlow:
lda readaddr,y lda readaddr,y
sec sec
sbc #1 sbc #1
sta readaddr,y sta readaddr,y
notdown:lda controlsedge notdown:
and #JOY_DATA_LEFT lda controlsedge
bne notleft and #JOY_DATA_LEFT
lda cursor bne notleft
beq notleft lda cursor
dec cursor beq notleft
notleft:lda controlsedge dec cursor
and #JOY_DATA_RIGHT notleft:
bne notright lda controlsedge
lda cursor and #JOY_DATA_RIGHT
cmp #40 bne notright
beq notright lda cursor
inc cursor cmp #40
notright:lda controlsedge beq notright
and #JOY_DATA_START inc cursor
bne notstart notright:
lda #0 lda controlsedge
sta AUDIO_BASE and #JOY_DATA_START
sta AUDIO_BASE+1 bne notstart
sta AUDIO_BASE+2 lda #0
sta AUDIO_BASE+3 sta AUDIO_BASE
sta AUDIO_BASE+4 sta AUDIO_BASE+1
sta AUDIO_BASE+5 sta AUDIO_BASE+2
sta AUDIO_BASE+6 sta AUDIO_BASE+3
sta AUDIO_BASE+8 sta AUDIO_BASE+4
sta AUDIO_BASE+9 sta AUDIO_BASE+5
sta AUDIO_BASE+10 sta AUDIO_BASE+6
sta AUDIO_BASE+11 sta AUDIO_BASE+8
sta AUDIO_BASE+12 sta AUDIO_BASE+9
sta AUDIO_BASE+13 sta AUDIO_BASE+10
sta AUDIO_BASE+7 sta AUDIO_BASE+11
notstart:lda controlsedge sta AUDIO_BASE+12
and #JOY_DATA_SELECT sta AUDIO_BASE+13
bne notselect sta AUDIO_BASE+7
lda editbuffer1 notstart:
sta AUDIO_BASE lda controlsedge
lda editbuffer1+1 and #JOY_DATA_SELECT
sta AUDIO_BASE+1 bne notselect
lda editbuffer1+2 lda editbuffer1
sta AUDIO_BASE+2 sta AUDIO_BASE
lda editbuffer1+3 lda editbuffer1+1
sta AUDIO_BASE+3 sta AUDIO_BASE+1
lda editbuffer1+4 lda editbuffer1+2
sta AUDIO_BASE+4 sta AUDIO_BASE+2
lda editbuffer1+5 lda editbuffer1+3
sta AUDIO_BASE+5 sta AUDIO_BASE+3
lda editbuffer1+6 lda editbuffer1+4
sta AUDIO_BASE+6 sta AUDIO_BASE+4
lda editbuffer2 lda editbuffer1+5
sta AUDIO_BASE+8 sta AUDIO_BASE+5
lda editbuffer2+1 lda editbuffer1+6
sta AUDIO_BASE+9 sta AUDIO_BASE+6
lda editbuffer2+2 lda editbuffer2
sta AUDIO_BASE+10 sta AUDIO_BASE+8
lda editbuffer2+3 lda editbuffer2+1
sta AUDIO_BASE+11 sta AUDIO_BASE+9
lda editbuffer2+4 lda editbuffer2+2
sta AUDIO_BASE+12 sta AUDIO_BASE+10
lda editbuffer2+5 lda editbuffer2+3
sta AUDIO_BASE+13 sta AUDIO_BASE+11
lda editbuffer1+7 lda editbuffer2+4
sta AUDIO_BASE+7 sta AUDIO_BASE+12
notselect:lda controlsedge lda editbuffer2+5
and #JOY_DATA_FIRE_A sta AUDIO_BASE+13
bne notbuttona lda editbuffer1+7
ldy #0 sta AUDIO_BASE+7
ldy #0 notselect:
writea:lda editbuffer1,y lda controlsedge
sta (writeaddr),y and #JOY_DATA_FIRE_A
bne notbuttona
ldy #0
ldy #0
writea:
lda editbuffer1,y
sta (writeaddr),y
iny iny
cpy #8 cpy #8
bne writea bne writea
writeb:lda editbuffer2-8,y writeb:
sta (writeaddr),y lda editbuffer2-8,y
sta (writeaddr),y
iny iny
cpy #16 cpy #16
bne writeb bne writeb
notbuttona:lda controlsedge notbuttona:
and #JOY_DATA_FIRE_B lda controlsedge
bne notbuttonb and #JOY_DATA_FIRE_B
ldy #0 bne notbuttonb
reada:lda (readaddr),y ldy #0
sta editbuffer1,y reada:
lda (readaddr),y
sta editbuffer1,y
iny iny
cpy #8 cpy #8
bne reada bne reada
readb:lda (readaddr),y
sta editbuffer2-8,y readb: lda (readaddr),y
sta editbuffer2-8,y
iny iny
cpy #16 cpy #16
bne readb bne readb
notbuttonb: notbuttonb:
lda JOY_DATA lda JOY_DATA
sta controlslast sta controlslast
rts rts
.endproc .endproc
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.proc printstring .proc printstring
sta psa sta psa
stx psa+1 stx psa+1
ldx #0 ldx #0
stx psx stx psx
sty psy sty psy
printstring2: printstring2:
ldy #0 ldy #0
lda (psa),y lda (psa),y
beq printstring1 beq printstring1
ldx psx ldx psx
stx LCD_X stx LCD_X
ldy psy ldy psy
sty LCD_Y sty LCD_Y
jsr printsign jsr printsign
inc psx inc psx
lda psa lda psa
clc clc
adc #1 adc #1
sta psa sta psa
lda psa+1 lda psa+1
adc #0 adc #0
sta psa+1 sta psa+1
jmp printstring2 jmp printstring2
printstring1: printstring1:
rts rts
.endproc .endproc
.proc printstringy .proc printstringy
sta psa sta psa
stx psa+1 stx psa+1
printstring2: printstring2:
ldy #0 ldy #0
lda (psa),y lda (psa),y
beq printstring1 beq printstring1
jsr printsign jsr printsign
lda psa lda psa
clc clc
adc #1 adc #1
sta psa sta psa
lda psa+1 lda psa+1
adc #0 adc #0
sta psa+1 sta psa+1
jmp printstring2 jmp printstring2
printstring1: printstring1:
rts rts
.endproc .endproc
@ -384,57 +401,56 @@ printstring1:
lsr lsr
lsr lsr
lsr lsr
and #$0f and #$0f
stx temp_x stx temp_x
tax tax
lda hex2asc,x lda hex2asc,x
ldx temp_x ldx temp_x
stx LCD_X stx LCD_X
sty LCD_Y sty LCD_Y
jsr printsign jsr printsign
pla pla
and #$0f and #$0f
inx inx
stx temp_x stx temp_x
tax tax
lda hex2asc,x lda hex2asc,x
ldx temp_x ldx temp_x
stx LCD_X stx LCD_X
sty LCD_Y sty LCD_Y
jmp printsign jmp printsign
.endproc .endproc
.proc printsign .proc printsign
sty temp_y sty temp_y
stx temp_x stx temp_x
sta temp_a sta temp_a
lda temp_a lda temp_a
sta addr sta addr
lda #0 lda #0
sta addr+1 sta addr+1
asl addr asl addr
rol addr+1 rol addr+1
asl addr asl addr
rol addr+1 rol addr+1
asl addr asl addr
rol addr+1 rol addr+1
lda addr lda addr
clc clc
adc #<chars adc #<chars
sta addr sta addr
lda addr+1 lda addr+1
adc #>chars adc #>chars
sta addr+1 sta addr+1
ldx #8 ldx #8
ldy #0 ldy #0
printsign1: printsign1:
lda (addr),y lda (addr),y
sta LCD_DATA sta LCD_DATA
iny iny
dex dex
bne printsign1 bne printsign1
ldx temp_x ldx temp_x
ldy temp_y ldy temp_y
rts rts
.endproc .endproc

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@ -1,35 +1,39 @@
;
; original lcdtest.s by PeT (mess@utanet.at) ; original lcdtest.s by PeT (mess@utanet.at)
;
; cl65 -t gamate -o lcdtest.bin lcdtest.s
;
.include "gamate.inc" .include "gamate.inc"
.zeropage .zeropage
addr: .word 0 addr: .word 0
psa: .word 0 psa: .word 0
.data .bss
temp_x: .byte 0 temp_x: .byte 0
temp_y: .byte 0 temp_y: .byte 0
temp_a: .byte 0 temp_a: .byte 0
irq_count: .byte 0 irq_count: .byte 0
nmi_count: .byte 0 nmi_count: .byte 0
psx: .byte 0 psx: .byte 0
psy: .byte 0 psy: .byte 0
count: .word 0 count: .word 0
counted: .word 0 counted: .word 0
xpos: .byte 0 xpos: .byte 0
ypos: .byte 0 ypos: .byte 0
.code .rodata
chars: chars: .incbin "cga2.chr"
.incbin "cga2.chr"
hex2asc: .byte "0123456789abcdef" hex2asc: .byte "0123456789abcdef"
format: .byte "IrqNmiCountXposYpos", 0 format: .byte "IrqNmiCountXposYpos", 0
xdesc: .byte "0123456789abcdefghijklmnopqrstuv", 0 xdesc: .byte "0123456789abcdefghijklmnopqrstuv", 0
ydesc: .byte "0123456789ABCDEFGHIJKLMNOPQRSTUV", 0 ydesc: .byte "0123456789ABCDEFGHIJKLMNOPQRSTUV", 0
.code
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.export IRQStub, NMIStub .export IRQStub, NMIStub
@ -57,278 +61,295 @@ ydesc: .byte "0123456789ABCDEFGHIJKLMNOPQRSTUV", 0
.export Start .export Start
.proc Start .proc Start
sei
lda #0
sta ZP_IRQ_CTRL
lda #0 lda #0
sta LCD_XPOS sta LCD_XPOS
sta LCD_YPOS sta LCD_YPOS
cli cli
lda #LCD_MODE_INC_Y lda #LCD_MODE_INC_Y
sta LCD_MODE sta LCD_MODE
lda #0 lda #0
sta LCD_X sta LCD_X
lda #<xdesc lda #<xdesc
ldx #>xdesc ldx #>xdesc
ldy #0 ldy #0
jsr printstring jsr printstring
lda #LCD_XPOS_PLANE2 lda #LCD_XPOS_PLANE2
sta LCD_X sta LCD_X
lda #<xdesc lda #<xdesc
ldx #>xdesc ldx #>xdesc
ldy #128 ldy #128
jsr printstring jsr printstring
lda #0 lda #0
sta LCD_X sta LCD_X
lda #<ydesc lda #<ydesc
ldx #>ydesc ldx #>ydesc
ldy #0 ldy #0
sty LCD_Y sty LCD_Y
jsr printstringy jsr printstringy
; lda #$90;(LCD_XPOS_PLANE2|(128/8)) lda #(LCD_XPOS_PLANE2|(128/8)) ; ???
lda #(LCD_XPOS_PLANE2|(128/8)) sta LCD_X
sta LCD_X lda #<ydesc
lda #<ydesc ldx #>ydesc
ldx #>ydesc ldy #0
ldy #0 sty LCD_Y
sty LCD_Y jsr printstringy
jsr printstringy
lda #<format lda #<format
ldx #>format ldx #>format
ldy #8 ldy #8
jsr printstring jsr printstring
lda #0 lda #0
sta LCD_MODE sta LCD_MODE
lda #24/8 lda #24/8
sta LCD_X sta LCD_X
lda #24 lda #24
sta LCD_Y sta LCD_Y
lda #'X' lda #'X'
jsr printsign jsr printsign
lda #$80
sta LCD_MODE
lda #32/8
sta LCD_X
lda #32
sta LCD_Y
lda #'Y'
jsr printsign
lda #$c0
sta LCD_MODE
lda #40/8
sta LCD_X
lda #40
sta LCD_Y
lda #'Z'
jsr printsign
lda #0 lda #$80
sta LCD_MODE sta LCD_MODE
lda #LCD_XPOS_PLANE2|(48/8) lda #32/8
sta LCD_X sta LCD_X
lda #48 lda #32
sta LCD_Y sta LCD_Y
lda #'x' lda #'Y'
jsr printsign jsr printsign
lda #$80
sta LCD_MODE
lda #(LCD_XPOS_PLANE2|(56/8))
sta LCD_X
lda #56
sta LCD_Y
lda #'y'
jsr printsign
lda #$c0
sta LCD_MODE
lda #(LCD_XPOS_PLANE2|(64/8))
sta LCD_X
lda #64
sta LCD_Y
lda #'z'
jsr printsign
lda #LCD_MODE_INC_Y|1 lda #$c0
sta LCD_MODE sta LCD_MODE
lda #16/8 lda #40/8
sta LCD_X sta LCD_X
lda #72 lda #40
sta LCD_Y sta LCD_Y
lda #'V' lda #'Z'
jsr printsign jsr printsign
lda #LCD_MODE_INC_Y|2
sta LCD_MODE
lda #24/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #LCD_MODE_INC_Y|4
sta LCD_MODE
lda #32/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #LCD_MODE_INC_Y|8
sta LCD_MODE
lda #40/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #0
sta LCD_MODE
lda #LCD_XPOS_PLANE2|(48/8)
sta LCD_X
lda #48
sta LCD_Y
lda #'x'
jsr printsign
lda #1 lda #$80
sta ZP_NMI_ENABLE sta LCD_MODE
lda #(LCD_XPOS_PLANE2|(56/8))
sta LCD_X
lda #56
sta LCD_Y
lda #'y'
jsr printsign
loop: lda count lda #$c0
sta LCD_MODE
lda #(LCD_XPOS_PLANE2|(64/8))
sta LCD_X
lda #64
sta LCD_Y
lda #'z'
jsr printsign
lda #LCD_MODE_INC_Y|1
sta LCD_MODE
lda #16/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #LCD_MODE_INC_Y|2
sta LCD_MODE
lda #24/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #LCD_MODE_INC_Y|4
sta LCD_MODE
lda #32/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #LCD_MODE_INC_Y|8
sta LCD_MODE
lda #40/8
sta LCD_X
lda #72
sta LCD_Y
lda #'V'
jsr printsign
lda #1
sta ZP_IRQ_CTRL
loop:
lda count
clc clc
adc #1 adc #1
sta count sta count
lda count+1 lda count+1
adc #1 adc #0
sta count+1 sta count+1
lda irq_count
cmp irq_count
beq loop
jsr inputs lda irq_count
lda #LCD_MODE_INC_Y cmp irq_count
sta LCD_MODE beq loop
jsr printy
jsr inputs
lda #LCD_MODE_INC_Y
sta LCD_MODE
jsr printy
jmp loop jmp loop
.endproc .endproc
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.proc printy .proc printy
ldx #0 ldx #0
ldy #16 ldy #16
lda irq_count lda irq_count
jsr printhex jsr printhex
ldx #3 ldx #3
ldy #16 ldy #16
lda nmi_count lda nmi_count
jsr printhex jsr printhex
ldx #6 ldx #6
ldy #16 ldy #16
lda counted+1 lda counted+1
jsr printhex jsr printhex
ldx #8 ldx #8
ldy #16 ldy #16
lda counted lda counted
jsr printhex jsr printhex
ldx #11 ldx #11
ldy #16 ldy #16
lda xpos lda xpos
jsr printhex jsr printhex
ldx #14 ldx #14
ldy #16 ldy #16
lda ypos lda ypos
jsr printhex jsr printhex
rts rts
.endproc .endproc
.proc inputs .proc inputs
lda JOY_DATA lda JOY_DATA
and #JOY_DATA_UP and #JOY_DATA_UP
bne notup bne notup
dec ypos dec ypos
lda ypos lda ypos
sta LCD_YPOS sta LCD_YPOS
notup:lda JOY_DATA notup:
and #JOY_DATA_DOWN lda JOY_DATA
bne notdown and #JOY_DATA_DOWN
inc ypos bne notdown
lda ypos inc ypos
sta LCD_YPOS lda ypos
notdown:lda JOY_DATA sta LCD_YPOS
and #JOY_DATA_LEFT notdown:
bne notleft lda JOY_DATA
dec xpos and #JOY_DATA_LEFT
lda xpos bne notleft
sta LCD_XPOS dec xpos
notleft:lda JOY_DATA lda xpos
and #JOY_DATA_RIGHT sta LCD_XPOS
bne notright notleft:
inc xpos lda JOY_DATA
lda xpos and #JOY_DATA_RIGHT
sta LCD_XPOS bne notright
notright:lda JOY_DATA inc xpos
and #JOY_DATA_START lda xpos
bne notstart sta LCD_XPOS
notstart:lda JOY_DATA notright:
and #JOY_DATA_SELECT lda JOY_DATA
bne notselect and #JOY_DATA_START
notselect:lda JOY_DATA bne notstart
and #JOY_DATA_FIRE_A notstart:
bne notbuttona lda JOY_DATA
notbuttona:lda JOY_DATA and #JOY_DATA_SELECT
and #JOY_DATA_FIRE_B bne notselect
bne notbuttonb notselect:
notbuttonb:rts lda JOY_DATA
and #JOY_DATA_FIRE_A
bne notbuttona
notbuttona:
lda JOY_DATA
and #JOY_DATA_FIRE_B
bne notbuttonb
notbuttonb:
rts
.endproc .endproc
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
.proc printstring .proc printstring
sta psa sta psa
stx psa+1 stx psa+1
ldx #0 ldx #0
stx psx stx psx
sty psy sty psy
printstring2: printstring2:
ldy #0 ldy #0
lda (psa),y lda (psa),y
beq printstring1 beq printstring1
ldx psx ldx psx
stx LCD_X stx LCD_X
ldy psy ldy psy
sty LCD_Y sty LCD_Y
jsr printsign jsr printsign
inc psx inc psx
lda psa lda psa
clc clc
adc #1 adc #1
sta psa sta psa
lda psa+1 lda psa+1
adc #0 adc #0
sta psa+1 sta psa+1
jmp printstring2 jmp printstring2
printstring1: printstring1:
rts rts
.endproc .endproc
.proc printstringy .proc printstringy
sta psa sta psa
stx psa+1 stx psa+1
printstring2: printstring2:
ldy #0 ldy #0
lda (psa),y lda (psa),y
beq printstring1 beq printstring1
jsr printsign jsr printsign
lda psa lda psa
clc clc
adc #1 adc #1
sta psa sta psa
lda psa+1 lda psa+1
adc #0 adc #0
sta psa+1 sta psa+1
jmp printstring2 jmp printstring2
printstring1: printstring1:
rts rts
.endproc .endproc
@ -340,24 +361,24 @@ printstring1:
lsr lsr
lsr lsr
lsr lsr
and #$0f and #$0f
stx temp_x stx temp_x
tax tax
lda hex2asc,x lda hex2asc,x
ldx temp_x ldx temp_x
stx LCD_X stx LCD_X
sty LCD_Y sty LCD_Y
jsr printsign jsr printsign
pla pla
and #$0f and #$0f
inx inx
stx temp_x stx temp_x
tax tax
lda hex2asc,x lda hex2asc,x
ldx temp_x ldx temp_x
stx LCD_X stx LCD_X
sty LCD_Y sty LCD_Y
jmp printsign jmp printsign
.endproc .endproc
.proc printsign .proc printsign