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Adjustments per most feedback on cc65 PR 831
(I appreciate the feedback!)
This commit is contained in:
Bill Kendrick
parent
5ee3c88017
commit
d52af69d69
@ -66,10 +66,12 @@ struct __antic {
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/* Inverted (upside-down) characters */
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#define CHACTL_CHAR_NORMAL 0x00
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#define CHACTL_CHAR_INVERTED 0x04
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/* Inverse (reverse-video) characters */
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#define CHACTL_INV_TRANS 0x00 /* chars with high-bit shown */
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#define CHACTL_INV_OPAQUE 0x01 /* chars with high-bit appear as space */
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#define CHACTL_INV_PRESENT 0x02 /* chars with high-bit are reverse-video */
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/* N.B. Default is "CHACTL_CHAR_NORMAL | CHACTL_INV_PRESENT", aka decimal 2 */
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@ -161,15 +163,11 @@ struct __antic {
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/* Modifiers to mode lines */
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#define DL_HSCROL(x) ((unsigned char)((x) | 16)) /* enable smooth horizontal scrolling on this line; see HSCROL */
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#define DL_VSCROL(x) ((unsigned char)((x) | 32)) /* enable smooth vertical scrolling on this line; see VSCROL */
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#define DL_LMS(x) ((unsigned char)((x) | 64)) /* Load Memory Scan (next two bytes must be the LSB/MSB of the data to load */
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#define DL_LMS(x) ((unsigned char)((x) | 64)) /* Load Memory Scan (next two bytes must be the LSB/MSB of the data to load) */
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/* General modifier */
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#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line; requires NMIEN set to enable DLIs */
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#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line; requires NMIEN be set to enable DLIs */
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/* Macros for the beginning and end of functions used as Display List Interrupts */
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#define DLI_START asm("pha"); asm("txa"); asm("pha"); asm("tya"); asm("pha");
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#define DLI_END asm("pla"); asm("tay"); asm("pla"); asm("tax"); asm("pla"); asm("rti");
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/* End of _antic.h */
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#endif /* #ifndef __ANTIC_H */
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@ -42,6 +42,7 @@
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/* Define a structure with the PIA register offsets */
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struct __pia {
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unsigned char porta; /* port A data r/w */
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/* Paddle 0-3 triggers (per PORTA bits) */
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#define PORTA_PTRIG3 0x80
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#define PORTA_PTRIG2 0x40
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@ -50,34 +51,38 @@ struct __pia {
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unsigned char portb; /* port B data r/w */
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/* Paddle 4-7 triggers (per PORTB bits); only 400/800 had four controller ports */
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#define PORTB_PTRIG7 0x80
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#define PORTB_PTRIG6 0x40
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#define PORTB_PTRIG5 0x08
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#define PORTB_PTRIG4 0x04
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/* See also: "JOY_xxx_MASK" in "atari.h" */
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/* See also: "JOY_xxx_MASK" in "atari.h" */
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unsigned char pactl; /* port A control */
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unsigned char pbctl; /* port B control */
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#define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */
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/* One equals enable. Set by the OS but available to the user;
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reset on powerup. */
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#define PxCTL_BIT1 0x02 /* "Set to zero" */
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#define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */
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/* One equals PORTA register; zero equals direction control register */
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#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line (turn the cassette on
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or off; zero equals on) */
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#define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */
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/* One equals enable. Set by the OS but available to the user; reset on powerup. */
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#define PxCTL_BIT1 0x02 /* "Set to zero" */
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#define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */
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/* One equals PORTA register; zero equals direction control register */
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#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */
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/* Turn the cassette on or off; zero equals on) */
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#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */
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#define PxCTL_BIT4 0x10 /* "Set to one" */
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#define PxCTL_BIT5 0x20 /* "Set to one" */
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#define PxCTL_BIT6 0x40 /* "Set to zero" */
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#define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */
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/* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB*/
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#define PxCTL_BIT4 0x10 /* "Set to one" */
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#define PxCTL_BIT5 0x20 /* "Set to one" */
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#define PxCTL_BIT6 0x40 /* "Set to zero" */
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#define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */
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/* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. */
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};
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/* End of _pia.h */
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#endif
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@ -70,14 +70,14 @@ struct __pokey_write {
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unsigned char audctl; /* audio control */
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#define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */
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#define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */
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#define AUDCTL_HIGHPASS_CHAN1 0x04 /* Insert high pass filter into channel one, clocked by channel two */
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#define AUDCTL_JOIN_CHAN34 0x08 /* Join channels four and three (16 bit) */
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#define AUDCTL_JOIN_CHAN12 0x10 /* Join channels two and one (16 bit) */
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#define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */
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#define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */
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#define AUDCTL_HIGHPASS_CHAN1 0x04 /* Insert high pass filter into channel one, clocked by channel two */
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#define AUDCTL_JOIN_CHAN34 0x08 /* Join channels four and three (16 bit) */
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#define AUDCTL_JOIN_CHAN12 0x10 /* Join channels two and one (16 bit) */
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#define AUDCTL_CLOCK_CHAN3_179MHZ 0x20 /* Clock channel three with 1.79 MHz */
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#define AUDCTL_CLOCK_CHAN1_179MHZ 0x40 /* Clock channel one with 1.79 MHz */
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#define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */
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#define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */
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unsigned char stimer; /* start pokey timers */
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@ -93,7 +93,7 @@
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/* luminance values go from 0 (black) to 7 (white) */
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/* hue values (these can vary depending on TV standard (NTSC vs PAL), tint potentiometer settings, TV tint settings, emulator palette, etc. */
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/* hue values (these can vary depending on TV standard (NTSC vs PAL), tint potentiometer settings, TV tint settings, emulator palette, etc.) */
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#define HUE_GREY 0
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#define HUE_GOLD 1
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#define HUE_GOLDORANGE 2
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