From d55c271c2a09df8844edc57a84a95f823b1a74ea Mon Sep 17 00:00:00 2001 From: cuz Date: Wed, 25 Jul 2001 21:36:01 +0000 Subject: [PATCH] More shift routines git-svn-id: svn://svn.cc65.org/cc65/trunk@820 b7a2c559-68d2-44c3-8de9-860c34a00d81 --- libsrc/runtime/Makefile | 6 ++++++ libsrc/runtime/aslax4.s | 22 ++++++++++++++++++++++ libsrc/runtime/asleax4.s | 22 ++++++++++++++++++++++ libsrc/runtime/asrax4.s | 28 ++++++++++++++++++++++++++++ libsrc/runtime/asreax3.s | 2 -- libsrc/runtime/asreax4.s | 23 +++++++++++++++++++++++ libsrc/runtime/shrax4.s | 22 ++++++++++++++++++++++ libsrc/runtime/shreax4.s | 21 +++++++++++++++++++++ 8 files changed, 144 insertions(+), 2 deletions(-) create mode 100644 libsrc/runtime/aslax4.s create mode 100644 libsrc/runtime/asleax4.s create mode 100644 libsrc/runtime/asrax4.s create mode 100644 libsrc/runtime/asreax4.s create mode 100644 libsrc/runtime/shrax4.s create mode 100644 libsrc/runtime/shreax4.s diff --git a/libsrc/runtime/Makefile b/libsrc/runtime/Makefile index 1ab6cf9a7..803a31765 100644 --- a/libsrc/runtime/Makefile +++ b/libsrc/runtime/Makefile @@ -17,15 +17,19 @@ OBJS = add.o \ aslax1.o \ aslax2.o \ aslax3.o \ + aslax4.o \ asleax1.o \ asleax2.o \ asleax3.o \ + asleax4.o \ asrax1.o \ asrax2.o \ asrax3.o \ + asrax4.o \ asreax1.o \ asreax2.o \ asreax3.o \ + asreax4.o \ axlong.o \ bneg.o \ bpushbsp.o \ @@ -160,9 +164,11 @@ OBJS = add.o \ shrax1.o \ shrax2.o \ shrax3.o \ + shrax4.o \ shreax1.o \ shreax2.o \ shreax3.o \ + shreax4.o \ staspidx.o \ staspp.o \ staxsp.o \ diff --git a/libsrc/runtime/aslax4.s b/libsrc/runtime/aslax4.s new file mode 100644 index 000000000..13c52731d --- /dev/null +++ b/libsrc/runtime/aslax4.s @@ -0,0 +1,22 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the primary register by 16 +; + + .export aslax4, shlax4 + .importzp tmp1 + +aslax4: +shlax4: stx tmp1 + asl a + rol tmp1 + asl a + rol tmp1 + asl a + rol tmp1 + asl a + rol tmp1 + ldx tmp1 + rts + diff --git a/libsrc/runtime/asleax4.s b/libsrc/runtime/asleax4.s new file mode 100644 index 000000000..b5f172103 --- /dev/null +++ b/libsrc/runtime/asleax4.s @@ -0,0 +1,22 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the 32 bit primary register by 16 +; + + .export asleax4, shleax4 + .importzp sreg, tmp1 + +asleax4: +shleax4: + stx tmp1 + ldx #4 +@L1: asl a + rol tmp1 + rol sreg + rol sreg+1 + dex + bne @L1 + ldx tmp1 + rts + diff --git a/libsrc/runtime/asrax4.s b/libsrc/runtime/asrax4.s new file mode 100644 index 000000000..6365f3b39 --- /dev/null +++ b/libsrc/runtime/asrax4.s @@ -0,0 +1,28 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the primary register by 16 +; + + .export asrax4 + .importzp tmp1 + +asrax4: stx tmp1 + cpx #$80 ; Put bit 7 into carry + ror tmp1 + ror a + ldx tmp1 + cpx #$80 + ror tmp1 + ror a + ldx tmp1 + cpx #$80 + ror tmp1 + ror a + ldx tmp1 + cpx #$80 + ror tmp1 + ror a + ldx tmp1 + rts + diff --git a/libsrc/runtime/asreax3.s b/libsrc/runtime/asreax3.s index 64f005fbf..5f759b2ee 100644 --- a/libsrc/runtime/asreax3.s +++ b/libsrc/runtime/asreax3.s @@ -15,13 +15,11 @@ asreax3: ror sreg ror tmp1 ror a - ldx sreg+1 cpx #$80 ; Get bit 7 into carry ror sreg+1 ror sreg ror tmp1 ror a - ldx sreg+1 cpx #$80 ; Get bit 7 into carry ror sreg+1 ror sreg diff --git a/libsrc/runtime/asreax4.s b/libsrc/runtime/asreax4.s new file mode 100644 index 000000000..577d9ae12 --- /dev/null +++ b/libsrc/runtime/asreax4.s @@ -0,0 +1,23 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the 32 bit primary register by 16 +; + + .export asreax4 + .importzp sreg, tmp1 + +asreax4: + stx tmp1 + ldx sreg+1 + ldy #4 +@L1: cpx #$80 ; Get bit 7 into carry + ror sreg+1 + ror sreg + ror tmp1 + ror a + dey + bne @L1 + ldx tmp1 + rts + diff --git a/libsrc/runtime/shrax4.s b/libsrc/runtime/shrax4.s new file mode 100644 index 000000000..46589e2b1 --- /dev/null +++ b/libsrc/runtime/shrax4.s @@ -0,0 +1,22 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the primary register by 16 +; + + .export shrax4 + .importzp tmp1 + +shrax4: stx tmp1 + lsr tmp1 + ror a + lsr tmp1 + ror a + lsr tmp1 + ror a + lsr tmp1 + ror a + ldx tmp1 + rts + + diff --git a/libsrc/runtime/shreax4.s b/libsrc/runtime/shreax4.s new file mode 100644 index 000000000..802059261 --- /dev/null +++ b/libsrc/runtime/shreax4.s @@ -0,0 +1,21 @@ +; +; Ullrich von Bassewitz, 25.07.2001 +; +; CC65 runtime: Scale the 32 bit primary register by 16 +; + + .export shreax4 + .importzp sreg, tmp1 + +shreax4: + stx tmp1 + ldx #4 +@L1: lsr sreg+1 + ror sreg + ror tmp1 + ror a + dex + bne @L1 + ldx tmp1 + rts +