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Fix uploader implementation to reset IRQ bit for timer 4 (serial) interrupt

This commit is contained in:
Alex Thissen 2024-01-18 17:37:09 +01:00
parent 166a4b25f7
commit d906748691

View File

@ -33,7 +33,7 @@ loop1:
cont1: cont1:
jsr read_byte jsr read_byte
sta (load_ptr2),y sta (load_ptr2),y
sta PALETTE ; feedback ;-) sta PALETTE + 1 ; feedback ;-)
iny iny
bne loop1 bne loop1
inc load_ptr2+1 inc load_ptr2+1
@ -69,6 +69,8 @@ again:
; last action : clear interrupt ; last action : clear interrupt
; ;
exit: exit:
lda #$10
sta INTRST
clc clc
rts rts