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BIT encoding was wrong for the 65SC02 in immidiate addressing mode

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git-svn-id: svn://svn.cc65.org/cc65/trunk@268 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
cuz 2000-08-11 20:15:44 +00:00
parent 3b2f6679b5
commit ebed04f6b2
2 changed files with 5 additions and 2 deletions
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2
src/ca65/instr.c
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@ -149,7 +149,7 @@ static const struct {
{ "BCC", 0x0020000, 0x90, 0, PutPCRel8 },
{ "BCS", 0x0020000, 0xb0, 0, PutPCRel8 },
{ "BEQ", 0x0020000, 0xf0, 0, PutPCRel8 },
{ "BIT", 0x080006C, 0x00, 2, PutAll },
{ "BIT", 0x0A0006C, 0x00, 2, PutAll },
{ "BMI", 0x0020000, 0x30, 0, PutPCRel8 },
{ "BNE", 0x0020000, 0xd0, 0, PutPCRel8 },
{ "BPL", 0x0020000, 0x10, 0, PutPCRel8 },

5
src/ca65/instr.h
View File

@ -82,7 +82,10 @@ enum CPUType {
#define AM_REL_LONG 0x00040000UL
#define AM_STACK_REL 0x00080000UL
#define AM_STACK_REL_IND_Y 0x00100000UL
#define AM_IMM 0x00E00000UL
#define AM_IMM_ACCU 0x00200000UL
#define AM_IMM_INDEX 0x00400000UL
#define AM_IMM_IMPLICIT 0x00800000UL
#define AM_IMM (AM_IMM_ACCU | AM_IMM_INDEX | AM_IMM_IMPLICIT)
#define AM_BLOCKMOVE 0x01000000UL
/* Bitmask for all ZP operations that have correspondent ABS ops */