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Remove all indexed accesses to SCC registers

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Some IIgs models had issues sending bytes out.
Also make channel tests clearer.
This commit is contained in:
Colin Leroy-Mira 2023-11-23 20:01:47 +01:00 committed by Oliver Schmidt
parent d7d1d89698
commit f1b0fbebd5
1 changed files with 31 additions and 8 deletions
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39
libsrc/apple2/ser/a2.gs.s
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@ -154,6 +154,11 @@ SCCBDATA := $C03A
SER_FLAG := $E10104 SER_FLAG := $E10104
; ------------------------------------------------------------------------
; Channels
CHANNEL_B = 0
CHANNEL_A = 1
; ------------------------------------------------------------------------ ; ------------------------------------------------------------------------
; Write registers, read registers, and values that interest us ; Write registers, read registers, and values that interest us
@ -377,7 +382,7 @@ SER_OPEN:
ldy #WR_TX_RX_CTRL ; Setup stop & parity bits ldy #WR_TX_RX_CTRL ; Setup stop & parity bits
jsr writeSCCReg jsr writeSCCReg
cpx #$00 cpx #CHANNEL_B
bne ClockA bne ClockA
ClockB: ClockB:
ldy #WR_CLOCK_CTRL ldy #WR_CLOCK_CTRL
@ -470,7 +475,7 @@ BaudOK:
lda SER_FLAG ; Get SerFlag's current value lda SER_FLAG ; Get SerFlag's current value
sta SerFlagOrig ; and save it sta SerFlagOrig ; and save it
cpx #$00 cpx #CHANNEL_B
bne IntA bne IntA
IntB: IntB:
ora #SER_FLAG_CH_B ; Inform firmware we want channel B IRQs ora #SER_FLAG_CH_B ; Inform firmware we want channel B IRQs
@ -568,7 +573,8 @@ SER_PUT:
SER_STATUS: SER_STATUS:
ldx Channel ldx Channel
lda SCCBREG,x ldy #RR_INIT_STATUS
jsr readSSCReg
ldx #$00 ldx #$00
sta (ptr1) sta (ptr1)
.assert SER_ERR_OK = 0, error .assert SER_ERR_OK = 0, error
@ -617,7 +623,12 @@ SER_IRQ:
beq CheckSpecial beq CheckSpecial
ldx Channel ldx Channel
lda SCCBDATA,x ; Get byte beq ReadBdata
lda SCCADATA
bra ReadDone
ReadBdata:
lda SCCBDATA ; Get byte
ReadDone:
ldx RecvFreeCnt ; Check if we have free space left ldx RecvFreeCnt ; Check if we have free space left
beq Flow ; Jump if no space in receive buffer beq Flow ; Jump if no space in receive buffer
ldy RecvTail ; Load buffer pointer ldy RecvTail ; Load buffer pointer
@ -678,7 +689,13 @@ Special:ldx Channel
rts rts
BadChar: BadChar:
lda SCCBDATA,x ; Remove char in error cpx #CHANNEL_B
beq BadCharB
lda SCCADATA
bra BadCharDone
BadCharB:
lda SCCBDATA ; Remove char in error
BadCharDone:
sec sec
rts rts
@ -695,7 +712,8 @@ Again: lda SendFreeCnt ; Anything to send?
bne Quit ; Bail out if it is bne Quit ; Bail out if it is
Wait: Wait:
lda SCCBREG,x ; Check that we're ready to send ldy #RR_INIT_STATUS
jsr readSSCReg ; Check that we're ready to send
tay tay
and #INIT_STATUS_READY and #INIT_STATUS_READY
beq NotReady beq NotReady
@ -712,8 +730,13 @@ Quit: rts
Send: ldy SendHead ; Send byte Send: ldy SendHead ; Send byte
lda SendBuf,y lda SendBuf,y
sta SCCBDATA,x cpx #CHANNEL_B
beq WriteBdata
sta SCCADATA
bra WriteDone
WriteBdata:
sta SCCBDATA
WriteDone:
inc SendHead inc SendHead
inc SendFreeCnt inc SendFreeCnt
jmp Again ; Continue flushing TX buffer jmp Again ; Continue flushing TX buffer