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initial import, completely untested, does not compile yet

This commit is contained in:
mrdudz 2014-11-29 14:18:48 +01:00
parent fed3179d3b
commit faccc5a3d6
23 changed files with 1974 additions and 0 deletions

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@ -24,6 +24,7 @@ TARGETS = apple2 \
$(GEOS) \
lynx \
nes \
pcengine \
sim6502 \
sim65c02 \
supervision

67
libsrc/pcengine/_heap.s Normal file
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;
; Ullrich von Bassewitz, 03.06.1998
;
; Heap variables and initialization.
;
; FIXME: there should be a way to configure heap from linkerscript!
.constructor initheap, 24
.import __RAM_START__, __RAM_SIZE__, __STACKSIZE__ ; Linker generated
.import __BSS_SIZE__
.importzp sp
.data
;; old - remove
.export __horg, __hptr, __hend, __hfirst, __hlast
__horg:
.word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
__hptr:
.word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Dito
__hend:
.word __RAM_START__+__RAM_SIZE__
__hfirst:
.word 0
__hlast:
.word 0
.export __heaporg
.export __heapptr
.export __heapend
.export __heapfirst
.export __heaplast
__heaporg:
.word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
__heapptr:
.word __RAM_START__+__BSS_SIZE__+__DATA_SIZE__ ; Linker calculates this symbol
__heapend:
.word __RAM_START__+__RAM_SIZE__
__heapfirst:
.word 0
__heaplast:
.word 0
; Initialization. Will be called from startup!
.code
initheap:
;sec
;lda sp
; lda #<(__STACKSIZE__)
; lda #<(__RAM_START__+__RAM_SIZE__)
lda #<(__RAM_START__+__BSS_SIZE__+__DATA_SIZE__)
sta __heapend
sta __hend ; old
; lda sp+1
; lda #>(__STACKSIZE__)
; lda #>(__RAM_START__+__RAM_SIZE__)
lda #>(__RAM_START__+__BSS_SIZE__+__DATA_SIZE__)
sta __heapend+1
sta __hend+1 ; old
rts

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@ -0,0 +1,17 @@
;
; Screen size variables
;
.export _screensize
_screensize:
ldx xsize
ldy ysize
rts
.rodata
.export xsize, ysize
xsize: .byte 64
ysize: .byte 28

19
libsrc/pcengine/call.s Normal file
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;
; Ullrich von Bassewitz, 06.08.1998
;
; CC65 runtime: call function via pointer in ax
;
.export callax
.code
callax:
sta vec
stx vec+1
jmp (vec) ; jump there
.bss
vec:
.res 2

23
libsrc/pcengine/clock.s Normal file
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;
; Ullrich von Bassewitz, 21.09.1998
;
; clock_t clock (void);
;
.include "pcengine.inc"
.export _clock
.importzp sreg
.proc _clock
ldy #0 ; Byte 3 is always zero
sty sreg+1
sty sreg
ldx _tickcount+1
lda _tickcount
rts
.endproc

27
libsrc/pcengine/clrscr.s Normal file
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.include "pcengine.inc"
.export _clrscr
_clrscr:
st0 #VDC_MAWR
st1 #<$0000
st2 #>$0000
st0 #VDC_VWR
ldy #$40
rowloop: ldx #$80
colloop:
lda #' '
staio VDC_DATA_LO
lda #$02
staio VDC_DATA_HI
dex
bne colloop
dey
bne rowloop
rts

59
libsrc/pcengine/color.s Normal file
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;
; Ullrich von Bassewitz, 06.08.1998
;
; unsigned char __fastcall__ textcolor (unsigned char color);
; unsigned char __fastcall__ bgcolor (unsigned char color);
; unsigned char __fastcall__ bordercolor (unsigned char color);
;
.export _textcolor, _bgcolor, _bordercolor
.include "pcengine.inc"
_textcolor:
ldx CHARCOLOR ; get old value
sta CHARCOLOR ; set new value
txa
rts
_bgcolor:
ldx BGCOLOR ; get old value
sta BGCOLOR ; set new value
asl a
tay
stz VCE_ADDR_LO
stz VCE_ADDR_HI
lda colors,y
sta VCE_DATA_LO
lda colors+1,y
sta VCE_DATA_HI
txa
rts
_bordercolor:
lda #0
txa
rts
.export colors
colors: ; G R B
.word ((0<<6)+(0<<3)+(0)) ; 0 black
.word ((7<<6)+(7<<3)+(7)) ; 1 white
.word ((0<<6)+(7<<3)+(0)) ; 2 red
.word ((7<<6)+(0<<3)+(7)) ; 3 cyan
.word ((0<<6)+(5<<3)+(7)) ; 4 violett
.word ((7<<6)+(0<<3)+(0)) ; 5 green
.word ((0<<6)+(0<<3)+(7)) ; 6 blue
.word ((7<<6)+(7<<3)+(0)) ; 7 yellow
.word ((5<<6)+(7<<3)+(0)) ; 8 orange
.word ((3<<6)+(4<<3)+(3)) ; 9 brown
.word ((4<<6)+(7<<3)+(4)) ; a light red
.word ((3<<6)+(3<<3)+(3)) ; b dark grey
.word ((4<<6)+(4<<3)+(4)) ; c middle grey
.word ((7<<6)+(4<<3)+(4)) ; d light green
.word ((4<<6)+(4<<3)+(7)) ; e light blue
.word ((6<<6)+(6<<3)+(6)) ; f light gray

102
libsrc/pcengine/condes.s Normal file
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;
; Ullrich von Bassewitz, 20.11.2000
;
; CC65 runtime: Support for calling module constructors/destructors
;
; The condes routine must be called with the table address in a/x and the
; size of the table in y. The current implementation limits the table size
; to 254 bytes (127 vectors) but this shouldn't be problem for now and may
; be changed later.
;
; libinit and libdone call condes with the predefined module constructor and
; destructor tables, they must be called from the platform specific startup
; code.
.export initlib, donelib, condes
.import callax
.import __CONSTRUCTOR_TABLE__, __CONSTRUCTOR_COUNT__
.import __DESTRUCTOR_TABLE__, __DESTRUCTOR_COUNT__
.code
; --------------------------------------------------------------------------
; Initialize library modules
.proc initlib
lda #<__CONSTRUCTOR_TABLE__
ldx #>__CONSTRUCTOR_TABLE__
ldy #<(__CONSTRUCTOR_COUNT__*2)
bne condes
rts
.endproc
; --------------------------------------------------------------------------
; Cleanup library modules
.proc donelib
lda #<__DESTRUCTOR_TABLE__
ldx #>__DESTRUCTOR_TABLE__
ldy #<(__DESTRUCTOR_COUNT__*2)
bne condes
rts
.endproc
; --------------------------------------------------------------------------
; Generic table call handler
.proc condes
sta getbyt+1
stx getbyt+2
sty index
loop: ldy index
beq done
dey
jsr getbyt
tax
dey
jsr getbyt
sty index
jsr callax
.ifpc02
bra loop
.else
jmp loop
.endif
done: rts
.endproc
; --------------------------------------------------------------------------
; Data. The getbyte routine is placed in the data segment cause it's patched
; at runtime.
.bss
index: .byte 0
.data
getbyt:
;;getbyt_:
lda $FFFF,y
rts
;; callax doesnt work? why?!
;_callax:
; sta @l+1
; stx @l+2
;@l: jmp $dead

122
libsrc/pcengine/conio.s Normal file
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.include "pcengine.inc"
.import vce_init
.import psg_init
.import vdc_init
.export initconio
.export _conio_init
.constructor initconio, 24
.macpack longbranch
initconio:
;; jsr vdc_init
jsr vce_init
jsr psg_init
jsr conio_init
jsr set_palette
st0 #VDC_RCR
st1 #<$0088
st2 #>$0088
rts
.import colors
set_palette:
; Make palette (use VGA palette?)
; stz VCE_ADDR_LO
; stz VCE_ADDR_HI
; clx
; cly
vce_loop: ;; stx VCE_DATA_LO
;; sty VCE_DATA_HI
; inx
; cpx #$00
; bne vce_loop
; iny
; cpy #$02
; bne vce_loop
stz VCE_ADDR_LO
stz VCE_ADDR_HI
ldx #0
@lp:
.repeat 16
lda colors,x
sta VCE_DATA_LO
lda colors+1,x
sta VCE_DATA_HI
.endrepeat
inx
inx
cpx #16*2;*5
jne @lp
stz VCE_ADDR_LO
stz VCE_ADDR_HI
stz VCE_DATA_LO
stz VCE_DATA_HI
; so it will get linked in
_conio_init:
rts
;----------------------------------------------------------------------------
;
;----------------------------------------------------------------------------
.importzp ptr1
conio_init:
; Load font
st0 #VDC_MAWR
st1 #<$2000
st2 #>$2000
; ptr to font data
lda #<font
sta ptr1
lda #>font
sta ptr1+1
st0 #VDC_VWR ; VWR
ldy #$80 ; 128 chars
charloop: ldx #$08 ; 8 bytes/char
lineloop:
;;lda [$00] ; read font byte
ldaind ptr1
staio VDC_DATA_LO ; bitplane 0
stzio VDC_DATA_HI ; bitplane 1
clc ; increment font pointer
lda ptr1
adc #$01
sta ptr1
lda ptr1+1
adc #$00
sta ptr1+1
dex
bne lineloop ; next bitplane 0 byte
ldx #$08 ; fill bitplane 2/3 with 0
fillloop: st1 #$00
st2 #$00
dex
bne fillloop ; next byte
dey
bne charloop ; next character
ldx #0
stx BGCOLOR
inx
stx CHARCOLOR
rts
.rodata
font: .include "vga.inc"

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libsrc/pcengine/cputc.s Normal file
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;
; Ullrich von Bassewitz, 06.08.1998
;
; void cputcxy (unsigned char x, unsigned char y, char c);
; void cputc (char c);
;
.export _cputcxy, _cputc, cputdirect, putchar
.export newline, plot
.import popa, _gotoxy
.import PLOT
.importzp tmp3,tmp4
.include "pcengine.inc"
_cputcxy:
pha ; Save C
jsr popa ; Get Y
jsr _gotoxy ; Set cursor, drop x
pla ; Restore C
; Plot a character - also used as internal function
_cputc: cmp #$0d ; CR?
bne L1
lda #0
sta CURS_X
beq plot ; Recalculate pointers
L1: cmp #$0a ; LF?
beq newline ; Recalculate pointers
; Printable char of some sort
cputdirect:
jsr putchar ; Write the character to the screen
; Advance cursor position
advance:
ldy CURS_X
iny
cpy #xsize
bne L3
jsr newline ; new line
ldy #0 ; + cr
L3: sty CURS_X
jmp plot
;rts
newline:
; lda #xsize
; clc
; adc SCREEN_PTR
; sta SCREEN_PTR
; bcc L4
; inc SCREEN_PTR+1
;; clc
;L4:; lda #xsize
; adc CRAM_PTR
; sta CRAM_PTR
; bcc L5
; inc CRAM_PTR+1
;L5:
inc CURS_Y
; jmp plot
; rts
; Set cursor position, calculate RAM pointers
plot: ldy CURS_X
ldx CURS_Y
clc
jmp PLOT ; Set the new cursor
; Write one character to the screen without doing anything else, return X
; position in Y
putchar:
ora RVS ; Set revers bit
tax
st0 #VDC_MAWR ; Memory Adress Write
lda SCREEN_PTR
staio VDC_DATA_LO
lda SCREEN_PTR+1
staio VDC_DATA_HI
st0 #VDC_VWR ; VWR
txa
staio VDC_DATA_LO ; character
;;st2 #$32 ; attrib ?!
lda CHARCOLOR
;;lda #2
asl a
asl a
asl a
asl a
and #$f0
ora #$02
staio VDC_DATA_HI
rts

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libsrc/pcengine/crt0.s Normal file
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;
; Startup code for cc65 (PCEngine version)
;
; by Groepaz/Hitmen <groepaz@gmx.net>
; based on code by Ullrich von Bassewitz <uz@cc65.org>
;
; This must be the *first* file on the linker command line
;
.export _exit
.import initlib, donelib
.import push0, _main, zerobss
.import initheap
.import tmp1,tmp2,tmp3
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
;; .import __SRAM_START__, __SRAM_SIZE__ ; Linker generated
.import __ROM0_START__, __ROM0_SIZE__ ; Linker generated
.import __ROM_START__, __ROM_SIZE__ ; Linker generated
.import __STARTUP_LOAD__,__STARTUP_RUN__, __STARTUP_SIZE__ ; Linker generated
.import __CODE_LOAD__,__CODE_RUN__, __CODE_SIZE__ ; Linker generated
.import __RODATA_LOAD__,__RODATA_RUN__, __RODATA_SIZE__ ; Linker generated
.import __DATA_LOAD__,__DATA_RUN__, __DATA_SIZE__ ; Linker generated
.import __BSS_SIZE__
.include "pcengine.inc"
.importzp sp
.importzp ptr1,ptr2
; ------------------------------------------------------------------------
; Create an empty LOWCODE segment to avoid linker warnings
.segment "LOWCODE"
; ------------------------------------------------------------------------
; Place the startup code in a special segment.
.segment "STARTUP"
start:
; setup the CPU and System-IRQ
; Initialize CPU
sei
nop
csh
nop
cld
nop
; Setup stack and memory mapping
ldx #$FF ; Stack top ($21FF)
txs
txa
tam #0 ; 0000-1FFF = Hardware page
lda #$F8
tam #1 ; 2000-3FFF = Work RAM
lda #$F7
tam #2 ; 4000-5FFF = Save RAM
lda #1
tam #3 ; 6000-7FFF Page 2
lda #2
tam #4 ; 8000-9FFF Page 3
lda #3
tam #5 ; A000-BFFF Page 4
lda #4
tam #6 ; C000-DFFF Page 5
; Initialize hardware
stz TIMER_COUNT ; Timer off
lda #$07
sta IRQ_MASK ; Interrupts off
stz IRQ_STATUS ; Acknowledge timer
; Clear work RAM
stz <$00
tii $2000, $2001, $1FFF
;; i dont know why the heck this one doesnt
;; work when called from a constructor :/
.import vdc_init
jsr vdc_init
;; jsr joy_init
; Turn on background and VD interrupt/IRQ1
lda #$05
sta IRQ_MASK ; IRQ1=on
cli
; Clear the BSS data
jsr zerobss
; Copy the .data segment to RAM
lda #<(__DATA_LOAD__)
;;lda #<(__ROM0_START__ + __STARTUP_SIZE__+ __CODE_SIZE__+ __RODATA_SIZE__)
;;lda #<(__ROM_START__ + __CODE_SIZE__+ __RODATA_SIZE__)
sta ptr1
lda #>(__DATA_LOAD__)
;;lda #>(__ROM_START__ + __CODE_SIZE__+ __RODATA_SIZE__)
sta ptr1+1
lda #<(__DATA_RUN__)
;;lda #<(__SRAM_START__)
sta ptr2
lda #>(__DATA_RUN__)
;;lda #>(__SRAM_START__)
sta ptr2+1
ldx #>(__DATA_SIZE__)
@l2:
beq @s1 ; no more full pages
; copy one page
ldy #0
@l1:
lda (ptr1),y
sta (ptr2),y
iny
bne @l1
inc ptr1+1
inc ptr2+1
dex
bne @l2
; copy remaining bytes
@s1:
; copy one page
ldy #0
@l3:
lda (ptr1),y
sta (ptr2),y
iny
cpy #<(__DATA_SIZE__)
bne @l3
; setup the stack
; lda #<(__RAM_START__ + __DATA_SIZE__ + __BSS_SIZE__)
lda #<(__RAM_START__+__RAM_SIZE__)
sta sp
; lda #>(__RAM_START__ + __DATA_SIZE__ + __BSS_SIZE__)
lda #>(__RAM_START__+__RAM_SIZE__)
sta sp+1 ; Set argument stack ptr
; Init the Heap
jsr initheap
;jmp *
; Call module constructors
jsr initlib
; .import initconio
; jsr initconio
; Pass an empty command line
;jmp *
jsr push0 ; argc
jsr push0 ; argv
go:
ldy #4 ; Argument size
jsr _main ; call the users code
; Call module destructors. This is also the _exit entry.
_exit:
jsr donelib ; Run module destructors
; reset the PCEngine
jmp start
; ------------------------------------------------------------------------
; System V-Blank Interupt
; ------------------------------------------------------------------------
_irq1:
pha
phx
phy
inc _tickcount
bne @s
inc _tickcount+1
@s:
; Acknowlege interrupt
ldaio VDC_CTRL
ply
plx
pla
rti
_irq2:
rti
_nmi:
rti
_timer:
stz IRQ_STATUS
rti
.export initmainargs
initmainargs:
rts
; ------------------------------------------------------------------------
; hardware vectors
; ------------------------------------------------------------------------
.segment "VECTORS"
;;.org $fff6
.word _irq2 ; $fff6 IRQ2 (External IRQ, BRK)
.word _irq1 ; $fff8 IRQ1 (VDC)
.word _timer ; $fffa Timer
.word _nmi ; $fffc NMI
.word start ; $fffe reset

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libsrc/pcengine/huc6280.inc Normal file
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;
; HuC6280 additional opcodes (use with --cpu 65C02)
;
; WARNING: THIS IS __NOT__ COMPLETE !!!
;
;; lda abs
.macro ldaio arg1
.byte $ad
.word arg1
.endmacro
;; sta abs
.macro staio arg1
.byte $8d
.word arg1
.endmacro
.macro stzio arg1
.byte $9c
.word arg1
.endmacro
.macro cla
.byte $62
.endmacro
.macro clx
.byte $82
.endmacro
;; lda (zp)
.macro ldaind arg1
.byte $b2
.byte arg1
.endmacro
.macro cly
.byte $c2
.endmacro
.macro st0 arg1
.if (.match (.left (1, arg1), #))
; called with immidiate operand
.byte $03
.byte (.right (.tcount (arg1)-1, arg1))
.else
.error "illegal address mode"
.endif
.endmacro
.macro st1 arg1
.if (.match (.left (1, arg1), #))
; called with immidiate operand
.byte $13
.byte (.right (.tcount (arg1)-1, arg1))
.else
.error "illegal address mode"
.endif
.endmacro
.macro st2 arg1
.if (.match (.left (1, arg1), #))
; called with immidiate operand
.byte $23
.byte (.right (.tcount (arg1)-1, arg1))
.else
.error "illegal address mode"
.endif
.endmacro
; tam #$xx
.macro tam arg1
.if (.match (.left (1, arg1), #))
; called with immidiate operand
.byte $53
.byte 1<<(.right (.tcount (arg1)-1, arg1))
.else
.error "illegal address mode"
.endif
.endmacro
; tii x,y,z
.macro tii arg1,arg2,arg3
.byte $73
.word arg1,arg2,arg3
.endmacro
.macro csh
.byte $d4
.endmacro
.macro set
.byte $f4
.endmacro
.macro _rmb0 arg1
.byte $07
.byte arg1
.endmacro
.macro _rmb1 arg1
.byte $17
.byte arg1
.endmacro
.macro _rmb2 arg1
.byte $27
.byte arg1
.endmacro
.macro _rmb3 arg1
.byte $37
.byte arg1
.endmacro
.macro _rmb4 arg1
.byte $47
.byte arg1
.endmacro
.macro _rmb5 arg1
.byte $57
.byte arg1
.endmacro
.macro _rmb6 arg1
.byte $67
.byte arg1
.endmacro
.macro _rmb7 arg1
.byte $77
.byte arg1
.endmacro
.macro _smb0 arg1
.byte $87
.byte arg1
.endmacro
.macro _smb1 arg1
.byte $97
.byte arg1
.endmacro
.macro _smb2 arg1
.byte $a7
.byte arg1
.endmacro
.macro _smb3 arg1
.byte $b7
.byte arg1
.endmacro
.macro _smb4 arg1
.byte $c7
.byte arg1
.endmacro
.macro _smb5 arg1
.byte $d7
.byte arg1
.endmacro
.macro _smb6 arg1
.byte $e7
.byte arg1
.endmacro
.macro _smb7 arg1
.byte $f7
.byte arg1
.endmacro
.macro _bbr0 arg1,arg2
.byte $0f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs0 arg1,arg2
.byte $8f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr1 arg1,arg2
.byte $1f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs1 arg1,arg2
.byte $9f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr2 arg1,arg2
.byte $2f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs2 arg1,arg2
.byte $af ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr3 arg1,arg2
.byte $3f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs3 arg1,arg2
.byte $bf ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr4 arg1,arg2
.byte $4f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs4 arg1,arg2
.byte $cf ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr5 arg1,arg2
.byte $5f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs5 arg1,arg2
.byte $df ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr6 arg1,arg2
.byte $6f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs6 arg1,arg2
.byte $ef ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbr7 arg1,arg2
.byte $7f ;;,arg1
.byte arg1
.byte <((arg2)-(*+1))
.endmacro
.macro _bbs7 arg1,arg2
.byte $ff
.byte arg1
.byte <((arg2)-(*+1))
.endmacro

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libsrc/pcengine/joytokbd.s Normal file
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;
; File generated by cc65 v 2.9.5
;
.fopt compiler,"cc65 v 2.9.5"
.autoimport on
.case on
.debuginfo off
.importzp sp, sreg, regsave, regbank, tmp1, ptr1, ptr2
.macpack longbranch
.import _joy_masks
.import _joy_read
.import _clock
.export _kbhit
.export _cgetc
.segment "DATA"
__lastkey:
.byte $00
__chardelay:
.dword $00000000
_rptkey:
.byte $00
; ---------------------------------------------------------------
; void _getkey (void)
; ---------------------------------------------------------------
.segment "CODE"
.proc __getkey
.segment "CODE"
jsr decsp2
ldx #$00
lda __lastkey
cmp #$00
jsr booleq
jeq L003F
lda #$00
jsr _joy_read
ldy #$01
sta (sp),y
ldx #$00
lda #$00
ldy #$00
sta (sp),y
ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+4
jsr tosandax
stx tmp1
ora tmp1
jeq L0010
ldx #$00
lda #$0A
ldy #$00
sta (sp),y
jmp L003A
L0010: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks
jsr tosandax
stx tmp1
ora tmp1
jeq L0016
ldx #$00
lda #$01
ldy #$00
sta (sp),y
jmp L003A
L0016: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+2
jsr tosandax
stx tmp1
ora tmp1
jeq L001C
ldx #$00
lda #$03
ldy #$00
sta (sp),y
jmp L003A
L001C: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+3
jsr tosandax
stx tmp1
ora tmp1
jeq L0022
ldx #$00
lda #$04
ldy #$00
sta (sp),y
jmp L003A
L0022: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+1
jsr tosandax
stx tmp1
ora tmp1
jeq L0028
ldx #$00
lda #$02
ldy #$00
sta (sp),y
jmp L003A
L0028: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+7
jsr tosandax
stx tmp1
ora tmp1
jeq L002E
ldx #$00
lda #$14
ldy #$00
sta (sp),y
jmp L003A
L002E: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+5
jsr tosandax
stx tmp1
ora tmp1
jeq L0034
ldx #$00
lda #$15
ldy #$00
sta (sp),y
jmp L003A
L0034: ldy #$01
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _joy_masks+6
jsr tosandax
stx tmp1
ora tmp1
jeq L003A
ldx #$00
lda #$16
ldy #$00
sta (sp),y
L003A: ldy #$00
ldx #$00
lda (sp),y
cmp #$00
jsr boolne
jeq L003F
ldy #$00
ldx #$00
lda (sp),y
jsr pushax
ldx #$00
lda _rptkey
jsr toseqax
jeq L0043
lda __chardelay+3
sta sreg+1
lda __chardelay+2
sta sreg
ldx __chardelay+1
lda __chardelay
jsr pusheax
jsr _clock
jsr tosugteax
jeq L0043
jmp L003F
L0043: ldy #$00
ldx #$00
lda (sp),y
sta _rptkey
jsr _clock
ldy #$06
jsr inceaxy
sta __chardelay
stx __chardelay+1
ldy sreg
sty __chardelay+2
ldy sreg+1
sty __chardelay+3
ldy #$00
ldx #$00
lda (sp),y
sta __lastkey
L003F: jsr incsp2
rts
.endproc
; ---------------------------------------------------------------
; unsigned char __fastcall__ kbhit (void)
; ---------------------------------------------------------------
.segment "CODE"
.proc _kbhit
.segment "CODE"
jsr __getkey
ldx #$00
lda __lastkey
cmp #$00
jsr booleq
jeq L004E
ldx #$00
lda #$00
jmp L0052
jmp L0052
L004E: ldx #$00
lda #$01
jmp L0052
L0052: rts
.endproc
; ---------------------------------------------------------------
; unsigned char __fastcall__ cgetc (void)
; ---------------------------------------------------------------
.segment "CODE"
.proc _cgetc
.segment "CODE"
jsr decsp1
L0056: ldx #$00
lda __lastkey
cmp #$00
jsr booleq
jeq L0057
jsr __getkey
jmp L0056
L0057: ldx #$00
lda __lastkey
ldy #$00
sta (sp),y
ldx #$00
lda #$00
sta __lastkey
ldy #$00
ldx #$00
lda (sp),y
jmp L0055
L0055: jsr incsp1
rts
.endproc

41
libsrc/pcengine/kplot.s Normal file
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.export PLOT
.include "pcengine.inc"
PLOT:
bcs @getpos
tya
clc
adc _plotlo,x
sta SCREEN_PTR
lda _plothi,x
adc #0
sta SCREEN_PTR+1
;clc
;adc _colplot,x
;sta CRAM_PTR
;lda #$23
;sta CRAM_PTR+1
@getpos:
ldx CURS_Y
ldy CURS_X
rts
_plotlo:
.repeat screenrows,line
.byte <($0000+(line*$80))
.endrepeat
_plothi:
.repeat screenrows,line
.byte >($0000+(line*$80))
.endrepeat

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;
; Standard joystick driver for the PCEngine
;
; Ullrich von Bassewitz, 2002-12-20
;
;;.include "zeropage.inc"
;;.include "joy-kernel.inc"
;;.include "joy-error.inc"
JOY_ERR_OK=0;
.include "pcengine.inc"
.macpack generic
; ------------------------------------------------------------------------
; Header. Includes jump table
.segment "CODE"
; Driver signature
;; .byte $6A, $6F, $79 ; "joy"
;; .byte $00 ; Driver API version number
; Button state masks (8 values)
;extern const unsigned char joy_masks[8];
.export _joy_masks
_joy_masks:
.byte $10 ; JOY_UP
.byte $40 ; JOY_DOWN
.byte $80 ; JOY_LEFT
.byte $20 ; JOY_RIGHT
.byte $04 ; ? JOY_FIRE
.byte $02 ; ? Future expansion
.byte $01 ; ? Future expansion
.byte $08 ; ? Future expansion
; Jump table.
;; .word INSTALL
;; .word DEINSTALL
;; .word COUNT
;; .word READ
; ------------------------------------------------------------------------
; Constants
JOY_COUNT = 4 ; Number of joysticks we support
; ------------------------------------------------------------------------
; Data.
.code
;extern const char joy_stddrv[];
.export _joy_stddrv
_joy_stddrv:
.byte 0
.export _joy_load_driver
.export _joy_unload
;unsigned char __fastcall__ joy_unload (void);
;unsigned char __fastcall__ joy_load_driver (const char* driver);
_joy_load_driver:
_joy_unload:
; ------------------------------------------------------------------------
; INSTALL routine. Is called after the driver is loaded into memory. If
; possible, check if the hardware is present and determine the amount of
; memory available.
; Must return an JOY_ERR_xx code in a/x.
;
INSTALL:
lda #<JOY_ERR_OK
ldx #>JOY_ERR_OK
; rts ; Run into DEINSTALL instead
; ------------------------------------------------------------------------
; DEINSTALL routine. Is called before the driver is removed from memory.
; Can do cleanup or whatever. Must not return anything.
;
DEINSTALL:
rts
; ------------------------------------------------------------------------
; COUNT: Return the total number of available joysticks in a/x.
;
;unsigned char __fastcall__ joy_count (void);
.export _joy_count
_joy_count:
COUNT:
lda #<JOY_COUNT
ldx #>JOY_COUNT
rts
; ------------------------------------------------------------------------
; READ: Read a particular joystick passed in A.
;
;unsigned char __fastcall__ joy_read (unsigned char joystick);
.export _joy_read
_joy_read:
READ:
pha
jsr read_joy
pla
tax ; Joystick number into X
; return value from buffer
joy1:
lda padbuffer,x
ldx #0
rts
.code
read_joy:
; reset multitap counter
lda #$01
sta $1000
pha
pla
nop
nop
lda #$03
sta $1000
pha
pla
nop
nop
cly
nextpad:
lda #$01
sta $1000 ; sel = 1
pha
pla
nop
nop
lda $1000
asl a
asl a
asl a
asl a
sta padbuffer, y ; store new value
stz $1000
pha
pla
nop
nop
lda $1000
and #$0F
ora padbuffer, y ; second half of new value
eor #$FF
sta padbuffer, y ; store new value
iny
cpy #$05
bcc nextpad
rts
.bss
padbuffer:
.res 4

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#define CH_CROSS 0x10
#define CH_RTEE 0x17
#define CH_LTEE 0x0f
#define CH_ULCORNER 0x10
#define CH_URCORNER 0x10
#define CH_LLCORNER 0x10
#define CH_LRCORNER 0x10
#define TV_NTSC 0
#define TV_PAL 1
#define get_tv() 0
#define CLOCKS_PER_SEC 50 // ???
#define CLK_TCK 50 // ?!?
//#ifndef CH_ENTER
#define CH_ENTER '\n'
//#endif
#define CH_STOP 0x08
#define CH_F1 0x14
#define CH_F3 0x15
#define CH_F5 0x16
#define CH_F7 0x17
#define CH_CURS_UP 0x01
#define CH_CURS_DOWN 0x02
#ifndef CH_CURS_LEFT
#define CH_CURS_LEFT 0x03
#endif
#ifndef CH_CURS_RIGHT
#define CH_CURS_RIGHT 0x04
#endif
#define CH_ESC 8
#define CH_DEL 20
/* Color defines */
#define COLOR_BLACK 0x00
#define COLOR_WHITE 0x01
#define COLOR_RED 0x02
#define COLOR_CYAN 0x03
#define COLOR_VIOLET 0x04
#define COLOR_GREEN 0x05
#define COLOR_BLUE 0x06
#define COLOR_YELLOW 0x07
#define COLOR_ORANGE 0x08
#define COLOR_BROWN 0x09
#define COLOR_LIGHTRED 0x0A
#define COLOR_GRAY1 0x0B
#define COLOR_GRAY2 0x0C
#define COLOR_LIGHTGREEN 0x0D
#define COLOR_LIGHTBLUE 0x0E
#define COLOR_GRAY3 0x0F
#define JOY_FIRE_B 5
#define JOY_START 6
#define JOY_SELECT 7
/*
void __fastcall__ waitvblank(void);
unsigned char __fastcall__ cpeekcharxy(unsigned char x,unsigned char y);
unsigned char __fastcall__ cpeekchar(void);
unsigned char __fastcall__ cpeekcolxy(unsigned char x,unsigned char y);
unsigned char __fastcall__ cpeekcol(void);
*/

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.include "huc6280.inc"
; Write VDC register
.macro VREG arg1,arg2
st0 #arg1
st1 #<(arg2)
st2 #>(arg2)
.endmacro
_tickcount= $20
screenrows = (224/8)
charsperline = (512/8)
xsize = charsperline
CH_HLINE = 7
CH_VLINE = 7
CURS_X = $30
CURS_Y = $31
SCREEN_PTR = $32
CRAM_PTR = $34
CHARCOLOR = $36
RVS = $37
BGCOLOR=$38
; huc6270 - Video Display Controller (vdc)
VDC_MAWR = 0 ; Memory Address Write Register
VDC_MARR = 1 ; Memory Address Read Register
VDC_VWR = 2 ; VRAM Write Register
VDC_VRR = 3 ; VRAM Read Register
VDC_CR = 4 ; Control Register
VDC_RCR = 5 ; Raster Counter Register
VDC_BXR = 6 ; Background X-Scroll Register
VDC_BYR = 7 ; Background Y-Scroll Register
VDC_MWR = 8 ; Memory-access Width Register
VDC_HSR = 9 ; Horizontal Sync Register (?)
VDC_HDR =10 ; Horizontal Display Register (?)
VDC_VPR =11 ; (unknown)
VDC_VDW =12 ; (unknown use)
VDC_VCR =13 ; (unknown use)
VDC_DCR =14 ; (DMA) Control Register
VDC_SOUR =15 ; (DMA) Source Register
VDC_DESR =16 ; (DMA) Destination Register
VDC_LENR =17 ; (DMA) Length Register
VDC_SATB =18 ; Sprite Attribute Table
VDC_CTRL = $0000
VDC_DATA_LO = $0002
VDC_DATA_HI = $0003
; huc6260 - Video Color Encoder (vce)
; The DAC has a palette of 512 colours.
; bitmap of the palette data is this: 0000000gggrrrbbb.
; You can read and write the DAC-registers.
VCE_CTRL = $0400 ; write$00 to reset
VCE_ADDR_LO = $0402 ; LSB of byte offset into palette
VCE_ADDR_HI = $0403 ; MSB of byte offset into palette
VCE_DATA_LO = $0404 ; LSB of 16-bit palette data
VCE_DATA_HI = $0405 ; MSB of 16-bit palette data
TIMER_COUNT = $0c00
TIMER_CTRL = $0c01
JOY_CTRL = $1000
IRQ_MASK = $1402
IRQ_STATUS = $1403
CDR_MEM_DISABLE = $1803
CDR_MEM_ENABLE = $1807

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MEMORY {
ZP: start = $00, size = $1A, type = rw, define = yes;
# INES Cartridge Header
#HEADER: start = $0, size = $10, file = %O ,fill = yes;
# 2 16K ROM Banks
# - startup
# - code
# - rodata
# - data (load)
# 1 8k CHR Bank
ROM0: start = $e000, size = $1ff6, file = %O ,fill = yes, define = yes;
# Hardware Vectors at End of 2nd 8K ROM
ROMV: start = $fff6, size = $a, file = %O,fill = yes;
ROM: start = $6000, size = $8000, file = %O, fill = yes,define=yes;
# standard 2k SRAM (-zeropage)
# $0100-$0200 cpu stack
# $0200-$0500 3 pages for ppu memory write buffer
# $0500-$0800 3 pages for cc65 parameter stack
#SRAM: start = $0500, size = $0300, define = yes;
# additional 8K SRAM Bank
# - data (run)
# - bss
# - heap
# RAM: start = $2200, size = $1000, define = yes;
# RAM2: start = $3200, size = $0e00, define = yes;
RAM: start = $2200, size = $1e00, define = yes;
}
SEGMENTS {
#HEADER: load = HEADER, type = wprot;
#aSTARTUP: load = ROM0, type = wprot, define = yes;
STARTUP: load = ROM0, type = wprot, define = yes;
CODE: load = ROM, type = wprot, define = yes;
RODATA: load = ROM, type = wprot, define = yes;
DATA: load = ROM0, run= RAM, type = rw, define = yes;
# BSS: load = RAM2, type = bss, define = yes;
BSS: load = RAM, type = bss, define = yes;
VECTORS: load = ROMV, type = rw, define = yes;
#CHARS: load = ROM2, type = rw;
ZEROPAGE: load = ZP, type = zp, define = yes;
}
FEATURES {
CONDES: segment = STARTUP,
type=constructor,
label=__CONSTRUCTOR_TABLE__,
count=__CONSTRUCTOR_COUNT__;
CONDES: segment = STARTUP,
type=destructor,
label=__DESTRUCTOR_TABLE__,
count=__DESTRUCTOR_COUNT__;
}
SYMBOLS {
__STACKSIZE__ = $0300; # 3 pages stack
}

29
libsrc/pcengine/psg.s Normal file
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.include "pcengine.inc"
.export psg_init
psg_init:
clx
stx $0800 ; Select channel
psg_clear_loop:
stz $0801 ; Clear global balance
stz $0802 ; Clear frequency LSB
stz $0803 ; Clear frequency MSB
stz $0804 ; Clear volume
stz $0805 ; Clear balance
stz $0807 ; Clear noise control
stz $0808 ; Clear LFO frequency
stz $0809 ; Clear LFO control
cly
psg_clear_waveform: stz $0806 ; Clear waveform byte
iny
cpy #$20
bne psg_clear_waveform
inx
cpx #$06
bne psg_clear_loop
rts

5
libsrc/pcengine/revers.s Normal file
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.export _revers
_revers:
lda #0
rts

16
libsrc/pcengine/vce.s Normal file
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.include "pcengine.inc"
.export vce_init
vce_init:
stz VCE_ADDR_LO ;
stz VCE_ADDR_HI ; Set CTA to zero
ldy #$01
vce_clear_bank: ldx #$00
vce_clear_color: stz VCE_DATA_LO ; Clear color (LSB)
stz VCE_DATA_HI ; Clear color (MSB)
dex
bne vce_clear_color
dey
bne vce_clear_bank
rts

46
libsrc/pcengine/vdc.s Normal file
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.include "pcengine.inc"
HIRES = 1
.export vdc_init
vdc_init:
;;lda $0000
;;.byte $ad,0,0
ldaio VDC_CTRL
VREG $00, $0000 ; MAWR
VREG $01, $0000 ; MARR
VREG $05, $0000 ; CR
VREG $06, $0000 ; RCR
VREG $07, $0000 ; BXR
VREG $08, $0000 ; BYR
VREG $09, $0070 ; MAWR
VREG $0C, $1702 ; CRTC - VSR
VREG $0D, $00DF ; CRTC - VDS
VREG $0E, $000C ; CRTC - VDE
VREG $0F, $0000 ; DCR
.if HIRES
VREG $0A, $0C02 ; CRTC - HSR
VREG $0B, $043C ; CRTC - HDS
lda #$06
sta VCE_CTRL
.else
VREG $0A, $0202 ; CRTC - HSR
VREG $0B, $041F ; CRTC - HDS
lda #$04
sta VCE_CTRL
.endif
;;lda $0000
;;.byte $ad,0,0
ldaio VDC_CTRL
rts

129
libsrc/pcengine/vga.inc Normal file
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.byte $00, $00, $00, $00, $00, $00, $00, $00
.byte $7E, $81, $A5, $81, $BD, $99, $81, $7E
.byte $7E, $FF, $DB, $FF, $C3, $E7, $FF, $7E
.byte $6C, $FE, $FE, $FE, $7C, $38, $10, $00
.byte $10, $38, $7C, $FE, $7C, $38, $10, $00
.byte $38, $7C, $38, $FE, $FE, $7C, $38, $7C
.byte $10, $10, $38, $7C, $FE, $7C, $38, $7C
.byte $00, $00, $18, $3C, $3C, $18, $00, $00
.byte $FF, $FF, $E7, $C3, $C3, $E7, $FF, $FF
.byte $00, $3C, $66, $42, $42, $66, $3C, $00
.byte $FF, $C3, $99, $BD, $BD, $99, $C3, $FF
.byte $0F, $07, $0F, $7D, $CC, $CC, $CC, $78
.byte $3C, $66, $66, $66, $3C, $18, $7E, $18
.byte $3F, $33, $3F, $30, $30, $70, $F0, $E0
.byte $7F, $63, $7F, $63, $63, $67, $E6, $C0
.byte $99, $5A, $3C, $E7, $E7, $3C, $5A, $99
.byte $80, $E0, $F8, $FE, $F8, $E0, $80, $00
.byte $02, $0E, $3E, $FE, $3E, $0E, $02, $00
.byte $18, $3C, $7E, $18, $18, $7E, $3C, $18
.byte $66, $66, $66, $66, $66, $00, $66, $00
.byte $7F, $DB, $DB, $7B, $1B, $1B, $1B, $00
.byte $3E, $63, $38, $6C, $6C, $38, $CC, $78
.byte $00, $00, $00, $00, $7E, $7E, $7E, $00
.byte $18, $3C, $7E, $18, $7E, $3C, $18, $FF
.byte $18, $3C, $7E, $18, $18, $18, $18, $00
.byte $18, $18, $18, $18, $7E, $3C, $18, $00
.byte $00, $18, $0C, $FE, $0C, $18, $00, $00
.byte $00, $30, $60, $FE, $60, $30, $00, $00
.byte $00, $00, $C0, $C0, $C0, $FE, $00, $00
.byte $00, $24, $66, $FF, $66, $24, $00, $00
.byte $00, $18, $3C, $7E, $FF, $FF, $00, $00
.byte $00, $FF, $FF, $7E, $3C, $18, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $00
.byte $30, $78, $78, $78, $30, $00, $30, $00
.byte $6C, $6C, $6C, $00, $00, $00, $00, $00
.byte $6C, $6C, $FE, $6C, $FE, $6C, $6C, $00
.byte $30, $7C, $C0, $78, $0C, $F8, $30, $00
.byte $00, $C6, $CC, $18, $30, $66, $C6, $00
.byte $38, $6C, $38, $76, $DC, $CC, $76, $00
.byte $60, $60, $C0, $00, $00, $00, $00, $00
.byte $18, $30, $60, $60, $60, $30, $18, $00
.byte $60, $30, $18, $18, $18, $30, $60, $00
.byte $00, $66, $3C, $FF, $3C, $66, $00, $00
.byte $00, $30, $30, $FC, $30, $30, $00, $00
.byte $00, $00, $00, $00, $00, $30, $30, $60
.byte $00, $00, $00, $FC, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $30, $30, $00
.byte $06, $0C, $18, $30, $60, $C0, $80, $00
.byte $7C, $C6, $CE, $DE, $F6, $E6, $7C, $00
.byte $30, $70, $30, $30, $30, $30, $FC, $00
.byte $78, $CC, $0C, $38, $60, $CC, $FC, $00
.byte $78, $CC, $0C, $38, $0C, $CC, $78, $00
.byte $1C, $3C, $6C, $CC, $FE, $0C, $1E, $00
.byte $FC, $C0, $F8, $0C, $0C, $CC, $78, $00
.byte $38, $60, $C0, $F8, $CC, $CC, $78, $00
.byte $FC, $CC, $0C, $18, $30, $30, $30, $00
.byte $78, $CC, $CC, $78, $CC, $CC, $78, $00
.byte $78, $CC, $CC, $7C, $0C, $18, $70, $00
.byte $00, $30, $30, $00, $00, $30, $30, $00
.byte $00, $30, $30, $00, $00, $30, $30, $60
.byte $18, $30, $60, $C0, $60, $30, $18, $00
.byte $00, $00, $FC, $00, $00, $FC, $00, $00
.byte $60, $30, $18, $0C, $18, $30, $60, $00
.byte $78, $CC, $0C, $18, $30, $00, $30, $00
.byte $7C, $C6, $DE, $DE, $DE, $C0, $78, $00
.byte $30, $78, $CC, $CC, $FC, $CC, $CC, $00
.byte $FC, $66, $66, $7C, $66, $66, $FC, $00
.byte $3C, $66, $C0, $C0, $C0, $66, $3C, $00
.byte $F8, $6C, $66, $66, $66, $6C, $F8, $00
.byte $7E, $60, $60, $78, $60, $60, $7E, $00
.byte $7E, $60, $60, $78, $60, $60, $60, $00
.byte $3C, $66, $C0, $C0, $CE, $66, $3E, $00
.byte $CC, $CC, $CC, $FC, $CC, $CC, $CC, $00
.byte $78, $30, $30, $30, $30, $30, $78, $00
.byte $1E, $0C, $0C, $0C, $CC, $CC, $78, $00
.byte $E6, $66, $6C, $78, $6C, $66, $E6, $00
.byte $60, $60, $60, $60, $60, $60, $7E, $00
.byte $C6, $EE, $FE, $FE, $D6, $C6, $C6, $00
.byte $C6, $E6, $F6, $DE, $CE, $C6, $C6, $00
.byte $38, $6C, $C6, $C6, $C6, $6C, $38, $00
.byte $FC, $66, $66, $7C, $60, $60, $F0, $00
.byte $78, $CC, $CC, $CC, $DC, $78, $1C, $00
.byte $FC, $66, $66, $7C, $6C, $66, $E6, $00
.byte $78, $CC, $E0, $70, $1C, $CC, $78, $00
.byte $FC, $30, $30, $30, $30, $30, $30, $00
.byte $CC, $CC, $CC, $CC, $CC, $CC, $FC, $00
.byte $CC, $CC, $CC, $CC, $CC, $78, $30, $00
.byte $C6, $C6, $C6, $D6, $FE, $EE, $C6, $00
.byte $C6, $C6, $6C, $38, $38, $6C, $C6, $00
.byte $CC, $CC, $CC, $78, $30, $30, $78, $00
.byte $FE, $06, $0C, $18, $30, $60, $FE, $00
.byte $78, $60, $60, $60, $60, $60, $78, $00
.byte $C0, $60, $30, $18, $0C, $06, $02, $00
.byte $78, $18, $18, $18, $18, $18, $78, $00
.byte $10, $38, $6C, $C6, $00, $00, $00, $00
.byte $00, $00, $00, $00, $00, $00, $00, $FF
.byte $30, $30, $18, $00, $00, $00, $00, $00
.byte $00, $00, $78, $0C, $7C, $CC, $76, $00
.byte $E0, $60, $60, $7C, $66, $66, $DC, $00
.byte $00, $00, $78, $CC, $C0, $CC, $78, $00
.byte $1C, $0C, $0C, $7C, $CC, $CC, $76, $00
.byte $00, $00, $78, $CC, $FC, $C0, $78, $00
.byte $38, $6C, $60, $F0, $60, $60, $F0, $00
.byte $00, $00, $76, $CC, $CC, $7C, $0C, $F8
.byte $E0, $60, $6C, $76, $66, $66, $E6, $00
.byte $30, $00, $70, $30, $30, $30, $78, $00
.byte $0C, $00, $0C, $0C, $0C, $CC, $CC, $78
.byte $E0, $60, $66, $6C, $78, $6C, $E6, $00
.byte $70, $30, $30, $30, $30, $30, $78, $00
.byte $00, $00, $CC, $FE, $FE, $D6, $C6, $00
.byte $00, $00, $F8, $CC, $CC, $CC, $CC, $00
.byte $00, $00, $78, $CC, $CC, $CC, $78, $00
.byte $00, $00, $DC, $66, $66, $7C, $60, $F0
.byte $00, $00, $76, $CC, $CC, $7C, $0C, $1E
.byte $00, $00, $DC, $76, $66, $60, $F0, $00
.byte $00, $00, $7C, $C0, $78, $0C, $F8, $00
.byte $10, $30, $7C, $30, $30, $34, $18, $00
.byte $00, $00, $CC, $CC, $CC, $CC, $76, $00
.byte $00, $00, $CC, $CC, $CC, $78, $30, $00
.byte $00, $00, $C6, $D6, $FE, $FE, $6C, $00
.byte $00, $00, $C6, $6C, $38, $6C, $C6, $00
.byte $00, $00, $CC, $CC, $CC, $7C, $0C, $F8
.byte $00, $00, $FC, $98, $30, $64, $FC, $00
.byte $1C, $30, $30, $E0, $30, $30, $1C, $00
.byte $18, $18, $18, $00, $18, $18, $18, $00
.byte $E0, $30, $30, $1C, $30, $30, $E0, $00
.byte $76, $DC, $00, $00, $00, $00, $00, $00
.byte $00, $10, $38, $6C, $C6, $C6, $FE, $00