mirror of https://github.com/cc65/cc65.git
521 lines
18 KiB
ArmAsm
521 lines
18 KiB
ArmAsm
;
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; Serial driver for the Apple II Super Serial Card.
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;
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; Oliver Schmidt, 21.04.2005
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;
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; The driver is based on the cc65 rs232 module, which in turn is based on
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; Craig Bruce device driver for the Switftlink/Turbo-232.
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;
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; SwiftLink/Turbo-232 v0.90 device driver, by Craig Bruce, 14-Apr-1998.
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;
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; This software is Public Domain. It is in Buddy assembler format.
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;
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; This device driver uses the SwiftLink RS-232 Serial Cartridge, available from
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; Creative Micro Designs, Inc, and also supports the extensions of the Turbo232
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; Serial Cartridge. Both devices are based on the 6551 ACIA chip. It also
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; supports the "hacked" SwiftLink with a 1.8432 MHz crystal.
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;
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; The code assumes that the kernal + I/O are in context. On the C128, call
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; it from Bank 15. On the C64, don't flip out the Kernal unless a suitable
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; NMI catcher is put into the RAM under then Kernal. For the SuperCPU, the
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; interrupt handling assumes that the 65816 is in 6502-emulation mode.
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;
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.include "zeropage.inc"
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.include "ser-kernel.inc"
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.include "ser-error.inc"
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.macpack module
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.macpack cpu
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; ------------------------------------------------------------------------
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; Header. Includes jump table
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.ifdef __APPLE2ENH__
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module_header _a2e_ssc_ser
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.else
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module_header _a2_ssc_ser
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.endif
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; Driver signature
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.byte $73, $65, $72 ; "ser"
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.byte SER_API_VERSION ; Serial API version number
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; Library reference
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.addr $0000
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; Jump table
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.addr SER_INSTALL
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.addr SER_UNINSTALL
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.addr SER_OPEN
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.addr SER_CLOSE
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.addr SER_GET
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.addr SER_PUT
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.addr SER_STATUS
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.addr SER_IOCTL
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.addr SER_IRQ
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;----------------------------------------------------------------------------
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; I/O definitions
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.if (.cpu .bitand CPU_ISET_65C02)
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ACIA := $C088
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.else
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Offset = $8F ; Move 6502 false read out of I/O to page $BF
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ACIA := $C088-Offset
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.endif
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ACIA_DATA := ACIA+0 ; Data register
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ACIA_STATUS := ACIA+1 ; Status register
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ACIA_CMD := ACIA+2 ; Command register
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ACIA_CTRL := ACIA+3 ; Control register
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SLTROMSEL := $C02D ; For Apple IIgs slot verification
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;----------------------------------------------------------------------------
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; Global variables
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.bss
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RecvHead: .res 1 ; Head of receive buffer
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RecvTail: .res 1 ; Tail of receive buffer
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RecvFreeCnt: .res 1 ; Number of free bytes in receive buffer
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SendHead: .res 1 ; Head of send buffer
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SendTail: .res 1 ; Tail of send buffer
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SendFreeCnt: .res 1 ; Number of free bytes in send buffer
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Stopped: .res 1 ; Flow-stopped flag
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RtsOff: .res 1 ; Cached value of command register with
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; flow stopped
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HSType: .res 1 ; Flow-control type
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RecvBuf: .res 256 ; Receive buffer: 256 bytes
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SendBuf: .res 256 ; Send buffer: 256 bytes
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Index: .res 1 ; I/O register index
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.data
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Slot: .byte $02 ; Default to SSC in slot 2
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.rodata
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BaudTable: ; Table used to translate RS232 baudrate param
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; into control register value
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; bit7 = 1 means setting is invalid
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.byte $FF ; SER_BAUD_45_5
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.byte $01 ; SER_BAUD_50
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.byte $02 ; SER_BAUD_75
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.byte $03 ; SER_BAUD_110
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.byte $04 ; SER_BAUD_134_5
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.byte $05 ; SER_BAUD_150
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.byte $06 ; SER_BAUD_300
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.byte $07 ; SER_BAUD_600
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.byte $08 ; SER_BAUD_1200
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.byte $09 ; SER_BAUD_1800
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.byte $0A ; SER_BAUD_2400
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.byte $0B ; SER_BAUD_3600
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.byte $0C ; SER_BAUD_4800
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.byte $0D ; SER_BAUD_7200
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.byte $0E ; SER_BAUD_9600
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.byte $0F ; SER_BAUD_19200
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.byte $FF ; SER_BAUD_38400
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.byte $FF ; SER_BAUD_57600
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.byte $00 ; SER_BAUD_115200
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.byte $FF ; SER_BAUD_230400
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BitTable: ; Table used to translate RS232 databits param
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; into control register value
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.byte $60 ; SER_BITS_5
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.byte $40 ; SER_BITS_6
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.byte $20 ; SER_BITS_7
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.byte $00 ; SER_BITS_8
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StopTable: ; Table used to translate RS232 stopbits param
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; into control register value
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.byte $00 ; SER_STOP_1
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.byte $80 ; SER_STOP_2
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ParityTable: ; Table used to translate RS232 parity param
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; into command register value
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.byte $00 ; SER_PAR_NONE
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.byte $20 ; SER_PAR_ODD
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.byte $60 ; SER_PAR_EVEN
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.byte $A0 ; SER_PAR_MARK
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.byte $E0 ; SER_PAR_SPACE
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IdOfsTable: ; Table of bytes positions, used to check four
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; specific bytes on the slot's firmware to make
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; sure this is a serial card.
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.byte $05 ; Pascal 1.0 ID byte
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.byte $07 ; Pascal 1.0 ID byte
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.byte $0B ; Pascal 1.1 generic signature byte
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.byte $0C ; Device signature byte
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IdValTable: ; Table of expected values for the four checked
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; bytes
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.byte $38 ; ID Byte 0 (from Pascal 1.0), fixed
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.byte $18 ; ID Byte 1 (from Pascal 1.0), fixed
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.byte $01 ; Generic signature for Pascal 1.1, fixed
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.byte $31 ; Device signature byte (serial or
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; parallel I/O card type 1)
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IdTableLen = * - IdValTable
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.code
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;----------------------------------------------------------------------------
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; SER_INSTALL: Is called after the driver is loaded into memory. If possible,
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; check if the hardware is present. Must return an SER_ERR_xx code in a/x.
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;
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; Since we don't have to manage the IRQ vector on the Apple II, this is
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; actually the same as:
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;
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; SER_UNINSTALL: Is called before the driver is removed from memory.
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; No return code required (the driver is removed from memory on return).
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;
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; and:
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;
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; SER_CLOSE: Close the port and disable interrupts. Called without parameters.
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; Must return an SER_ERR_xx code in a/x.
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SER_INSTALL:
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SER_UNINSTALL:
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SER_CLOSE:
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ldx Index ; Check for open port
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beq :+
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lda #%00001010 ; Deactivate DTR and disable 6551 interrupts
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sta ACIA_CMD,x
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: lda #SER_ERR_OK ; Done, return an error code
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.assert SER_ERR_OK = 0, error
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tax
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stx Index ; Mark port as closed
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rts
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;----------------------------------------------------------------------------
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; SER_OPEN: A pointer to a ser_params structure is passed in ptr1.
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; Must return an SER_ERR_xx code in a/x.
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; Note: Hardware checks are done in SER_OPEN instead of SER_INSTALL,
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; because they depend on the selected slot, and we can't select the slot
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; before SER_INSTALL.
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SER_OPEN:
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; Check if this is a IIgs (Apple II Miscellaneous TechNote #7,
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; Apple II Family Identification)
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sec
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bit $C082
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jsr $FE1F
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bit $C080
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bcs NotIIgs
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; We're on a IIgs. For every slot N, either bit N of $C02D is
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; 0 for the internal ROM, or 1 for "Your Card". Let's make sure
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; that slot N's bit is set to 1, otherwise, that can't be an SSC.
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ldy Slot
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lda SLTROMSEL
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: lsr
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dey
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bpl :- ; Shift until slot's bit ends in carry
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bcc NoDev
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NotIIgs:ldx #<$C000
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stx ptr2
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lda #>$C000
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ora Slot
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sta ptr2+1
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: ldy IdOfsTable,x ; Check Pascal 1.1 Firmware Protocol ID bytes
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lda IdValTable,x
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cmp (ptr2),y
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bne NoDev
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inx
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cpx #IdTableLen
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bcc :-
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lda Slot ; Convert slot to I/O register index
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asl
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asl
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asl
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asl
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.if .not (.cpu .bitand CPU_ISET_65C02)
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adc #Offset ; Assume carry to be clear
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.endif
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tax
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; Check that this works like an ACIA 6551 is expected to work
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lda ACIA_STATUS,x ; Save current values in what we expect to be
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sta tmp1 ; the ACIA status register
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lda ACIA_CMD,x ; and command register. So we can restore them
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sta tmp2 ; if this isn't a 6551.
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ldy #%00000010 ; Disable TX/RX, disable IRQ
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: tya
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sta ACIA_CMD,x
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cmp ACIA_CMD,x ; Verify what we stored is there
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bne NotAcia
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iny ; Enable TX/RX, disable IRQ
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cpy #%00000100
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bne :-
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sta ACIA_STATUS,x ; Reset ACIA
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lda ACIA_CMD,x ; Check that RX/TX is disabled
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lsr
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bcc AciaOK
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NotAcia:lda tmp2 ; Restore original values
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sta ACIA_CMD,x
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lda tmp1
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sta ACIA_STATUS,x
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NoDev: lda #SER_ERR_NO_DEVICE
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bne Out
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; Check if the handshake setting is valid
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AciaOK: ldy #SER_PARAMS::HANDSHAKE
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lda (ptr1),y
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cmp #SER_HS_SW ; Not supported
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bne HandshakeOK
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lda #SER_ERR_INIT_FAILED
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bne Out
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HandshakeOK:
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sta HSType ; Store flow control type
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ldy #$00 ; Initialize buffers
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sty Stopped
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sty RecvHead
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sty RecvTail
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sty SendHead
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sty SendTail
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dey ; Y = 255
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sty RecvFreeCnt
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sty SendFreeCnt
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; Set the value for the control register, which contains stop bits,
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; word length and the baud rate.
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ldy #SER_PARAMS::BAUDRATE
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lda (ptr1),y ; Baudrate index
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tay
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lda BaudTable,y ; Get 6551 value
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sta tmp2 ; Backup for IRQ setting
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bpl BaudOK ; Check that baudrate is supported
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lda #SER_ERR_BAUD_UNAVAIL
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bne Out
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BaudOK: sta tmp1
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ldy #SER_PARAMS::DATABITS
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lda (ptr1),y ; Databits index
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tay
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lda BitTable,y ; Get 6551 value
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ora tmp1
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sta tmp1
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ldy #SER_PARAMS::STOPBITS
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lda (ptr1),y ; Stopbits index
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tay
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lda StopTable,y ; Get 6551 value
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ora tmp1
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ora #%00010000 ; Set receiver clock source = baudrate
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sta ACIA_CTRL,x
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; Set the value for the command register. We remember the base value
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; in RtsOff, since we will have to manipulate ACIA_CMD often.
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ldy #SER_PARAMS::PARITY
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lda (ptr1),y ; Parity index
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tay
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lda ParityTable,y ; Get 6551 value
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ora #%00000001 ; Set DTR active
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sta RtsOff ; Store value to easily handle flow control later
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ora #%00001010 ; Disable interrupts and set RTS low
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ldy tmp2 ; Don't enable IRQs if 115200bps
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beq :+
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and #%11111101 ; Enable receive IRQs
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: sta ACIA_CMD,x
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; Done
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stx Index ; Mark port as open
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lda #SER_ERR_OK
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Out:
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ldx #$00 ; Promote char return value
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rts
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;----------------------------------------------------------------------------
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; SER_GET: Will fetch a character from the receive buffer and store it into the
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; variable pointed to by ptr1. If no data is available, SER_ERR_NO_DATA is
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; returned.
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SER_GET:
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ldx Index
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lda RecvFreeCnt ; Check for buffer empty
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cmp #$FF
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bne :+
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lda #SER_ERR_NO_DATA
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ldx #$00 ; Promote char return value
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rts
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: ldy Stopped ; Check for flow stopped
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beq :+
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cmp #63 ; Enough free?
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bcc :+
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.if (.cpu .bitand CPU_ISET_65C02)
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stz Stopped ; Release flow control
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.else
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lda #$00
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sta Stopped
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.endif
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lda RtsOff
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ora #%00001000
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sta ACIA_CMD,x
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: ldy RecvHead ; Get byte from buffer
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lda RecvBuf,y
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inc RecvHead
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inc RecvFreeCnt
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ldx #$00
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.if (.cpu .bitand CPU_ISET_65C02)
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sta (ptr1) ; Store it for caller
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.else
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sta (ptr1,x)
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.endif
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txa ; Return code = 0
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rts
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;----------------------------------------------------------------------------
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; SER_PUT: Output character in A.
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; Must return an SER_ERR_xx code in a/x.
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SER_PUT:
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ldx Index
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ldy SendFreeCnt ; Anything to send first?
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cpy #$FF ; No
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beq :+
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pha
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lda #$00 ; TryHard = false
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jsr TryToSend ; Try to flush send buffer
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pla
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ldy SendFreeCnt ; Reload SendFreeCnt after TryToSend
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bne :+
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lda #SER_ERR_OVERFLOW
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ldx #$00 ; Promote char return value
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rts
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: ldy SendTail ; Put byte into send buffer
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sta SendBuf,y
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inc SendTail
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dec SendFreeCnt
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lda #$FF ; TryHard = true
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jsr TryToSend ; Flush send buffer
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lda #SER_ERR_OK
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.assert SER_ERR_OK = 0, error
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tax
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rts
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;----------------------------------------------------------------------------
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; SER_STATUS: Return the status in the variable pointed to by ptr1.
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; Must return an SER_ERR_xx code in a/x.
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SER_STATUS:
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ldx Index
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lda ACIA_STATUS,x
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ldx #$00
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sta (ptr1,x)
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.assert SER_ERR_OK = 0, error
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txa
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rts
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;----------------------------------------------------------------------------
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; SER_IOCTL: Driver defined entry point. The wrapper will pass a pointer to ioctl
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; specific data in ptr1, and the ioctl code in A.
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; The ioctl data is the slot number to open.
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; Must return an SER_ERR_xx code in a/x.
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SER_IOCTL:
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ora ptr1+1 ; Check data msb and code to be 0
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bne :+
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ldx ptr1 ; Check data lsb to be [1..7]
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beq :+
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cpx #7+1
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bcs :+
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stx Slot ; Store slot
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.assert SER_ERR_OK = 0, error
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tax
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rts
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: lda #SER_ERR_INV_IOCTL
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ldx #$00 ; Promote char return value
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rts
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;----------------------------------------------------------------------------
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; SER_IRQ: Called from the builtin runtime IRQ handler as a subroutine. All
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; registers are already saved, no parameters are passed, but the carry flag
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; is clear on entry. The routine must return with carry set if the interrupt
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; was handled, otherwise with carry clear.
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SER_IRQ:
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ldx Index ; Check for open port
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beq Done
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lda ACIA_STATUS,x ; Check ACIA status for receive interrupt
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and #$08
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beq Done ; Jump if no ACIA interrupt
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lda ACIA_DATA,x ; Get byte from ACIA
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ldx RecvFreeCnt ; Check if we have free space left
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beq Flow ; Jump if no space in receive buffer
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ldy RecvTail ; Load buffer pointer
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sta RecvBuf,y ; Store received byte in buffer
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inc RecvTail ; Increment buffer pointer
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dec RecvFreeCnt ; Decrement free space counter
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cpx #33 ; Check for buffer space low
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bcc Flow ; Assert flow control if buffer space low
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rts ; Interrupt handled (carry already set)
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Flow: lda HSType ; Don't touch if no flow control
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beq IRQDone
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ldx Index ; Assert flow control if buffer space too low
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lda RtsOff
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sta ACIA_CMD,x
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sta Stopped
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IRQDone:sec ; Interrupt handled
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Done: rts
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;----------------------------------------------------------------------------
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; Try to send a byte. Internal routine. A = TryHard
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TryToSend:
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sta tmp1 ; Remember tryHard flag
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NextByte:
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lda SendFreeCnt ; Is there anything to send? This can happen if
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cmp #$FF ; we got interrupted by RX while sending, and
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beq Quit ; flow control was asserted.
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Again: lda Stopped ; Is flow stopped?
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bne Quit ; Yes, Bail out
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lda ACIA_STATUS,x ; Check that ACIA is ready to send
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and #$10
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bne Send ; It is!
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bit tmp1 ; Keep trying if must try hard
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bmi Again
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Quit: rts
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Send: ldy SendHead ; Get first byte to send
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lda SendBuf,y
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sta ACIA_DATA,x ; Send it
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inc SendHead
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inc SendFreeCnt
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bne NextByte ; And try next one
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