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93a13315de
Cleaned up comments in Atari 8-bit headers. Internal keycodes (POKEY's KBCODE) were already #defined in atari.h, so didn't need a whole new set in _pokey.h.
163 lines
6.6 KiB
C
163 lines
6.6 KiB
C
/*****************************************************************************/
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/* */
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/* _pia.h */
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/* */
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/* Internal include file, do not use directly */
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/* */
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/* The Peripheral Interface Adapter (PIA) chip provides parallel I/O */
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/* interfacing; it was used in Atari 400/800 and Commodore PET family of */
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/* computers, for joystick and interrupts. */
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/* Sources; various + Wikpedia article on "Peripheral Interface Adapter". */
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/* */
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: Defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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/* warranty. In no event will the authors be held liable for any damages */
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/* arising from the use of this software. */
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/* */
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/* Permission is granted to anyone to use this software for any purpose, */
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/* including commercial applications, and to alter it and redistribute it */
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/* freely, subject to the following restrictions: */
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/* */
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/* 1. The origin of this software must not be misrepresented; you must not */
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/* claim that you wrote the original software. If you use this software */
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/* in a product, an acknowledgment in the product documentation would be */
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/* appreciated but is not required. */
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/* 2. Altered source versions must be plainly marked as such, and must not */
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/* be misrepresented as being the original software. */
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/* 3. This notice may not be removed or altered from any source */
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/* distribution. */
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/* */
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/*****************************************************************************/
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#ifndef __PIA_H
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#define __PIA_H
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/* Define a structure with the PIA register offsets */
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struct __pia {
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unsigned char porta; /* port A data r/w */
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unsigned char portb; /* port B data r/w */
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unsigned char pactl; /* port A control */
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unsigned char pbctl; /* port B control */
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};
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/*****************************************************************************/
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/* PORTA and PORTB register bits */
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/*****************************************************************************/
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/* See also: "JOY_xxx_MASK" in "atari.h" */
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/* Paddle 0-3 triggers (per PORTA bits) */
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#define PORTA_PTRIG3 0x80
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#define PORTA_PTRIG2 0x40
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#define PORTA_PTRIG1 0x08
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#define PORTA_PTRIG0 0x04
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/* On the Atari 400/800, PORTB is the same as PORTA, but for controller ports 3 & 4. */
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/* Paddle 4-7 triggers (per PORTB bits); only 400/800 had four controller ports */
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#define PORTB_PTRIG7 0x80
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#define PORTB_PTRIG6 0x40
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#define PORTB_PTRIG5 0x08
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#define PORTB_PTRIG4 0x04
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/* On the XL series of computers, PORTB has been changed to a memory and
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** LED control (1200XL model only) register (read/write):
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*/
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/* If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF
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** (except that the area $D000-$D7FF will only access the hardware registers.)
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** If clear, RAM is enabled in this area (again, save for the hole.)
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*/
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#define PORTB_OSROM 0x01
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/* If set, RAM is enabled for the address range $A000-$BFFF.
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** If clear, the built-in BASIC ROM is enabled at this address.
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** And if there is a cartridge installed in the computer, it makes no difference.
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*/
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#define PORTB_BASICROM 0x02
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/* If set, the corresponding LED is turned off. If clear, the LED will be on.
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** (1200XL only)
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*/
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#define PORTB_LED1 0x04
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#define PORTB_LED2 0x08
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/* On the XE series of computers, PORTB is a bank-selected memory control register (read/write): */
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/* These bits determine which memory bank is visible to the CPU and/or ANTIC chip
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** when their Bank Switch bit is set. There are four possible banks of 16KB each.
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*/
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#define PORTB_BANKSELECT1 0x00
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#define PORTB_BANKSELECT2 0x04
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#define PORTB_BANKSELECT3 0x08
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#define PORTB_BANKSELECT4 0x0C
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/* If set, the CPU and/or ANTIC chip will access bank-switched memory mapped to the
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** address range $4000-$7FFF.
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** If clear, the CPU and/or ANTIC will see normal memory in this region.
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*/
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#define PORTB_BANKSWITCH_CPU 0x10
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#define PORTB_BANKSWITCH_ANTIC 0x20
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/* If set, RAM is enabled for the address range $5000-$57FF.
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** If clear, the self-test ROM (physically located at $D000-$D7FF, under the hardware registers)
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** is remapped to this memory area.
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*/
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#define PORTB_SELFTEST 0x80
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/*****************************************************************************/
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/* PACTL and PBCTL register bits */
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/*****************************************************************************/
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/* (W) Peripheral A interrupt (IRQ) enable.
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** One equals enable. Set by the OS but available to the user; reset on powerup.
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*/
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#define PxCTL_IRQ_ENABLE 0x01
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/* "Set to zero" */
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#define PxCTL_BIT1 0x02
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/* (W) Controls PORTA addressing
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** One equals PORTA register; zero equals direction control register
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*/
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#define PxCTL_ADDRESSING 0x04
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#define PxCTL_BIT4 0x10 /* "Set to one" */
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#define PxCTL_BIT5 0x20 /* "Set to one" */
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#define PxCTL_BIT6 0x40 /* "Set to zero" */
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/* Peripheral interrupt (IRQ) status bit.
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** Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB.
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*/
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#define PxCTL_IRQ_STATUS 0x80
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/* PACTL-specific register bit */
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/* (W) Peripheral motor control line
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** Turn the cassette on or off; zero equals on)
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*/
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#define PACTL_MOTOR_CONTROL 0x08
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/* PBCTL-specific register bit */
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/* Peripheral command identification (serial bus command) */
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#define PBCTL_PERIPH_CMD_IDENT 0x08
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/* End of _pia.h */
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#endif
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