mirror of
https://github.com/cc65/cc65.git
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467d8ad9c5
git-svn-id: svn://svn.cc65.org/cc65/trunk@2012 b7a2c559-68d2-44c3-8de9-860c34a00d81
213 lines
4.7 KiB
ArmAsm
213 lines
4.7 KiB
ArmAsm
;
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; Startup code for cc65 (Plus/4 version)
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;
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; This must be the *first* file on the linker command line
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;
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.export _exit
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.export brk_jmp
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.import condes, initlib, donelib
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.import push0, callmain, zerobss
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.import __IRQFUNC_TABLE__, __IRQFUNC_COUNT__
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.include "zeropage.inc"
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.include "plus4.inc"
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; ------------------------------------------------------------------------
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; Constants
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IRQInd = $500 ; JMP $0000 - used as indirect IRQ vector
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; ------------------------------------------------------------------------
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; Place the startup code in a special segment to cope with the quirks of
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; plus/4 banking.
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.segment "STARTUP"
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.word Head ; Load address
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Head: .word @Next
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.word 1000 ; Line number
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.byte $9E,"4109" ; SYS 4109
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.byte $00 ; End of BASIC line
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@Next: .word 0 ; BASIC end marker
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; ------------------------------------------------------------------------
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; Actual code
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sei ; No interrupts since we're banking out the ROM
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sta ENABLE_RAM
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ldx #zpspace-1
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L1: lda sp,x
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sta zpsave,x ; save the zero page locations we need
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dex
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bpl L1
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sta ENABLE_ROM
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cli
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; Close open files
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jsr $FFCC ; CLRCH
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; Switch to second charset
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lda #14
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jsr $FFD2 ; BSOUT
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; Setup the IRQ vector in the banked RAM and switch off the ROM
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sei ; No ints, handler not yet in place
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sta ENABLE_RAM
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lda #<IRQ
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sta $FFFE ; Install interrupt handler
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lda #>IRQ
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sta $FFFF
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cli ; Allow interrupts
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; Clear the BSS data
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jsr zerobss
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; Save system stuff and setup the stack. The stack starts at the top of the
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; usable RAM.
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tsx
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stx spsave ; save system stk ptr
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lda #<$FD00
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sta sp
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lda #>$FD00
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sta sp+1
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; Call module constructors
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jsr initlib
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; If we have IRQ functions, chain our stub into the IRQ vector
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lda #<__IRQFUNC_COUNT__
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beq NoIRQ1
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lda IRQVec
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ldx IRQVec+1
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sta IRQInd+1
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stx IRQInd+2
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lda #<IRQStub
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ldx #>IRQStub
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Push arguments and call main()
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NoIRQ1: jsr callmain
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; Back from main (this is also the _exit entry). Reset the IRQ vector if
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; we chained it.
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_exit: lda #<__IRQFUNC_COUNT__
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beq NoIRQ2
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lda IRQInd+1
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ldx IRQInd+2
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Run module destructors.
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NoIRQ2: jsr donelib ; Run module destructors
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; Restore system stuff
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ldx spsave
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txs
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; Copy back the zero page stuff
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ldx #zpspace-1
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L2: lda zpsave,x
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sta sp,x
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dex
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bpl L2
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; Enable the ROM, reset changed vectors and return to BASIC
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sta ENABLE_ROM
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jmp $FF8A ; RESTOR
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; ------------------------------------------------------------------------
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; IRQ handler
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.segment "LOWCODE"
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IRQ: pha
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txa
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pha
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tsx ; Get the stack pointer
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lda $0103,x ; Get the saved status register
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tax ; Save for later
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and #$10 ; Test for BRK bit
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bne dobreak
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lda #>irq_ret ; Push new return address
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pha
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lda #<irq_ret
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pha
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txa
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pha
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sta ENABLE_ROM ; Switch to ROM
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jmp ($FFFE) ; Jump to kernal irq handler
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irq_ret:
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sta ENABLE_RAM ; Switch back to RAM
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pla
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tax
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pla
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rti
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dobreak:
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lda brk_jmp+2 ; Check high byte of address
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beq nohandler
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jmp brk_jmp ; Jump to the handler
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; No break handler installed, jump to ROM
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nohandler:
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tya
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pha ; ROM handler expects Y on stack
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sta ENABLE_ROM
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jmp (BRKVec) ; Jump indirect to the break vector
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; ------------------------------------------------------------------------
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; Stub for the IRQ chain. Is used only if there are IRQs defined. Needed in
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; low memory because of the banking.
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.segment "LOWCODE"
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IRQStub:
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cld ; Just to be sure
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sta ENABLE_RAM ; Switch to RAM
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ldy #<(__IRQFUNC_COUNT__*2)
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lda #<__IRQFUNC_TABLE__
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ldx #>__IRQFUNC_TABLE__
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jsr condes ; Call the IRQ functions
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sta ENABLE_ROM
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jmp IRQInd ; Jump to the saved IRQ vector
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; ------------------------------------------------------------------------
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; Data
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.data
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zpsave: .res zpspace
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; BRK handling
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brk_jmp: jmp $0000
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.bss
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spsave: .res 1
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