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The way we want to use the INITBSS segment - and especially the fact that it won't have the type bss on all ROM based targets - means that the name INITBSS is misleading. After all INIT is the best name from my perspective as it serves several purposes and therefore needs a rather generic name. Unfortunately this means that the current INIT segment needs to be renamed too. Looking for a short (ideally 4 letter) name I came up with ONCE as it contains all code (and data) accessed only once during initialization.
732 lines
30 KiB
Plaintext
732 lines
30 KiB
Plaintext
<!doctype linuxdoc system>
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<article>
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<title>Defining a Custom cc65 Target
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<author>Bruce Reidenbach
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<date>2015-03-13
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<abstract>
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This section provides step-by-step instructions on how to use the cc65
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toolset for a custom hardware platform (a target system not currently
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supported by the cc65 library set).
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</abstract>
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<!-- Table of contents -->
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<toc>
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<!-- Begin the document -->
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<sect>Overview<p>
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The cc65 toolset provides a set of pre-defined libraries that allow the
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user to target the executable image to a variety of hardware platforms.
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In addition, the user can create a customized environment so that the
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executable can be targeted to a custom platform. The following
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instructions provide step-by-step instructions on how to customize the
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toolset for a target that is not supported by the standard cc65
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installation.
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The platform used in this example is a Xilinx Field Programmable Gate
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Array (FPGA) with an embedded 65C02 core. The processor core supports
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the additional opcodes/addressing modes of the 65SC02, along with the
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STP and WAI instructions. These instructions will create a set of files
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to create a custom target, named SBC, for <bf>S</bf>ingle <bf>B</bf>oard
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<bf>C</bf>omputer.
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<sect>System Memory Map Definition<p>
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The targeted system uses block RAM contained on the XILINX FPGA for the
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system memory (both RAM and ROM). The block RAMs are available in
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various aspect ratios, and they will be used in this system as 2K*8
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devices. There will be two RAMs used for data storage, starting at
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location $0000 and growing upwards. There will be one ROM (realized as
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initialized RAM) used code storage, starting at location $FFFF and
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growing downwards.
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The cc65 toolset requires a memory configuration file to define the
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memory that is available to the cc65 run-time environment, which is
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defined as follows:
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<tscreen><code>
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MEMORY {
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ZP: start = $0, size = $100, type = rw, define = yes;
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RAM: start = $200, size = $0E00, define = yes;
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ROM: start = $F800, size = $0800, file = %O;
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}
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</code></tscreen>
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ZP defines the available zero page locations, which in this case starts
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at $0 and has a length of $100. Keep in mind that certain systems may
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require access to some zero page locations, so the starting address may
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need to be adjusted accordingly to prevent cc65 from attempting to reuse
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those locations. Also, at a minimum, the cc65 run-time environment uses
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26 zero page locations, so the smallest zero page size that can be
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specified is $1A. The usable RAM memory area begins after the 6502
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stack storage in page 1, so it is defined as starting at location $200
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and filling the remaining 4K of space (4096 - 2 *
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256 = 3584 = $0E00). The 2K of ROM space begins at
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address $F800 and goes to $FFFF (size = $0800).
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Next, the memory segments within the memory devices need to be defined.
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A standard segment definition is used, with one notable exception. The
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interrupt and reset vector locations need to be defined at locations
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$FFFA through $FFFF. A special segment named VECTORS is defined that
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resides at these locations. Later, the interrupt vector map will be
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created and placed in the VECTORS segment, and the linker will put these
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vectors at the proper memory locations. The segment definition is:
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<tscreen><code>
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SEGMENTS {
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ZEROPAGE: load = ZP, type = zp, define = yes;
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DATA: load = ROM, type = rw, define = yes, run = RAM;
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BSS: load = RAM, type = bss, define = yes;
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HEAP: load = RAM, type = bss, optional = yes;
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STARTUP: load = ROM, type = ro;
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ONCE: load = ROM, type = ro, optional = yes;
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CODE: load = ROM, type = ro;
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RODATA: load = ROM, type = ro;
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VECTORS: load = ROM, type = ro, start = $FFFA;
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}
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</code></tscreen>
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The meaning of each of these segments is as follows.
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<p><tt> ZEROPAGE: </tt>Data in page 0, defined by ZP as starting at $0 with length $100
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<p><tt> DATA: </tt>Initialized data that can be modified by the program, stored in RAM
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<p><tt> BSS: </tt>Uninitialized data stored in RAM (used for variable storage)
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<p><tt> HEAP: </tt>Uninitialized C-level heap storage in RAM, optional
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<p><tt> STARTUP: </tt>The program initialization code, stored in ROM
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<p><tt> ONCE: </tt>The code run once to initialize the system, stored in ROM
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<p><tt> CODE: </tt>The program code, stored in ROM
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<p><tt> RODATA: </tt>Initialized data that cannot be modified by the program, stored in ROM
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<p><tt> VECTORS: </tt>The interrupt vector table, stored in ROM at location $FFFA
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A note about initialized data: any variables that require an initial
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value, such as external (global) variables, require that the initial
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values be stored in the ROM code image. However, variables stored in
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ROM cannot change; therefore the data must be moved into variables that
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are located in RAM. Specifying <tt>run = RAM</tt> as part of
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the DATA segment definition will indicate that those variables will
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require their initialization value to be copied via a call to the
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<tt>copydata</tt> routine in the startup assembly code. In addition,
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there are system level variables that will need to be initialized as
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well, especially if the heap segment is used via a C-level call to
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<tt>malloc ()</tt>.
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The final section of the definition file contains the data constructors
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and destructors used for system startup. In addition, if the heap is
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used, the maximum C-level stack size needs to be defined in order for
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the system to be able to reliably allocate blocks of memory. The stack
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size selection must be greater than the maximum amount of storage
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required to run the program, keeping in mind that the C-level subroutine
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call stack and all local variables are stored in this stack. The
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<tt>FEATURES</tt> section defines the required constructor/destructor
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attributes and the <tt>SYMBOLS</tt> section defines the stack size. The
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constructors will be run via a call to <tt>initlib</tt> in the startup
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assembly code and the destructors will be run via an assembly language
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call to <tt>donelib</tt> during program termination.
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<tscreen><code>
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FEATURES {
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CONDES: segment = STARTUP,
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type = constructor,
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label = __CONSTRUCTOR_TABLE__,
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count = __CONSTRUCTOR_COUNT__;
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CONDES: segment = STARTUP,
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type = destructor,
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label = __DESTRUCTOR_TABLE__,
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count = __DESTRUCTOR_COUNT__;
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}
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SYMBOLS {
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# Define the stack size for the application
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__STACKSIZE__: value = $0200, weak = yes;
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}
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</code></tscreen>
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These definitions are placed in a file named "sbc.cfg"
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and are referred to during the ld65 linker stage.
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<sect>Startup Code Definition<p>
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In the cc65 toolset, a startup routine must be defined that is executed
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when the CPU is reset. This startup code is marked with the STARTUP
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segment name, which was defined in the system configuration file as
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being in read only memory. The standard convention used in the
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predefined libraries is that this code is resident in the crt0 module.
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For this custom system, all that needs to be done is to perform a little
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bit of 6502 housekeeping, set up the C-level stack pointer, initialize
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the memory storage, and call the C-level routine <tt>main ()</tt>.
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The following code was used for the crt0 module, defined in the file
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"crt0.s":
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<tscreen><code>
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; ---------------------------------------------------------------------------
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; crt0.s
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; ---------------------------------------------------------------------------
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;
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; Startup code for cc65 (Single Board Computer version)
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.export _init, _exit
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.import _main
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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.import __RAM_START__, __RAM_SIZE__ ; Linker generated
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.import copydata, zerobss, initlib, donelib
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.include "zeropage.inc"
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; ---------------------------------------------------------------------------
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; Place the startup code in a special segment
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.segment "STARTUP"
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; ---------------------------------------------------------------------------
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; A little light 6502 housekeeping
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_init: LDX #$FF ; Initialize stack pointer to $01FF
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TXS
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CLD ; Clear decimal mode
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; ---------------------------------------------------------------------------
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; Set cc65 argument stack pointer
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LDA #<(__RAM_START__ + __RAM_SIZE__)
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STA sp
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LDA #>(__RAM_START__ + __RAM_SIZE__)
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STA sp+1
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; ---------------------------------------------------------------------------
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; Initialize memory storage
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JSR zerobss ; Clear BSS segment
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JSR copydata ; Initialize DATA segment
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JSR initlib ; Run constructors
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; ---------------------------------------------------------------------------
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; Call main()
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JSR _main
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; ---------------------------------------------------------------------------
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; Back from main (this is also the _exit entry): force a software break
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_exit: JSR donelib ; Run destructors
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BRK
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</code></tscreen>
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The following discussion explains the purpose of several important
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assembler level directives in this file.
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<tscreen><verb>
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.export _init, _exit
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</verb></tscreen>
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This line instructs the assembler that the symbols <tt>_init</tt> and
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<tt>_exit</tt> are to be accessible from other modules. In this
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example, <tt>_init</tt> is the location that the CPU should jump to when
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reset, and <tt>_exit</tt> is the location that will be called when the
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program is finished.
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<tscreen><verb>
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.import _main
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</verb></tscreen>
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This line instructs the assembler to import the symbol <tt>_main</tt>
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from another module. cc65 names all C-level routines as
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{underscore}{name} in assembler, thus the <tt>main ()</tt> routine
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in C is named <tt>_main</tt> in the assembler. This is how the startup
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code will link to the C-level code.
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<tscreen><verb>
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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</verb></tscreen>
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This line marks this code as startup code (code that is executed when
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the processor is reset), which will then be automatically linked into
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the executable code.
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<tscreen><verb>
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.import __RAM_START__, __RAM_SIZE__ ; Linker generated
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</verb></tscreen>
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This line imports the RAM starting address and RAM size constants, which
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are used to initialize the cc65 C-level argument stack pointer.
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<tscreen><verb>
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.segment "STARTUP"
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</verb></tscreen>
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This line instructs the assembler that the code is to be placed in the
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STARTUP segment of memory.
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<tscreen><verb>
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JSR zerobss ; Clear BSS segment
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JSR copydata ; Initialize DATA segment
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JSR initlib ; Run constructors
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</verb></tscreen>
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These three lines initialize the external (global) and system
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variables. The first line sets the BSS segment -- the memory locations
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used for external variables -- to 0. The second line copies the
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initialization value stored in ROM to the RAM locations used for
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initialized external variables. The last line runs the constructors
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that are used to initialize the system run-time variables.
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<tscreen><verb>
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JSR _main
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</verb></tscreen>
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This is the actual call to the C-level <tt>main ()</tt> routine,
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which is called after the startup code completes.
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<tscreen><verb>
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_exit: JSR donelib ; Run destructors
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BRK
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</verb></tscreen>
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This is the code that will be executed when <tt>main ()</tt>
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terminates. The first thing that must be done is run the destructors
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via a call to <tt>donelib</tt>. Then the program can terminate. In
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this example, the program is expected to run forever. Therefore, there
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needs to be a way of indicating when something has gone wrong and the
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system needs to be shut down, requiring a restart only by a hard reset.
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The BRK instruction will be used to indicate a software fault. This is
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advantageous because cc65 uses the BRK instruction as the fill byte in
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the final binary code. In addition, the hardware has been designed to
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force the data lines to $00 for all illegal memory accesses, thereby
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also forcing a BRK instruction into the CPU.
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<sect>Custom Run-Time Library Creation<p>
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The next step in customizing the cc65 toolset is creating a run-time
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library for the targeted hardware. The easiest way to do this is to
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modify a standard library from the cc65 distribution. In this example,
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there is no console I/O, mouse, joystick, etc. in the system, so it is
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most appropriate to use the simplest library as the base, which is for
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the Watara Supervision and is named "supervision.lib" in the
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lib directory of the distribution.
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The only modification required is to replace the <tt>crt0</tt> module in
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the supervision.lib library with custom startup code. This is simply
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done by first copying the library and giving it a new name, compiling
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the startup code with ca65, and finally using the ar65 archiver to
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replace the module in the new library. The steps are shown below:
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<tscreen><verb>
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$ copy "C:\Program Files\cc65\lib\supervision.lib" sbc.lib
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$ ca65 crt0.s
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$ ar65 a sbc.lib crt0.o
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</verb></tscreen>
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<sect>Interrupt Service Routine Definition<p>
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For this system, the CPU is put into a wait condition prior to allowing
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interrupt processing. Therefore, the interrupt service routine is very
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simple: return from all valid interrupts. However, as mentioned
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before, the BRK instruction is used to indicate a software fault, which
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will call the same interrupt service routine as the maskable interrupt
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signal IRQ. The interrupt service routine must be able to tell the
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difference between the two, and act appropriately.
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The interrupt service routine shown below includes code to detect when a
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BRK instruction has occurred and stops the CPU from further processing.
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The interrupt service routine is in a file named
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"interrupt.s".
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<tscreen><code>
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; ---------------------------------------------------------------------------
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; interrupt.s
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; ---------------------------------------------------------------------------
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;
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; Interrupt handler.
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;
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; Checks for a BRK instruction and returns from all valid interrupts.
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.import _stop
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.export _irq_int, _nmi_int
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.segment "CODE"
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.PC02 ; Force 65C02 assembly mode
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; ---------------------------------------------------------------------------
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; Non-maskable interrupt (NMI) service routine
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_nmi_int: RTI ; Return from all NMI interrupts
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; ---------------------------------------------------------------------------
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; Maskable interrupt (IRQ) service routine
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_irq_int: PHX ; Save X register contents to stack
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TSX ; Transfer stack pointer to X
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PHA ; Save accumulator contents to stack
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INX ; Increment X so it points to the status
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INX ; register value saved on the stack
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LDA $100,X ; Load status register contents
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AND #$10 ; Isolate B status bit
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BNE break ; If B = 1, BRK detected
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; ---------------------------------------------------------------------------
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; IRQ detected, return
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irq: PLA ; Restore accumulator contents
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PLX ; Restore X register contents
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RTI ; Return from all IRQ interrupts
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; ---------------------------------------------------------------------------
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; BRK detected, stop
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break: JMP _stop ; If BRK is detected, something very bad
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; has happened, so stop running
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</code></tscreen>
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The following discussion explains the purpose of several important
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assembler level directives in this file.
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<tscreen><verb>
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.import _stop
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</verb></tscreen>
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This line instructs the assembler to import the symbol <tt>_stop</tt>
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from another module. This routine will be called if a BRK instruction
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is encountered, signaling a software fault.
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<tscreen><verb>
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.export _irq_int, _nmi_int
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</verb></tscreen>
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This line instructs the assembler that the symbols <tt>_irq_int</tt> and
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<tt>_nmi_int</tt> are to be accessible from other modules. In this
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example, the address of these symbols will be placed in the interrupt
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vector table.
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<tscreen><verb>
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.segment "CODE"
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</verb></tscreen>
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This line instructs the assembler that the code is to be placed in the
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CODE segment of memory. Note that because there are 65C02 mnemonics in
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the assembly code, the assembler is forced to use the 65C02 instruction
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set with the <tt>.PC02</tt> directive.
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The final step is to define the interrupt vector memory locations.
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Recall that a segment named VECTORS was defined in the memory
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configuration file, which started at location $FFFA. The addresses of
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the interrupt service routines from "interrupt.s" along with
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the address for the initialization code in crt0 are defined in a file
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named "vectors.s". Note that these vectors will be placed in
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memory in their proper little-endian format as:
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<p><tt> $FFFA - $FFFB:</tt> NMI interrupt vector (low byte, high byte)
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<p><tt> $FFFC - $FFFD:</tt> Reset vector (low byte, high byte)
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<p><tt> $FFFE - $FFFF:</tt> IRQ/BRK interrupt vector (low byte, high byte)
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using the <tt>.addr</tt> assembler directive. The contents of the file are:
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<tscreen><code>
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; ---------------------------------------------------------------------------
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; vectors.s
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; ---------------------------------------------------------------------------
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;
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; Defines the interrupt vector table.
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.import _init
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.import _nmi_int, _irq_int
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.segment "VECTORS"
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.addr _nmi_int ; NMI vector
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.addr _init ; Reset vector
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.addr _irq_int ; IRQ/BRK vector
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</code></tscreen>
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The cc65 toolset will replace the address symbols defined here with the
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actual addresses of the routines during the link process.
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<sect>Adding Custom Instructions<p>
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The cc65 instruction set only supports the WAI (Wait for Interrupt) and
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STP (Stop) instructions when used with the 65816 CPU (accessed via the
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--cpu command line option of the ca65 macro assembler). The 65C02 core
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used in this example supports these two instructions, and in fact the
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system benefits from the use of both the WAI and STP instructions.
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In order to use the WAI instruction in this case, a C routine named
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"wait" was created that consists of the WAI opcode followed by
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a subroutine return. It was convenient in this example to put the IRQ
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interrupt enable in this subroutine as well, since interrupts should
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only be enabled when the code is in this wait condition.
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For both the WAI and STP instructions, the assembler is
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"fooled" into placing those opcodes into memory by inserting a
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single byte of data that just happens to be the opcode for those
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instructions. The assembly code routines are placed in a file, named
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"wait.s", which is shown below:
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<tscreen><code>
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; ---------------------------------------------------------------------------
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; wait.s
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; ---------------------------------------------------------------------------
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;
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; Wait for interrupt and return
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.export _wait, _stop
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; ---------------------------------------------------------------------------
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; Wait for interrupt: Forces the assembler to emit a WAI opcode ($CB)
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; ---------------------------------------------------------------------------
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.segment "CODE"
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.proc _wait: near
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CLI ; Enable interrupts
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.byte $CB ; Inserts a WAI opcode
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RTS ; Return to caller
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.endproc
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; ---------------------------------------------------------------------------
|
|
; Stop: Forces the assembler to emit a STP opcode ($DB)
|
|
; ---------------------------------------------------------------------------
|
|
|
|
.proc _stop: near
|
|
|
|
.byte $DB ; Inserts a STP opcode
|
|
|
|
.endproc
|
|
</code></tscreen>
|
|
|
|
The label <tt>_wait</tt>, when exported, can be called by using the
|
|
<tt>wait ()</tt> subroutine call in C. The section is marked as
|
|
code so that it will be stored in read-only memory, and the procedure is
|
|
tagged for 16-bit absolute addressing via the "near"
|
|
modifier. Similarly, the <tt>_stop</tt> routine can be called from
|
|
within the C-level code via a call to <tt>stop ()</tt>. In
|
|
addition, the routine can be called from assembly code by calling
|
|
<tt>_stop</tt> (as was done in the interrupt service routine).
|
|
|
|
<sect>Hardware Drivers<p>
|
|
|
|
Oftentimes, it can be advantageous to create small application helpers
|
|
in assembly language to decrease codespace and increase execution speed
|
|
of the overall program. An example of this would be the transfer of
|
|
characters to a FIFO (<bf>F</bf>irst-<bf>I</bf>n,
|
|
<bf>F</bf>irst-<bf>O</bf>ut) storage buffer for transmission over a
|
|
serial port. This simple action could be performed by an assembly
|
|
language driver which would execute much quicker than coding it in C.
|
|
The following discussion outlines a method of interfacing a C program
|
|
with an assembly language subroutine.
|
|
|
|
The first step in creating the assembly language code for the driver is
|
|
to determine how to pass the C arguments to the assembly language
|
|
routine. The cc65 toolset allows the user to specify whether the data
|
|
is passed to a subroutine via the stack or by the processor registers by
|
|
using the <tt/__fastcall__/ and <tt/__cdecl__/ function qualifiers (note that
|
|
there are two underscore characters in front of and two behind each
|
|
qualifier). <tt/__fastcall__/ is the default. When <tt/__cdecl__/ <em/isn't/
|
|
specified, and the function isn't variadic (i.e., its prototype doesn't have
|
|
an ellipsis), the rightmost argument in the function call is passed to the
|
|
subroutine using the 6502 registers instead of the stack. Note that if
|
|
there is only one argument in the function call, the execution overhead
|
|
required by the stack interface routines is completely avoided.
|
|
|
|
With <tt/__cdecl__</tt>, the last argument is loaded into the A and X
|
|
registers and then pushed onto the stack via a call to <tt>pushax</tt>.
|
|
The first thing the subroutine does is retrieve the argument from the
|
|
stack via a call to <tt>ldax0sp</tt>, which copies the values into the A
|
|
and X. When the subroutine is finished, the values on the stack must be
|
|
popped off and discarded via a jump to <tt>incsp2</tt>, which includes
|
|
the RTS subroutine return command. This is shown in the following code
|
|
sample.
|
|
|
|
Calling sequence:
|
|
|
|
<tscreen><verb>
|
|
lda #<(L0001) ; Load A with the high order byte
|
|
ldx #>(L0001) ; Load X with the low order byte
|
|
jsr pushax ; Push A and X onto the stack
|
|
jsr _foo ; Call foo, i.e., foo (arg)
|
|
</verb></tscreen>
|
|
|
|
Subroutine code:
|
|
|
|
<tscreen><verb>
|
|
_foo: jsr ldax0sp ; Retrieve A and X from the stack
|
|
sta ptr ; Store A in ptr
|
|
stx ptr+1 ; Store X in ptr+1
|
|
... ; (more subroutine code goes here)
|
|
jmp incsp2 ; Pop A and X from the stack (includes return)
|
|
</verb></tscreen>
|
|
|
|
If <tt/__cdecl__/ isn't specified, then the argument is loaded into the A
|
|
and X registers as before, but the subroutine is then called
|
|
immediately. The subroutine does not need to retrieve the argument
|
|
since the value is already available in the A and X registers.
|
|
Furthermore, the subroutine can be terminated with an RTS statement
|
|
since there is no stack cleanup which needs to be performed. This is
|
|
shown in the following code sample.
|
|
|
|
Calling sequence:
|
|
|
|
<tscreen><verb>
|
|
lda #<(L0001) ; Load A with the high order byte
|
|
ldx #>(L0001) ; Load X with the low order byte
|
|
jsr _foo ; Call foo, i.e., foo (arg)
|
|
</verb></tscreen>
|
|
|
|
Subroutine code:
|
|
|
|
<tscreen><verb>
|
|
_foo: sta ptr ; Store A in ptr
|
|
stx ptr+1 ; Store X in ptr+1
|
|
... ; (more subroutine code goes here)
|
|
rts ; Return from subroutine
|
|
</verb></tscreen>
|
|
|
|
The hardware driver in this example writes a string of character data to
|
|
a hardware FIFO located at memory location $1000. Each character is
|
|
read and is compared to the C string termination value ($00), which will
|
|
terminate the loop. All other character data is written to the FIFO.
|
|
For convenience, a carriage return/line feed sequence is automatically
|
|
appended to the serial stream. The driver defines a local pointer
|
|
variable which is stored in the zero page memory space in order to allow
|
|
for retrieval of each character in the string via the indirect indexed
|
|
addressing mode.
|
|
|
|
The assembly language routine is stored in a file names
|
|
"rs232_tx.s" and is shown below:
|
|
|
|
<tscreen><code>
|
|
; ---------------------------------------------------------------------------
|
|
; rs232_tx.s
|
|
; ---------------------------------------------------------------------------
|
|
;
|
|
; Write a string to the transmit UART FIFO
|
|
|
|
.export _rs232_tx
|
|
.exportzp _rs232_data: near
|
|
|
|
.define TX_FIFO $1000 ; Transmit FIFO memory location
|
|
|
|
.zeropage
|
|
|
|
_rs232_data: .res 2, $00 ; Reserve a local zero page pointer
|
|
|
|
.segment "CODE"
|
|
|
|
.proc _rs232_tx: near
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; Store pointer to zero page memory and load first character
|
|
|
|
sta _rs232_data ; Set zero page pointer to string address
|
|
stx _rs232_data+1 ; (pointer passed in via the A/X registers)
|
|
ldy #00 ; Initialize Y to 0
|
|
lda (_rs232_data) ; Load first character
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; Main loop: read data and store to FIFO until \0 is encountered
|
|
|
|
loop: sta TX_FIFO ; Loop: Store character in FIFO
|
|
iny ; Increment Y index
|
|
lda (_rs232_data),y ; Get next character
|
|
bne loop ; If character == 0, exit loop
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; Append CR/LF to output stream and return
|
|
|
|
lda #$0D ; Store CR
|
|
sta TX_FIFO
|
|
lda #$0A ; Store LF
|
|
sta TX_FIFO
|
|
rts ; Return
|
|
|
|
.endproc
|
|
</code></tscreen>
|
|
|
|
<sect>Hello World! Example<p>
|
|
|
|
The following short example demonstrates programming in C using the cc65
|
|
toolset with a custom run-time environment. In this example, a Xilinx
|
|
FPGA contains a UART which is connected to a 65c02 processor with FIFO
|
|
(<bf>F</bf>irst-<bf>I</bf>n, <bf>F</bf>irst-<bf>O</bf>ut) storage to
|
|
buffer the data. The C program will wait for an interrupt generated by
|
|
the receive UART and then respond by transmitting the string "Hello
|
|
World! " every time a question mark character is received via a
|
|
call to the hardware driver <tt>rs232_tx ()</tt>. The driver
|
|
prototype uses the <tt>__fastcall__</tt> extension to indicate that the
|
|
driver does not use the stack. The FIFO data interface is at address
|
|
$1000 and is defined as the symbolic constant <tt>FIFO_DATA</tt>.
|
|
Writing to <tt>FIFO_DATA</tt> transfers a byte of data into the transmit
|
|
FIFO for subsequent transmission over the serial interface. Reading
|
|
from <tt>FIFO_DATA</tt> transfers a byte of previously received data out
|
|
of the receive FIFO. The FIFO status data is at address $1001 and is
|
|
defined as the symbolic constant <tt>FIFO_STATUS</tt>. For convenience,
|
|
the symbolic constants <tt>TX_FIFO_FULL</tt> (which isolates bit 0 of
|
|
the register) and <tt>RX_FIFO_EMPTY</tt> (which isolates bit 1 of the
|
|
register) have been defined to read the FIFO status.
|
|
|
|
The following C code is saved in the file "main.c". As this
|
|
example demonstrates, the run-time environment has been set up such that
|
|
all of the behind-the-scene work is transparent to the user.
|
|
|
|
<tscreen><code>
|
|
#define FIFO_DATA (*(unsigned char *) 0x1000)
|
|
#define FIFO_STATUS (*(unsigned char *) 0x1001)
|
|
|
|
#define TX_FIFO_FULL (FIFO_STATUS & 0x01)
|
|
#define RX_FIFO_EMPTY (FIFO_STATUS & 0x02)
|
|
|
|
extern void wait ();
|
|
extern void __fastcall__ rs232_tx (char *str);
|
|
|
|
int main () {
|
|
while (1) { // Run forever
|
|
wait (); // Wait for an RX FIFO interrupt
|
|
|
|
while (RX_FIFO_EMPTY == 0) { // While the RX FIFO is not empty
|
|
if (FIFO_DATA == '?') { // Does the RX character = '?'
|
|
rs232_tx ("Hello World!"); // Transmit "Hello World!"
|
|
} // Discard any other RX characters
|
|
}
|
|
}
|
|
|
|
return (0); // We should never get here!
|
|
}
|
|
</code></tscreen>
|
|
|
|
<sect>Putting It All Together<p>
|
|
|
|
The following commands will create a ROM image named "a.out"
|
|
that can be used as the initialization data for the Xilinx Block RAM
|
|
used for code storage:
|
|
|
|
<tscreen><verb>
|
|
$ cc65 -t none -O --cpu 65sc02 main.c
|
|
$ ca65 --cpu 65sc02 main.s
|
|
$ ca65 --cpu 65sc02 rs232_tx.s
|
|
$ ca65 --cpu 65sc02 interrupt.s
|
|
$ ca65 --cpu 65sc02 vectors.s
|
|
$ ca65 --cpu 65sc02 wait.s
|
|
$ ld65 -C sbc.cfg -m main.map interrupt.o vectors.o wait.o rs232_tx.o
|
|
main.o sbc.lib
|
|
</verb></tscreen>
|
|
|
|
During the C-level code compilation phase (<tt>cc65</tt>), assumptions
|
|
about the target system are disabled via the <tt>-t none</tt> command
|
|
line option. During the object module linker phase (<tt>ld65</tt>), the
|
|
target customization is enabled via inclusion of the <tt>sbc.lib</tt>
|
|
file and the selection of the configuration file via the <tt>-C
|
|
sbc.cfg</tt> command line option.
|
|
|
|
The 65C02 core used most closely matches the cc65 toolset processor
|
|
named 65SC02 (the 65C02 extensions without the bit manipulation
|
|
instructions), so all the commands specify the use of that processor via
|
|
the <tt>--cpu 65sc02</tt> option.
|
|
|
|
</article>
|