mirror of
https://github.com/jborza/emu6502.git
synced 2024-10-07 01:57:49 +00:00
implemented TAX,TXA,TAY,TYA, DEX, DEY, INX, INY
This commit is contained in:
parent
c034141ee5
commit
c8824992c6
54
cpu.c
54
cpu.c
@ -11,20 +11,28 @@ void* unimplemented_instruction(State6502* state) {
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}
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void set_NV_flags(State6502* state, byte value) {
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//TODO implement V flag
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//N flag
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state->flags.n = ((1 << 7) & value) != 0;
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//TODO implement NV flags
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}
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void set_NZ_flags(State6502 * state, byte value) {
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//Z flag
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if (value) {
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state->flags.z = 0;
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}
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else {
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state->flags.z = 1;
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}
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//N flag
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state->flags.n = ((1 << 7) & value) != 0;
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}
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void clear_flags(State6502* state) {
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void clear_flags(State6502 * state) {
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memcpy(&state->flags, &state->a, 1);
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}
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void clear_state(State6502* state) {
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void clear_state(State6502 * state) {
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state->a = 0;
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state->x = 0;
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state->y = 0;
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@ -34,49 +42,49 @@ void clear_state(State6502* state) {
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state->running = 1;
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}
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byte pop_byte(State6502* state) {
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byte pop_byte(State6502 * state) {
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return state->memory[state->pc++];
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}
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//bitwise or with accumulator
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void ORA(State6502* state, byte operand) {
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void ORA(State6502 * state, byte operand) {
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byte result = state->a | operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//bitwise and with accumulator
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void AND(State6502* state, byte operand) {
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void AND(State6502 * state, byte operand) {
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byte result = state->a & operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//load accumulator
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void LDA(State6502* state, byte operand) {
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void LDA(State6502 * state, byte operand) {
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state->a = operand;
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set_NV_flags(state, state->a);
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}
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void LDX(State6502* state, byte operand) {
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void LDX(State6502 * state, byte operand) {
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state->x = operand;
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set_NV_flags(state, state->x);
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}
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void LDY(State6502* state, byte operand) {
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void LDY(State6502 * state, byte operand) {
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state->y = operand;
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set_NV_flags(state, state->y);
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}
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void STX(State6502* state, word address) {
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void STX(State6502 * state, word address) {
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state->memory[address] = state->x;
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}
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void STY(State6502* state, word address) {
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void STY(State6502 * state, word address) {
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state->memory[address] = state->y;
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}
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word pop_word(State6502* state) {
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word pop_word(State6502 * state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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word result = (high << 8) | low;
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@ -87,7 +95,7 @@ word read_word(State6502 * state, word address) {
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return state->memory[address] | state->memory[address + 1] << 8;
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}
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word get_address_zero_page(State6502* state) {
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word get_address_zero_page(State6502 * state) {
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return pop_byte(state);
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}
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@ -97,7 +105,7 @@ byte get_byte_zero_page(State6502 * state) {
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return state->memory[address];
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}
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word get_address_zero_page_x(State6502* state) {
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word get_address_zero_page_x(State6502 * state) {
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//address is zero page, so wraparound byte
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byte address = pop_byte(state) + state->x;
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return address;
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@ -108,7 +116,7 @@ byte get_byte_zero_page_x(State6502 * state) {
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return state->memory[address];
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}
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word get_address_zero_page_y(State6502* state) {
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word get_address_zero_page_y(State6502 * state) {
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//address is zero page, so wraparound byte
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byte address = pop_byte(state) + state->y;
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return address;
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@ -215,10 +223,10 @@ int emulate_6502_op(State6502 * state) {
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case SEC: unimplemented_instruction(state); break;
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case SED: unimplemented_instruction(state); break;
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case SEI: unimplemented_instruction(state); break;
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case TAX: unimplemented_instruction(state); break;
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case TXA: unimplemented_instruction(state); break;
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case TAY: unimplemented_instruction(state); break;
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case TYA: unimplemented_instruction(state); break;
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case TAX: state->x = state->a; set_NZ_flags(state, state->x); break; //TODO test
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case TXA: state->a = state->x; set_NZ_flags(state, state->a); break; //TODO test
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case TAY: state->y = state->a; set_NZ_flags(state, state->y); break; //TODO test
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case TYA: state->a = state->y; set_NZ_flags(state, state->a); break; //TODO test
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case TSX: unimplemented_instruction(state); break;
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case TXS: unimplemented_instruction(state); break;
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case CMP_IMM: unimplemented_instruction(state); break;
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@ -239,10 +247,10 @@ int emulate_6502_op(State6502 * state) {
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case DEC_ZPX: unimplemented_instruction(state); break;
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case DEC_ABS: unimplemented_instruction(state); break;
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case DEC_ABSX: unimplemented_instruction(state); break;
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case DEX: unimplemented_instruction(state); break;
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case DEY: unimplemented_instruction(state); break;
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case INX: unimplemented_instruction(state); break;
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case INY: unimplemented_instruction(state); break;
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case DEX: state->x -= 1; set_NZ_flags(state, state->x); break;
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case DEY: state->y -= 1; set_NZ_flags(state, state->y); break;
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case INX: state->x += 1; set_NZ_flags(state, state->x); break;
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case INY: state->y += 1; set_NZ_flags(state, state->y); break;
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case EOR_IMM: unimplemented_instruction(state); break;
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case EOR_ZP: unimplemented_instruction(state); break;
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case EOR_ZPX: unimplemented_instruction(state); break;
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