mirror of
https://github.com/jborza/emu6502.git
synced 2024-11-19 10:31:21 +00:00
182 lines
4.0 KiB
C
182 lines
4.0 KiB
C
#include "state.h"
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#include "cpu.h"
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#include "opcodes.h"
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#include <stdio.h>
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#include <memory.h>
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void* unimplemented_instruction(State6502* state) {
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printf("Error: unimplemented instruction\n");
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exit(1);
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}
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void set_NV_flags(State6502* state, byte value) {
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//TODO implement V flag
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if (value) {
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state->flags.z = 0;
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}
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else {
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state->flags.z = 1;
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}
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}
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void clear_flags(State6502* state) {
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memcpy(&state->flags, &state->a, 1);
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}
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void clear_state(State6502* state) {
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state->a = 0;
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state->x = 0;
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state->y = 0;
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state->pc = 0;
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state->sp = 0;
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clear_flags(state);
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state->running = 1;
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}
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byte pop_byte(State6502* state) {
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return state->memory[state->pc++];
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}
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//bitwise or with accumulator
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void ORA(State6502 * state, byte operand) {
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byte result = state->a | operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//load accumulator
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void LDA(State6502 * state, byte operand) {
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state->a = operand;
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set_NV_flags(state, state->a);
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}
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word pop_word(State6502 * state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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word result = (high << 8) | low;
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return result;
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}
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word read_word(State6502 * state, word address) {
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return state->memory[address] | state->memory[address + 1] << 8;
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}
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int emulate_6502_op(State6502 * state) {
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byte* opcode = &state->memory[state->pc++];
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switch (*opcode) {
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case BRK: state->running = 0;
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state->flags.b = 1;
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break; //BRK
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case NOP: break; //NOP
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case ORA_INDX: //ORA, indirect, x
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//The address to be accessed by an instruction using X register indexed absolute addressing is computed by taking the 16 bit address
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//from the instruction and added the contents of the X register.
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//For example if X contains $92 then an STA $2000,X instruction will store the accumulator at $2092 (e.g. $2000 + $92). (STA)
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{
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word address_indirect = pop_word(state) + state->x;
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word address = read_word(state, address_indirect);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ZP: //ORA, zero page
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{
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byte address = pop_byte(state);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_INDY: //ORA, indirect, y (post_indexed)
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{
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word address_indirect = pop_word(state);
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word address = read_word(state, address_indirect) + state->y;
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ORA(state, state->memory[address]);
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unimplemented_instruction(state);
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break;
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}
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case ORA_IMM:
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ORA(state, pop_byte(state));
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break;
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case ORA_ZPX:
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{
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byte address = pop_byte(state) + state->x;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABS:
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{
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word address = pop_word(state);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABSX:
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{
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word address = pop_word(state) + state->x;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABSY:
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{
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word address = pop_word(state) + state->y;
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ORA(state, state->memory[address]);
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break;
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}
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case LDA_IMM:
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{
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LDA(state, pop_byte(state));
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break;
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}
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case LDA_ZP:
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{
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byte address = pop_byte(state);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ZPX:
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{
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byte address = pop_byte(state) + state->x;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABS:
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{
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word address = pop_word(state);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABSX:
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{
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word address = pop_word(state) + state->x;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABSY:
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{
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word address = pop_word(state) + state->y;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_INDX:
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{
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//pre-indexed indirect
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//zero-page address is added to x register
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byte indirect_address = pop_byte(state) + state->x;
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//pointing to address of a word holding the address of the operand
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word address = read_word(state, indirect_address);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_INDY:
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{
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//post-indexed indirect
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//zero-page address as an argument
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byte indirect_address = pop_byte(state);
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//the address and the following byte is read as a word, adding Y register
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word address = read_word(state, indirect_address) + state->y;
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LDA(state, state->memory[address]);
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break;
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}
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default:
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unimplemented_instruction(state); break;
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}
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return 0;
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}
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