mirror of
https://github.com/jborza/emu6502.git
synced 2024-09-06 15:54:24 +00:00
288 lines
11 KiB
C
288 lines
11 KiB
C
#include "state.h"
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#include "cpu.h"
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#include "opcodes.h"
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#include <stdio.h>
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#include <memory.h>
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#include <stdlib.h>
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void* unimplemented_instruction(State6502* state) {
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printf("Error: unimplemented instruction\n");
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exit(1);
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}
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void set_NV_flags(State6502* state, byte value) {
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//TODO implement V flag
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if (value) {
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state->flags.z = 0;
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}
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else {
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state->flags.z = 1;
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}
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}
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void clear_flags(State6502* state) {
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memcpy(&state->flags, &state->a, 1);
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}
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void clear_state(State6502* state) {
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state->a = 0;
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state->x = 0;
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state->y = 0;
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state->pc = 0;
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state->sp = 0;
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clear_flags(state);
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state->running = 1;
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}
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byte pop_byte(State6502* state) {
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return state->memory[state->pc++];
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}
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//bitwise or with accumulator
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void ORA(State6502* state, byte operand) {
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byte result = state->a | operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//bitwise and with accumulator
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void AND(State6502* state, byte operand) {
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byte result = state->a & operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//load accumulator
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void LDA(State6502* state, byte operand) {
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state->a = operand;
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set_NV_flags(state, state->a);
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}
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word pop_word(State6502* state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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word result = (high << 8) | low;
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return result;
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}
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word read_word(State6502 * state, word address) {
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return state->memory[address] | state->memory[address + 1] << 8;
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}
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byte get_byte_zero_page(State6502 * state) {
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//8 bit addressing, only the first 256 bytes of the memory
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byte address = pop_byte(state);
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return state->memory[address];
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}
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byte get_byte_zero_page_x(State6502 * state) {
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byte address = pop_byte(state) + state->x;
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return state->memory[address];
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}
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byte get_byte_zero_page_y(State6502 * state) {
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byte address = pop_byte(state) + state->y;
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return state->memory[address];
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}
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byte get_byte_absolute(State6502 * state)
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{
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//absolute indexed, 16 bits
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word address = pop_word(state);
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return state->memory[address];
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}
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byte get_byte_absolute_x(State6502 * state) {
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//absolute added with the contents of x register
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word address = pop_word(state) + state->x;
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return state->memory[address];
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}
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byte get_byte_absolute_y(State6502 * state) {
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//absolute added with the contents of y register
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word address = pop_word(state) + state->y;
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return state->memory[address];
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}
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byte get_byte_indirect_x(State6502 * state) {
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//pre-indexed indirect with the X register
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//zero-page address is added to x register
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byte indirect_address = pop_byte(state) + state->x;
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//pointing to address of a word holding the address of the operand
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word address = read_word(state, indirect_address);
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return state->memory[address];
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}
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byte get_byte_indirect_y(State6502 * state) {
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//post-indexed indirect
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//zero-page address as an argument
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byte indirect_address = pop_byte(state);
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//the address and the following byte is read as a word, adding Y register
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word address = read_word(state, indirect_address) + state->y;
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return state->memory[address];
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}
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int emulate_6502_op(State6502 * state) {
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byte* opcode = &state->memory[state->pc++];
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switch (*opcode) {
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case ADC_IMM: unimplemented_instruction(state); break;
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case ADC_ZP: unimplemented_instruction(state); break;
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case ADC_ZPX: unimplemented_instruction(state); break;
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case ADC_ABS: unimplemented_instruction(state); break;
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case ADC_ABSX: unimplemented_instruction(state); break;
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case ADC_ABSY: unimplemented_instruction(state); break;
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case ADC_INDX: unimplemented_instruction(state); break;
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case ADC_INDY: unimplemented_instruction(state); break;
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case AND_IMM: AND(state, pop_byte(state)); break;
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case AND_ZP: AND(state, get_byte_zero_page(state)); break;
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case AND_ZPX: AND(state, get_byte_zero_page_x(state)); break;
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case AND_ABS: AND(state, get_byte_absolute(state)); break;
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case AND_ABSX: AND(state, get_byte_absolute_x(state)); break;
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case AND_ABSY: AND(state, get_byte_absolute_y(state)); break;
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case AND_INDX: AND(state, get_byte_indirect_x(state)); break;
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case AND_INDY: AND(state, get_byte_indirect_y(state)); break;
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case ASL_ACC: unimplemented_instruction(state); break;
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case ASL_ZP: unimplemented_instruction(state); break;
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case ASL_ZPX: unimplemented_instruction(state); break;
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case ASL_ABS: unimplemented_instruction(state); break;
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case ASL_ABSX: unimplemented_instruction(state); break;
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case BCC_REL: unimplemented_instruction(state); break;
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case BCS_REL: unimplemented_instruction(state); break;
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case BEQ_REL: unimplemented_instruction(state); break;
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case BMI_REL: unimplemented_instruction(state); break;
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case BNE_REL: unimplemented_instruction(state); break;
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case BPL_REL: unimplemented_instruction(state); break;
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case BVC_REL: unimplemented_instruction(state); break;
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case BVS_REL: unimplemented_instruction(state); break;
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case BIT_ZP: unimplemented_instruction(state); break;
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case BIT_ABS: unimplemented_instruction(state); break;
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case BRK: state->running = 0;
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state->flags.b = 1;
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break; //BRK
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case CLC: unimplemented_instruction(state); break;
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case CLD: unimplemented_instruction(state); break;
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case CLI: unimplemented_instruction(state); break;
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case CLV: unimplemented_instruction(state); break;
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case NOP: break; //NOP
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case PHA: unimplemented_instruction(state); break;
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case PLA: unimplemented_instruction(state); break;
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case PHP: unimplemented_instruction(state); break;
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case PLP: unimplemented_instruction(state); break;
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case RTI: unimplemented_instruction(state); break;
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case RTS: unimplemented_instruction(state); break;
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case SEC: unimplemented_instruction(state); break;
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case SED: unimplemented_instruction(state); break;
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case SEI: unimplemented_instruction(state); break;
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case TAX: unimplemented_instruction(state); break;
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case TXA: unimplemented_instruction(state); break;
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case TAY: unimplemented_instruction(state); break;
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case TYA: unimplemented_instruction(state); break;
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case TSX: unimplemented_instruction(state); break;
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case TXS: unimplemented_instruction(state); break;
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case CMP_IMM: unimplemented_instruction(state); break;
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case CMP_ZP: unimplemented_instruction(state); break;
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case CMP_ZPX: unimplemented_instruction(state); break;
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case CMP_ABS: unimplemented_instruction(state); break;
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case CMP_ABSX: unimplemented_instruction(state); break;
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case CMP_ABSY: unimplemented_instruction(state); break;
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case CMP_INDX: unimplemented_instruction(state); break;
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case CMP_INDY: unimplemented_instruction(state); break;
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case CPX_IMM: unimplemented_instruction(state); break;
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case CPX_ZP: unimplemented_instruction(state); break;
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case CPX_ABS: unimplemented_instruction(state); break;
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case CPY_IMM: unimplemented_instruction(state); break;
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case CPY_ZP: unimplemented_instruction(state); break;
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case CPY_ABS: unimplemented_instruction(state); break;
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case DEC_ZP: unimplemented_instruction(state); break;
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case DEC_ZPX: unimplemented_instruction(state); break;
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case DEC_ABS: unimplemented_instruction(state); break;
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case DEC_ABSX: unimplemented_instruction(state); break;
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case DEX: unimplemented_instruction(state); break;
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case DEY: unimplemented_instruction(state); break;
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case INX: unimplemented_instruction(state); break;
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case INY: unimplemented_instruction(state); break;
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case EOR_IMM: unimplemented_instruction(state); break;
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case EOR_ZP: unimplemented_instruction(state); break;
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case EOR_ZPX: unimplemented_instruction(state); break;
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case EOR_ABS: unimplemented_instruction(state); break;
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case EOR_ABSX: unimplemented_instruction(state); break;
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case EOR_ABSY: unimplemented_instruction(state); break;
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case EOR_INDX: unimplemented_instruction(state); break;
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case EOR_INDY: unimplemented_instruction(state); break;
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case INC_ZP: unimplemented_instruction(state); break;
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case INC_ZPX: unimplemented_instruction(state); break;
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case INC_ABS: unimplemented_instruction(state); break;
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case INC_ABSX: unimplemented_instruction(state); break;
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case JMP_ABS: unimplemented_instruction(state); break;
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case JMP_IND: unimplemented_instruction(state); break;
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case JSR_ABS: unimplemented_instruction(state); break;
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case LDA_IMM: LDA(state, pop_byte(state)); break;
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case LDA_ZP: LDA(state, get_byte_zero_page(state)); break;
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case LDA_ZPX: LDA(state, get_byte_zero_page_x(state)); break;
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case LDA_ABS: LDA(state, get_byte_absolute(state)); break;
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case LDA_ABSX: LDA(state, get_byte_absolute_x(state)); break;
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case LDA_ABSY: LDA(state, get_byte_absolute_y(state)); break;
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case LDA_INDX: LDA(state, get_byte_indirect_x(state)); break;
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case LDA_INDY: LDA(state, get_byte_indirect_y(state)); break;
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case LDX_IMM: unimplemented_instruction(state); break;
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case LDX_ZP: unimplemented_instruction(state); break;
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case LDX_ZPY: unimplemented_instruction(state); break;
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case LDX_ABS: unimplemented_instruction(state); break;
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case LDX_ABSY: unimplemented_instruction(state); break;
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case LDY_IMM: unimplemented_instruction(state); break;
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case LDY_ZP: unimplemented_instruction(state); break;
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case LDY_ZPX: unimplemented_instruction(state); break;
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case LDY_ABS: unimplemented_instruction(state); break;
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case LDY_ABSX: unimplemented_instruction(state); break;
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case LSR_ACC: unimplemented_instruction(state); break;
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case LSR_ZP: unimplemented_instruction(state); break;
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case LSR_ZPX: unimplemented_instruction(state); break;
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case LSR_ABS: unimplemented_instruction(state); break;
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case LSR_ABSX: unimplemented_instruction(state); break;
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case ORA_IMM: ORA(state, pop_byte(state)); break;
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case ORA_ZP: ORA(state, get_byte_zero_page(state)); break;
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case ORA_ZPX: ORA(state, get_byte_zero_page_x(state)); break;
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case ORA_ABS: ORA(state, get_byte_absolute(state)); break;
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case ORA_ABSX: ORA(state, get_byte_absolute_x(state)); break;
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case ORA_ABSY: ORA(state, get_byte_absolute_y(state)); break;
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case ORA_INDX: ORA(state, get_byte_indirect_x(state)); break;
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case ORA_INDY: ORA(state, get_byte_indirect_y(state)); break;
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case ROL_ACC: unimplemented_instruction(state); break;
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case ROL_ZP: unimplemented_instruction(state); break;
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case ROL_ZPX: unimplemented_instruction(state); break;
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case ROL_ABS: unimplemented_instruction(state); break;
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case ROL_ABSX: unimplemented_instruction(state); break;
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case ROR_ACC: unimplemented_instruction(state); break;
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case ROR_ZP: unimplemented_instruction(state); break;
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case ROR_ZPX: unimplemented_instruction(state); break;
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case ROR_ABS: unimplemented_instruction(state); break;
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case ROR_ABSX: unimplemented_instruction(state); break;
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case SBC_IMM: unimplemented_instruction(state); break;
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case SBC_ZP: unimplemented_instruction(state); break;
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case SBC_ZPX: unimplemented_instruction(state); break;
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case SBC_ABS: unimplemented_instruction(state); break;
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case SBC_ABSX: unimplemented_instruction(state); break;
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case SBC_ABSY: unimplemented_instruction(state); break;
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case SBC_INDX: unimplemented_instruction(state); break;
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case SBC_INDY: unimplemented_instruction(state); break;
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case STA_ZP: unimplemented_instruction(state); break;
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case STA_ZPX: unimplemented_instruction(state); break;
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case STA_ABS: unimplemented_instruction(state); break;
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case STA_ABSX: unimplemented_instruction(state); break;
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case STA_ABSY: unimplemented_instruction(state); break;
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case STA_INDX: unimplemented_instruction(state); break;
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case STA_INDY: unimplemented_instruction(state); break;
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case STX_ZP: unimplemented_instruction(state); break;
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case STX_ZPY: unimplemented_instruction(state); break;
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case STX_ABS: unimplemented_instruction(state); break;
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case STY_ZP: unimplemented_instruction(state); break;
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case STY_ZPX: unimplemented_instruction(state); break;
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case STY_ABS: unimplemented_instruction(state); break;
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default:
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unimplemented_instruction(state); break;
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}
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return 0;
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}
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