mirror of
https://github.com/pevans/erc-c.git
synced 2024-12-22 14:30:45 +00:00
Explain how the JSR call is handled in some impls
This commit is contained in:
parent
0fccf552f2
commit
00854e74b9
@ -112,6 +112,15 @@
|
|||||||
46:AA TAX
|
46:AA TAX
|
||||||
47:BD 81 C0 LDA PHASEON,X
|
47:BD 81 C0 LDA PHASEON,X
|
||||||
4A:A9 56 LDA #$56
|
4A:A9 56 LDA #$56
|
||||||
|
|
||||||
|
; In at least one implementation (notably WinApple), the opcode below is
|
||||||
|
; rewritten as `A9 00 EA`, which is equivalent to:
|
||||||
|
; LDA #$00
|
||||||
|
; NOP
|
||||||
|
; This would essentially remove the WAIT call. The WAIT subroutine will,
|
||||||
|
; in the course of its operation, leave $00 in A, which explains the LDA
|
||||||
|
; #$00 opcode sequence. The NOP is there to replace the third byte
|
||||||
|
; (which was part of the JSR address in its original form).
|
||||||
4C:20 A8 FC JSR WAIT ; wait for the motor
|
4C:20 A8 FC JSR WAIT ; wait for the motor
|
||||||
4F:88 DEY
|
4F:88 DEY
|
||||||
50:10 EB BPL PHASELOOP
|
50:10 EB BPL PHASELOOP
|
||||||
|
Loading…
Reference in New Issue
Block a user