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Add test for write_bank
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@ -65,6 +65,42 @@ Test(apple2_mem, read_bank)
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cr_assert_eq(vm_segment_get(mach->memory, 0xD077), val);
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}
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/*
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* The write_bank test will look a bit similar to the read_bank one,
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* except in logic it should be written somewhat as an inverse. That is,
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* we want our writes to all go to memory, and double-check that the
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* right location is being updated (or not being updated).
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*/
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Test(apple2_mem, write_bank)
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{
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vm_8bit right, wrong;
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// In BANK_ROM mode, we expect that updates to ROM will never be
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// successful (after all, it wouldn't be read-only memory if they
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// were).
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right = 123;
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wrong = 222;
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mach->memory_mode = MEMORY_BANK_ROM;
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vm_segment_set(mach->rom, 0x77, right);
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vm_segment_set(mach->memory, 0xD077, wrong);
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cr_assert_eq(vm_segment_get(mach->rom, 0x77), right);
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cr_assert_eq(vm_segment_get(mach->memory, 0xD077), right);
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// RAM1 is the main bank; it's all 64k RAM in one chunk.
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right = 111;
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wrong = 232;
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mach->memory_mode = MEMORY_BANK_RAM1;
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vm_segment_set(mach->memory, 0xD078, right);
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vm_segment_set(mach->ram2, 0x78, wrong);
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cr_assert_eq(vm_segment_get(mach->memory, 0xD078), right);
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cr_assert_eq(vm_segment_get(mach->ram2, 0x78), wrong);
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// RAM2 is most of the 64k, except the first 4k of the last 12
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// ($D000..$DFFF) is in ram2.
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right = 210;
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wrong = 132;
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mach->memory_mode = MEMORY_BANK_RAM2;
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vm_segment_set(mach->ram2, 0x73, wrong);
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vm_segment_set(mach->memory, 0xD073, right);
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cr_assert_eq(vm_segment_get(mach->ram2, 0x73), right);
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}
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