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https://github.com/pevans/erc-c.git
synced 2024-12-11 02:49:16 +00:00
Rewrite phaser to use state transitions, whole phase states
By whole phase states, I mean we no longer track if more than one phase is active.
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@ -53,7 +53,7 @@ enum apple2_dd_mode {
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*/
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#define _240K_ 245760
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#define MAX_DRIVE_STEPS 140
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#define MAX_DRIVE_STEPS 70
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/*
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* This is the last _accessible_ sector position within a track (you can
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@ -98,8 +98,7 @@ struct apple2dd {
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* laid it out as a flat line, but still with those points defined.
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* Does that make sense?
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*/
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vm_8bit phase_state;
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vm_8bit last_phase;
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vm_8bit phase;
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/*
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* Data is written via a "latch", and happens in two steps; one, you
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@ -205,7 +204,7 @@ extern vm_8bit apple2_dd_switch_rw(apple2dd *);
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extern void apple2_dd_eject(apple2dd *);
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extern void apple2_dd_free(apple2dd *);
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extern void apple2_dd_map(vm_segment *);
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extern void apple2_dd_phaser(apple2dd *);
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extern void apple2_dd_phaser(apple2dd *, int);
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extern void apple2_dd_save(apple2dd *);
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extern void apple2_dd_set_mode(apple2dd *, int);
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extern void apple2_dd_shift(apple2dd *, int);
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110
src/apple2.dd.c
110
src/apple2.dd.c
@ -16,6 +16,7 @@
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#include "apple2.enc.h"
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#include "apple2.h"
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#include "vm_di.h"
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#include "vm_reflect.h"
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/*
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* Create a new disk drive. We do not create a memory segment for the
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@ -45,8 +46,7 @@ apple2_dd_create()
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drive->online = false;
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drive->write_protect = true;
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drive->mode = DD_READ;
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drive->phase_state = 0;
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drive->last_phase = 0;
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drive->phase = 0;
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drive->image_type = DD_NOTYPE;
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return drive;
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@ -234,53 +234,55 @@ apple2_dd_decode(apple2dd *drive)
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* phase to be the current phase state if the step was successful.
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*/
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void
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apple2_dd_phaser(apple2dd *drive)
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apple2_dd_phaser(apple2dd *drive, int phase)
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{
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int next = drive->phase_state;
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int prev = drive->last_phase;
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int step = 0;
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/*
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* There are four stepper motor phases, and you can transition from
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* one phase to another. While it's possible--and necessary!--to
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* have more than one phase energized in the drive, the thing that
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* matters is the number you ultimately get to. For example:
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*
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* Phase 1 is on. You energize phase 2. Now both phases 1 and 2 are
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* on; you then de-energize phase 1. Now only phase 2 is on.
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*
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* This sequence describes the steps necessary to step the head in
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* by one half-track. As you can see, at some point, you have two
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* phases on; but ultimately what is necessary is you get from phase
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* 1 to phase 2. As such, we track only a single phase to keep
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* things simple.
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*
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* It's definitely possible to have Shenanigans; that is to say, you
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* can energize three or all four phases. We may not handle this
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* accurately at this time; but this method is preferred at the
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* moment for its clarity of intent.
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*
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* The table below both defines and documents what the phase
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* transitions do; you can see, if phase 1 is energized, we will
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* step in one half-track when phase 2 is energized, and step out
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* one half-track when phase 4 is energized. If phase 1 alone
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* remains energized, we do nothing; if phase 3 is energized--being
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* opposite to phase 1, in a circular array--we do nothing.
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*/
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static int transitions[] = {
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// 0 1 2 3 4 phase transition
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0, 0, 0, 0, 0, // no phases
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0, 0, 1, 0, -1, // phase 1
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0, -1, 0, 1, 0, // phase 2
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0, 0, -1, 0, 1, // phase 3
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0, 1, 0, -1, 0, // phase 4
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};
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if (!drive->online) {
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// You can transition only to phases 1-4, and alternatively to no
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// phase. Also, if the motor is off, then don't bother.
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if (phase < 0 || phase > 4 || !drive->online) {
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return;
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}
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// If PHASE1 is on and PHASE4 was previously on, then we want to
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// mimic an inward step
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if ((next & DD_PHASE1) && (prev & DD_PHASE4)) {
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next = DD_PHASE4 << 1;
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}
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// If, however, PHASE4 is on and previously PHASE1 was on, then we
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// want to mimic an outward step
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if ((next & DD_PHASE4) && (prev & DD_PHASE1)) {
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next = DD_PHASE1 >> 1;
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}
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// If an adjacent phase is on, add an inward or outward step. If
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// _both_ adjacent phases are on, the step will count as zero (or no
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// step).
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if (next & (prev << 1)) {
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step++;
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}
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if (next & (prev >> 1)) {
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step--;
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}
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// If the opposite cog is also on, then our accounting is for
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// naught; nullify the step movement.
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if (((next & DD_PHASE1) && (next & DD_PHASE3)) ||
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((next & DD_PHASE2) && (next & DD_PHASE4))
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) {
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step = 0;
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}
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int step = transitions[(drive->phase * 5) + phase];
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apple2_dd_step(drive, step);
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// Recall our trickery above with the phase variable? Because of it,
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// we have to save the phase_state field into last_phase, and not
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// the pseudo-value we assigned to phase.
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drive->last_phase = drive->phase_state;
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// Record this new phase for the next time we make a transition
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drive->phase = phase;
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}
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/*
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@ -296,7 +298,7 @@ apple2_dd_position(apple2dd *drive)
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return 0;
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}
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int track_offset = (drive->track_pos / 4) * ENC_ETRACK;
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int track_offset = (drive->track_pos / 2) * ENC_ETRACK;
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return track_offset + drive->sector_pos;
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}
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@ -406,12 +408,6 @@ apple2_dd_step(apple2dd *drive, int steps)
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} else if (drive->track_pos < 0) {
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drive->track_pos = 0;
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}
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// The sector position is rehomed to zero whenever we step a
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// non-zero length.
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if (steps) {
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drive->sector_pos = 0;
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}
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}
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/*
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@ -461,18 +457,16 @@ apple2_dd_write_protect(apple2dd *drive, bool protect)
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void
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apple2_dd_switch_phase(apple2dd *drive, size_t addr)
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{
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int phase = -1;
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switch (addr & 0xF) {
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case 0x0: drive->phase_state &= ~0x1; break;
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case 0x1: drive->phase_state |= 0x1; break;
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case 0x2: drive->phase_state &= ~0x2; break;
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case 0x3: drive->phase_state |= 0x2; break;
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case 0x4: drive->phase_state &= ~0x4; break;
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case 0x5: drive->phase_state |= 0x4; break;
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case 0x6: drive->phase_state &= ~0x8; break;
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case 0x7: drive->phase_state |= 0x8; break;
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case 0x1: phase = 1; break;
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case 0x3: phase = 2; break;
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case 0x5: phase = 3; break;
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case 0x7: phase = 4; break;
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}
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apple2_dd_phaser(drive);
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apple2_dd_phaser(drive, phase);
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}
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/*
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@ -208,48 +208,45 @@ Test(apple2_dd, phaser)
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// Test going backwards
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drive->track_pos = 3;
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drive->phase_state = 1;
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drive->last_phase = 2;
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apple2_dd_phaser(drive);
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drive->phase = 2;
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apple2_dd_phaser(drive, 1);
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cr_assert_eq(drive->track_pos, 2);
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cr_assert_eq(drive->last_phase, 1);
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cr_assert_eq(drive->phase, 1);
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// Forwards
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drive->phase_state = 2;
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drive->phase = 3;
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drive->track_pos = 5;
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drive->last_phase = 1;
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apple2_dd_phaser(drive);
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apple2_dd_phaser(drive, 4);
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cr_assert_eq(drive->track_pos, 6);
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cr_assert_eq(drive->last_phase, 2);
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drive->phase_state = 4;
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apple2_dd_phaser(drive);
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cr_assert_eq(drive->phase, 4);
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apple2_dd_phaser(drive, 1);
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cr_assert_eq(drive->track_pos, 7);
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cr_assert_eq(drive->last_phase, 4);
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cr_assert_eq(drive->phase, 1);
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}
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Test(apple2_dd, switch_phase)
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{
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apple2_dd_switch_phase(drive, 0x1);
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cr_assert_eq(drive->phase_state, 0x1);
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cr_assert_eq(drive->phase, 1);
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apple2_dd_switch_phase(drive, 0x0);
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cr_assert_eq(drive->phase_state, 0x0);
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cr_assert_eq(drive->phase, 1);
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apple2_dd_switch_phase(drive, 0x3);
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cr_assert_eq(drive->phase_state, 0x2);
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cr_assert_eq(drive->phase, 2);
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apple2_dd_switch_phase(drive, 0x2);
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cr_assert_eq(drive->phase_state, 0x0);
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cr_assert_eq(drive->phase, 2);
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apple2_dd_switch_phase(drive, 0x5);
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cr_assert_eq(drive->phase_state, 0x4);
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cr_assert_eq(drive->phase, 3);
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apple2_dd_switch_phase(drive, 0x4);
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cr_assert_eq(drive->phase_state, 0x0);
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cr_assert_eq(drive->phase, 3);
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apple2_dd_switch_phase(drive, 0x7);
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cr_assert_eq(drive->phase_state, 0x8);
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cr_assert_eq(drive->phase, 4);
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apple2_dd_switch_phase(drive, 0x6);
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cr_assert_eq(drive->phase_state, 0x0);
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cr_assert_eq(drive->phase, 4);
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}
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Test(apple2_dd, switch_drive)
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