diff --git a/tests/apple2.mem.c b/tests/apple2.mem.c index 4ff65e4..cae69e8 100644 --- a/tests/apple2.mem.c +++ b/tests/apple2.mem.c @@ -33,6 +33,31 @@ Test(apple2_mem, map) } } +Test(apple2_mem, map_bank_switch) +{ + vm_segment *segments[2]; + + segments[0] = mach->main; + segments[1] = mach->aux; + + for (int i = 0; i < 2; i++) { + cr_assert_eq(segments[i]->read_table[0xC080], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC081], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC082], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC083], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC088], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC089], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC08A], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC08B], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC088], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC011], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC012], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->read_table[0xC016], apple2_mem_read_bank_switch); + cr_assert_eq(segments[i]->write_table[0xC008], apple2_mem_write_bank_switch); + cr_assert_eq(segments[i]->write_table[0xC009], apple2_mem_write_bank_switch); + } +} + Test(apple2_mem, read_bank) { vm_8bit val; @@ -105,7 +130,7 @@ Test(apple2_mem, write_bank) cr_assert_eq(vm_segment_get(mach->main, 0x10073), right); } -Test(apple2_mem, init_disk2_rom) +Test(apple2_mem, init_peripheral_rom) { // FIXME: this isn't working, _and_ it's pretty tightly coupled into // the create() function. We could use a better way of testing this. diff --git a/tests/mos6502.c b/tests/mos6502.c index bc4d9b5..c89d4dd 100644 --- a/tests/mos6502.c +++ b/tests/mos6502.c @@ -151,3 +151,40 @@ Test(mos6502, get_address_resolver) cr_assert_eq(mos6502_get_address_resolver(0x96), mos6502_resolve_zpy); } + +Test(mos6502, get) +{ + vm_segment_set(cpu->wmem, 0, 123); + cr_assert_eq(mos6502_get(cpu, 0), 123); +} + +Test(mos6502, get16) +{ + vm_segment_set16(cpu->wmem, 0, 0x3344); + cr_assert_eq(mos6502_get16(cpu, 0), 0x3344); +} + +Test(mos6502, set) +{ + mos6502_set(cpu, 0, 111); + cr_assert_eq(vm_segment_get(cpu->rmem, 0), 111); +} + +Test(mos6502, set16) +{ + mos6502_set16(cpu, 0, 0x2255); + cr_assert_eq(vm_segment_get16(cpu->rmem, 0), 0x2255); +} + +Test(mos6502, set_memory) +{ + vm_segment *rmem, *wmem; + + rmem = (vm_segment *)111; + wmem = (vm_segment *)222; + + mos6502_set_memory(cpu, rmem, wmem); + + cr_assert_eq(cpu->rmem, rmem); + cr_assert_eq(cpu->wmem, wmem); +}