Peter Evans
c5d1542937
Show correct PC counter in scan
2018-03-01 21:37:10 -06:00
Peter Evans
aa53fdd77e
Erase strings before we print anything else
...
If you print something without an operand, you may end up printing the
last instruction's operand unless you do that wipe
2018-02-25 16:06:27 -06:00
Peter Evans
ac5d532a7f
Fix length bug with s_bytes (one too short)
...
This also fixes tests for disassembly so that they account for changed
output. Finally this also exits if we have to perror in the setup
function.
2018-02-23 21:35:53 -06:00
Peter Evans
395ac4a841
Disassembler now outputs more idiomatic code
...
It also no longer prints out register and address state
2018-02-23 20:46:24 -06:00
Peter Evans
978ad1faaf
Formerly "BAD" instructions are now forms of NOPs
...
But weird forms. In most cases they basically are NOPs, except with
different opcodes. In other cases, we call them NP2 and NP3s, and do so
because they consume 2 or 3 bytes respectively (vs. just 1 with NOP).
We had to teach some arcane magic to the emulator for this to work. We
may want to refactor to decouple the number of bytes consumed from the
address mode.
2018-02-22 14:07:05 -06:00
Peter Evans
90892c32e4
Add TSB (Test and Set Bits) instruction
...
This commit also moves the TRB code from loadstor to bits, which is
where it should have been all along.
2018-02-22 13:39:48 -06:00
Peter Evans
a4c3d1c4ef
Implement the TRB (Test and Reset Bits) instruction
2018-02-22 00:39:33 -06:00
Peter Evans
807362e871
Add STZ instruction (to store zero)
2018-02-22 00:02:57 -06:00
Peter Evans
8e1ab0e950
Add support for PHX, PHY, PLX, PLY
...
These instructions allow you to push and pull (pop) the X and Y
registers via the stack.
2018-02-21 23:32:57 -06:00
Peter Evans
f9a277e7bc
Add new Branch Always instruction
2018-02-21 21:57:21 -06:00
Peter Evans
7b65dc1657
Add new BIM instruction (BIt imMediate mode)
...
This is not a real instruction in the 65c02 processor; I invented it for
the sole purpose of handling the specialized logic that is performed by
BIT in IMM mode. To be fair--I can imagine this really _was_ implemented
as a "separate" instruction on the chip! But I don't know that for sure.
2018-02-21 21:01:46 -06:00
Peter Evans
08b0e2e648
Show effective address
2018-02-14 22:19:35 -06:00
Peter Evans
ec522f259e
Add block comments to describe source files
2018-02-12 21:15:20 -06:00
Peter Evans
9f518d5141
We should not resolv the address a second time
2018-01-23 21:41:30 -06:00
Peter Evans
1751a7af1f
Don't try to call resolv() if resolv is NULL
2018-01-23 21:18:42 -06:00
Peter Evans
56433e2ebe
Show nothing if no value is associated with an instruction
2018-01-22 12:31:19 -06:00
Peter Evans
c2debec4d3
Make output more compact
2018-01-21 21:32:43 -06:00
Peter Evans
ecd8a7974a
Add "BAD" instruction to crash when we hit an invalid opcode
2018-01-21 12:48:34 -06:00
Peter Evans
103a188faf
Add an extra line break
...
Mostly for vim to make it easier to skip over blocks with '}'.
2018-01-19 19:14:59 -06:00
Peter Evans
a9cf25853d
Show the individual flags of the P register
2018-01-19 13:14:02 -06:00
Peter Evans
6b160c6ca2
Show the dereferenced value for a given address
2018-01-19 12:18:24 -06:00
Peter Evans
2c319399d2
Change disassembly to add more info
2018-01-19 00:34:57 -06:00
Peter Evans
8d9b48912e
Add memory injection to 6502; main memory in apple2
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Note that memory _is_ now managed in apple2, and _not_ in mos6502.
2018-01-10 21:28:05 -06:00
Peter Evans
de859bcea8
We were not obeying little-endianness here
2018-01-09 16:24:25 -06:00
Peter Evans
a267065059
Include cycle information
2018-01-09 15:57:20 -06:00
Peter Evans
3c46a41351
Fix little-endian issue with IND output
...
Also change the ADDR label to emit a hex code, not a decimal code.
2018-01-08 23:36:11 -06:00
Peter Evans
e4049a6a11
Better info on each opcode sequence
...
Plus fix a display bug that showed the operand in the wrong order.
2018-01-08 21:21:09 -06:00
Peter Evans
1c36c4ea4d
Add missing docblock comments
2018-01-07 16:07:29 -06:00
Peter Evans
ead5f28e79
Refactor to use cpu, not literal segments
2017-12-30 23:02:30 -06:00
Peter Evans
b42d5370aa
Small bug in the jump label code for IND
...
This also required a rethink on some core functions which now needed to
know about the memory segment; and further changes in the unit-testing
code on the disassembly suite was also necessary.
2017-12-30 22:50:23 -06:00
Peter Evans
7e142e2736
Properly handle indirect addresses
2017-12-30 21:48:16 -06:00
Peter Evans
26529f77ab
Implement jump table, labels in code
2017-12-29 17:08:25 -06:00
Peter Evans
927d03ebbe
Add scan function (rename original scan -> opcode); test
2017-12-29 15:31:05 -06:00
Peter Evans
f98e2f65ee
Add disassembly scan function, tests
2017-12-28 23:47:36 -06:00
Peter Evans
491b3c0c38
Add scan function for disassembly
2017-12-28 21:47:35 -06:00
Peter Evans
32d08fbbc5
Add new file for opcode disassembly
2017-12-27 21:21:11 -06:00
