mirror of
https://github.com/pevans/erc-c.git
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90892c32e4
This commit also moves the TRB code from loadstor to bits, which is where it should have been all along.
170 lines
4.1 KiB
C
170 lines
4.1 KiB
C
#include <criterion/criterion.h>
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#include "mos6502.h"
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#include "mos6502.enums.h"
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#include "mos6502.tests.h"
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TestSuite(mos6502_bits, .init = setup, .fini = teardown);
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Test(mos6502_bits, and)
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{
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cpu->A = 5;
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mos6502_handle_and(cpu, 1);
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cr_assert_eq(cpu->A, 1);
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cpu->A = 5;
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mos6502_handle_and(cpu, 4);
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cr_assert_eq(cpu->A, 4);
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}
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Test(mos6502_bits, asl)
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{
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mos6502_handle_asl(cpu, 5);
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cr_assert_eq(cpu->A, 10);
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cpu->eff_addr = 123;
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mos6502_handle_asl(cpu, 22);
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cr_assert_eq(mos6502_get(cpu, 123), 44);
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}
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Test(mos6502_bits, bit)
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{
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cpu->A = 5;
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mos6502_handle_bit(cpu, 129);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, MOS_NEGATIVE);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, 0);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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mos6502_handle_bit(cpu, 193);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, MOS_NEGATIVE);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, MOS_OVERFLOW);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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mos6502_handle_bit(cpu, 65);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, 0);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, MOS_OVERFLOW);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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mos6502_handle_bit(cpu, 33);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, 0);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, 0);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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mos6502_handle_bit(cpu, 0);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, 0);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, 0);
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cr_assert_eq(cpu->P & MOS_ZERO, MOS_ZERO);
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}
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Test(mos6502_bits, bim)
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{
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// This version of BIT should not modify the NV flags
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cpu->P |= MOS_NEGATIVE;
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cpu->P |= MOS_OVERFLOW;
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cpu->A = 63;
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mos6502_handle_bim(cpu, 123);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, MOS_NEGATIVE);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, MOS_OVERFLOW);
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cpu->A = 4;
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mos6502_handle_bim(cpu, 123);
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cr_assert_eq(cpu->P & MOS_ZERO, MOS_ZERO);
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}
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Test(mos6502_bits, eor)
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{
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cpu->A = 5;
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mos6502_handle_eor(cpu, 4);
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cr_assert_eq(cpu->A, 1);
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cpu->A = 5;
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mos6502_handle_eor(cpu, 1);
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cr_assert_eq(cpu->A, 4);
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}
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Test(mos6502_bits, lsr)
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{
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mos6502_handle_lsr(cpu, 5);
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cr_assert_eq(cpu->A, 2);
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cr_assert_eq(cpu->P & MOS_CARRY, MOS_CARRY);
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cpu->eff_addr = 123;
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mos6502_handle_lsr(cpu, 11);
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cr_assert_eq(mos6502_get(cpu, 123), 5);
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cr_assert_eq(cpu->P & MOS_CARRY, MOS_CARRY);
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}
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Test(mos6502_bits, ora)
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{
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cpu->A = 5;
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mos6502_handle_ora(cpu, 4);
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cr_assert_eq(cpu->A, 5);
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cpu->A = 5;
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mos6502_handle_ora(cpu, 10);
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cr_assert_eq(cpu->A, 15);
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}
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Test(mos6502_bits, rol)
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{
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mos6502_handle_rol(cpu, 8);
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cr_assert_eq(cpu->A, 17);
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cpu->eff_addr = 234;
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mos6502_handle_rol(cpu, 128);
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cr_assert_eq(mos6502_get(cpu, 234), 0);
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}
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Test(mos6502_bits, ror)
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{
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mos6502_handle_ror(cpu, 64);
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cr_assert_eq(cpu->A, 160);
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cpu->eff_addr = 123;
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mos6502_handle_ror(cpu, 1);
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mos6502_handle_ror(cpu, 0);
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cr_assert_eq(mos6502_get(cpu, 123), 128);
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}
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Test(mos6502_bits, trb)
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{
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cpu->A = 6;
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mos6502_handle_trb(cpu, 3);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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cpu->A = 9;
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mos6502_handle_trb(cpu, 2);
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cr_assert_eq(cpu->P & MOS_ZERO, MOS_ZERO);
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cpu->eff_addr = 111;
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mos6502_set(cpu, cpu->eff_addr, 123);
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mos6502_handle_trb(cpu, 123);
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cr_assert_eq(mos6502_get(cpu, cpu->eff_addr),
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(cpu->A ^ 0xff) & 123);
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}
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Test(mos6502_bits, tsb)
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{
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// I borrowed this code from the trb test; TSB and TRB do exactly
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// the same thing in regards to the zero bit.
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cpu->A = 6;
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mos6502_handle_trb(cpu, 3);
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cr_assert_eq(cpu->P & MOS_ZERO, 0);
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cpu->A = 9;
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mos6502_handle_trb(cpu, 2);
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cr_assert_eq(cpu->P & MOS_ZERO, MOS_ZERO);
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// This is similar to the segment in the trb test that focuses on
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// the resetting (clearing) of bits, but modified to account for the
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// differing result that tsb would provide--namely that the 1s in A
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// will be set in the location in memory, rather than cleared.
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cpu->eff_addr = 111;
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mos6502_set(cpu, cpu->eff_addr, 123);
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mos6502_handle_tsb(cpu, 123);
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cr_assert_eq(mos6502_get(cpu, cpu->eff_addr), cpu->A | 123);
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}
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