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97 lines
3.0 KiB
C
97 lines
3.0 KiB
C
#include <criterion/criterion.h>
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#include "apple2.h"
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#include "apple2.pc.h"
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#include "apple2.tests.h"
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TestSuite(apple2_pc, .init = setup, .fini = teardown);
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Test(apple2_pc, map)
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{
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size_t addr;
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int i;
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vm_segment *segments[2];
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segments[0] = mach->main;
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segments[1] = mach->aux;
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for (i = 0; i < 2; i++) {
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for (addr = 0xC100; addr < 0xD000; addr++) {
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cr_assert_eq(segments[i]->read_table[addr], apple2_pc_read);
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cr_assert_eq(segments[i]->write_table[addr], apple2_pc_write);
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}
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cr_assert_eq(segments[i]->read_table[0xC015], apple2_pc_switch_read);
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cr_assert_eq(segments[i]->read_table[0xC017], apple2_pc_switch_read);
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cr_assert_eq(segments[i]->write_table[0xC00B], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC00A], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC006], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC007], apple2_pc_switch_write);
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}
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}
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Test(apple2_pc, rom_addr)
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{
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_DEFAULT), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_SLOTCXROM), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_SLOTC3ROM), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC232, MEMORY_EXPROM), 0x0232);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_EXPROM), 0x4832);
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cr_assert_eq(apple2_pc_rom_addr(0xC732, MEMORY_SLOTCXROM), 0x4732);
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cr_assert_eq(apple2_pc_rom_addr(0xC332, MEMORY_SLOTC3ROM), 0x4332);
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}
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/*
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* This function doesn't do _too_ much outside of calling rom_addr,
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* which we test elsewhere.
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*/
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Test(apple2_pc, read)
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{
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vm_8bit rombyte;
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apple2_set_memory_mode(mach, MEMORY_DEFAULT);
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rombyte = vm_segment_get(mach->rom, 0x100);
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cr_assert_eq(vm_segment_get(mach->main, 0xC100), rombyte);
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}
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/*
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* The write map function should actually do nothing, since the memory
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* it works with is ROM. The test code is just looking to see if that is
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* the case.
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*/
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Test(apple2_pc, write)
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{
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vm_8bit rombyte;
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rombyte = vm_segment_get(mach->rom, 0x100);
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vm_segment_set(mach->main, 0xC100, rombyte + 1);
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cr_assert_neq(vm_segment_get(mach->main, 0xC100), rombyte + 1);
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}
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Test(apple2_pc, switch_read)
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{
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mach->memory_mode = MEMORY_DEFAULT;
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cr_assert_eq(vm_segment_get(mach->main, 0xC015), 0);
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mach->memory_mode = MEMORY_SLOTCXROM;
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cr_assert_eq(vm_segment_get(mach->main, 0xC015), 0x80);
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cr_assert_eq(vm_segment_get(mach->main, 0xC017), 0);
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mach->memory_mode = MEMORY_SLOTC3ROM;
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cr_assert_eq(vm_segment_get(mach->main, 0xC017), 0x80);
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}
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Test(apple2_pc, switch_write)
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{
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mach->memory_mode = MEMORY_DEFAULT;
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vm_segment_set(mach->main, 0xC00B, 1);
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cr_assert_eq(mach->memory_mode, MEMORY_SLOTC3ROM);
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vm_segment_set(mach->main, 0xC00A, 1);
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cr_assert_eq(mach->memory_mode, MEMORY_DEFAULT);
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vm_segment_set(mach->main, 0xC006, 1);
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cr_assert_eq(mach->memory_mode, MEMORY_SLOTCXROM);
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vm_segment_set(mach->main, 0xC007, 1);
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cr_assert_eq(mach->memory_mode, MEMORY_DEFAULT);
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}
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