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https://github.com/pevans/erc-c.git
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2f777ce881
Regarding soft switches, we had several we should have been listening for on both reads and writes, but were only doing so on writes; this is now fixed. Regarding statuses, we were incorrectly calculating both carry and overflow. This should now be fixed, although some quick examinations of disassembly output suggest there is something else amiss. Debugging will continue shortly.
212 lines
5.6 KiB
C
212 lines
5.6 KiB
C
#include <criterion/criterion.h>
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#include "mos6502.h"
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#include "mos6502.enums.h"
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#include "mos6502.tests.h"
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TestSuite(mos6502, .init = setup, .fini = teardown);
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/* Test(mos6502, free) */
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Test(mos6502, create)
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{
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cr_assert_neq(cpu, NULL);
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cr_assert_eq(cpu->rmem->size, MOS6502_MEMSIZE);
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cr_assert_eq(cpu->wmem->size, MOS6502_MEMSIZE);
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cr_assert_eq(cpu->PC, 0);
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cr_assert_eq(cpu->A, 0);
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cr_assert_eq(cpu->X, 0);
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cr_assert_eq(cpu->Y, 0);
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cr_assert_eq(cpu->P, 0);
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cr_assert_eq(cpu->S, 0);
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}
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Test(mos6502, push_stack)
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{
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mos6502_push_stack(cpu, 0x1234);
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cr_assert_eq(mos6502_get(cpu, 0x0100), 0x34);
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cr_assert_eq(mos6502_get(cpu, 0x0101), 0x12);
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}
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Test(mos6502, pop_stack)
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{
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mos6502_push_stack(cpu, 0x1234);
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cr_assert_eq(mos6502_pop_stack(cpu), 0x1234);
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}
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Test(mos6502, modify_status)
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{
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mos6502_modify_status(cpu, MOS_NEGATIVE, 130, 130);
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cr_assert_eq(cpu->P & MOS_NEGATIVE, MOS_NEGATIVE);
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mos6502_modify_status(cpu, MOS_NEGATIVE, 123, 123);
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cr_assert_neq(cpu->P & MOS_NEGATIVE, MOS_NEGATIVE);
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mos6502_modify_status(cpu, MOS_OVERFLOW, 123, 133);
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cr_assert_eq(cpu->P & MOS_OVERFLOW, MOS_OVERFLOW);
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mos6502_modify_status(cpu, MOS_OVERFLOW, 44, 44);
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cr_assert_neq(cpu->P & MOS_OVERFLOW, MOS_OVERFLOW);
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mos6502_modify_status(cpu, MOS_CARRY, 230, 230);
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cr_assert_eq(cpu->P & MOS_CARRY, MOS_CARRY);
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mos6502_modify_status(cpu, MOS_CARRY, 30, 190);
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cr_assert_neq(cpu->P & MOS_CARRY, MOS_CARRY);
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mos6502_modify_status(cpu, MOS_ZERO, 0, 0);
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cr_assert_eq(cpu->P & MOS_ZERO, MOS_ZERO);
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mos6502_modify_status(cpu, MOS_ZERO, 1, 1);
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cr_assert_neq(cpu->P & MOS_ZERO, MOS_ZERO);
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}
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Test(mos6502, set_status)
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{
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mos6502_set_status(cpu, MOS_BREAK | MOS_INTERRUPT | MOS_DECIMAL);
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cr_assert_eq(cpu->P & (MOS_BREAK | MOS_INTERRUPT | MOS_DECIMAL), MOS_BREAK | MOS_INTERRUPT | MOS_DECIMAL);
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}
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Test(mos6502, instruction)
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{
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cr_assert_eq(mos6502_instruction(0x1D), ORA);
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cr_assert_eq(mos6502_instruction(0xD8), CLD);
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cr_assert_eq(mos6502_instruction(0x98), TYA);
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}
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Test(mos6502, cycles)
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{
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cr_assert_eq(mos6502_cycles(cpu, 0x76), 6);
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cr_assert_eq(mos6502_cycles(cpu, 0xBA), 2);
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// In this case, we aren't cross a page boundary, and the number of
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// cycles should stay at 4
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cpu->eff_addr = 0x5070;
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cpu->X = 23;
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cr_assert_eq(mos6502_cycles(cpu, 0x1D), 4);
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// Testing that crossing a page boundary adds one to the number of
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// cycles
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cpu->X = 200;
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cr_assert_eq(mos6502_cycles(cpu, 0x1D), 5);
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}
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Test(mos6502, get_instruction_handler)
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{
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cr_assert_eq(mos6502_get_instruction_handler(0x00), mos6502_handle_brk);
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cr_assert_eq(mos6502_get_instruction_handler(0x1D), mos6502_handle_ora);
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cr_assert_eq(mos6502_get_instruction_handler(0x20), mos6502_handle_jsr);
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}
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Test(mos6502, execute)
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{
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mos6502_set(cpu, 11, 34);
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mos6502_set(cpu, 10, 0x69);
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cpu->PC = 10;
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mos6502_execute(cpu);
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cr_assert_eq(cpu->A, 34);
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}
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Test(mos6502, would_jump)
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{
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bool expect;
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for (int inst = 0; inst <= TYA; inst++) {
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switch (inst) {
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case BCC:
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case BCS:
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case BEQ:
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case BMI:
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case BNE:
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case BPL:
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case BRK:
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case BVC:
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case BVS:
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case JMP:
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case JSR:
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case RTS:
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case RTI:
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expect = true;
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break;
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default:
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expect = false;
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break;
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}
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cr_assert_eq(mos6502_would_jump(inst), expect);
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}
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}
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Test(mos6502, get_address_resolver)
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{
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cr_assert_eq(mos6502_get_address_resolver(0x0A), mos6502_resolve_acc);
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cr_assert_eq(mos6502_get_address_resolver(0x20), mos6502_resolve_abs);
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cr_assert_eq(mos6502_get_address_resolver(0xBC), mos6502_resolve_abx);
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cr_assert_eq(mos6502_get_address_resolver(0x19), mos6502_resolve_aby);
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cr_assert_eq(mos6502_get_address_resolver(0xA0), mos6502_resolve_imm);
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cr_assert_eq(mos6502_get_address_resolver(0x6C), mos6502_resolve_ind);
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cr_assert_eq(mos6502_get_address_resolver(0x01), mos6502_resolve_idx);
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cr_assert_eq(mos6502_get_address_resolver(0x11), mos6502_resolve_idy);
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cr_assert_eq(mos6502_get_address_resolver(0x10), mos6502_resolve_rel);
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cr_assert_eq(mos6502_get_address_resolver(0x05), mos6502_resolve_zpg);
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cr_assert_eq(mos6502_get_address_resolver(0x15), mos6502_resolve_zpx);
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cr_assert_eq(mos6502_get_address_resolver(0x96), mos6502_resolve_zpy);
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}
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Test(mos6502, get)
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{
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vm_segment_set(cpu->wmem, 0, 123);
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cr_assert_eq(mos6502_get(cpu, 0), 123);
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}
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Test(mos6502, get16)
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{
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vm_segment_set16(cpu->wmem, 0, 0x3344);
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cr_assert_eq(mos6502_get16(cpu, 0), 0x3344);
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}
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Test(mos6502, set)
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{
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mos6502_set(cpu, 0, 111);
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cr_assert_eq(vm_segment_get(cpu->rmem, 0), 111);
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}
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Test(mos6502, set16)
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{
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mos6502_set16(cpu, 0, 0x2255);
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cr_assert_eq(vm_segment_get16(cpu->rmem, 0), 0x2255);
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}
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Test(mos6502, set_memory)
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{
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vm_segment *rmem, *wmem;
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rmem = (vm_segment *)111;
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wmem = (vm_segment *)222;
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mos6502_set_memory(cpu, rmem, wmem);
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cr_assert_eq(cpu->rmem, rmem);
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cr_assert_eq(cpu->wmem, wmem);
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}
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Test(mos6502, last_executed)
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{
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vm_8bit opcode, operand;
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vm_16bit addr;
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mos6502_set(cpu, 0, 0xA9); // LDA #$EE
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mos6502_set(cpu, 1, 0xEE);
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mos6502_set(cpu, 2, 0x8D); // STA $1234
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mos6502_set16(cpu, 3, 0x1234);
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mos6502_execute(cpu);
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mos6502_last_executed(cpu, &opcode, &operand, NULL);
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cr_assert_eq(opcode, 0xA9);
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cr_assert_eq(operand, 0xEE);
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mos6502_execute(cpu);
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mos6502_last_executed(cpu, &opcode, NULL, &addr);
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cr_assert_eq(opcode, 0x8D);
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cr_assert_eq(addr, 0x1234);
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}
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