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Merge pull request #5 from ariejan/issue_5_documentation
Update Godoc documentation
This commit is contained in:
commit
b4bbadd369
@ -4,6 +4,12 @@ import (
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"fmt"
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"fmt"
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)
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)
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/*
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The AddressBus contains a list of all attached memory components,
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like Ram, Rom and IO. It takes care of mapping the global 16-bit
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address space of the Cpu to the relative memory addressing of
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each component.
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*/
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type AddressBus struct {
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type AddressBus struct {
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addressables []addressable // Different components
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addressables []addressable // Different components
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}
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}
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@ -14,14 +20,16 @@ type addressable struct {
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end uint16 // Last address in address space
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end uint16 // Last address in address space
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}
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}
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func NewAddressBus() (*AddressBus, error) {
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return &AddressBus{addressables: make([]addressable, 0)}, nil
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}
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func (a *addressable) String() string {
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func (a *addressable) String() string {
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return fmt.Sprintf("\t0x%04X-%04X\n", a.start, a.end)
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return fmt.Sprintf("\t0x%04X-%04X\n", a.start, a.end)
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}
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}
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// Creates a new, empty 16-bit AddressBus
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func NewAddressBus() (*AddressBus, error) {
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return &AddressBus{addressables: make([]addressable, 0)}, nil
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}
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// Returns a string with details about the AddressBus and attached memory
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func (a *AddressBus) String() string {
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func (a *AddressBus) String() string {
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output := "Address Bus:\n"
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output := "Address Bus:\n"
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@ -32,10 +40,15 @@ func (a *AddressBus) String() string {
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return output
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return output
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}
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}
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func (a *AddressBus) AddressablesCount() int {
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/*
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return len(a.addressables)
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Attach the given Memory at the specified memory offset.
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}
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To attach 16kB ROM at 0xC000-FFFF, you simple attach the Rom at
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address 0xC000, the Size of the Memory determines the end-address.
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rom, _ := i6502.NewRom(0x4000)
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bus.Attach(rom, 0xC000)
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*/
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func (a *AddressBus) Attach(memory Memory, offset uint16) {
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func (a *AddressBus) Attach(memory Memory, offset uint16) {
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start := offset
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start := offset
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end := offset + memory.Size() - 1
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end := offset + memory.Size() - 1
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@ -44,16 +57,11 @@ func (a *AddressBus) Attach(memory Memory, offset uint16) {
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a.addressables = append(a.addressables, addressable)
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a.addressables = append(a.addressables, addressable)
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}
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}
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func (a *AddressBus) addressableForAddress(address uint16) (*addressable, error) {
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/*
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for _, addressable := range a.addressables {
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Read an 8-bit value from Memory attached at the 16-bit address.
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if addressable.start <= address && addressable.end >= address {
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return &addressable, nil
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}
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}
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return nil, fmt.Errorf("No addressable memory found at 0x%04X", address)
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}
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This will panic if you try to read from an address that has no Memory attached.
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*/
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func (a *AddressBus) Read(address uint16) byte {
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func (a *AddressBus) Read(address uint16) byte {
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addressable, err := a.addressableForAddress(address)
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addressable, err := a.addressableForAddress(address)
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if err != nil {
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if err != nil {
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@ -63,6 +71,11 @@ func (a *AddressBus) Read(address uint16) byte {
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return addressable.memory.Read(address - addressable.start)
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return addressable.memory.Read(address - addressable.start)
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}
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}
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/*
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Convenience method to quickly read a 16-bit value from address and address + 1.
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Note that we first read the LOW byte from address and then the HIGH byte from address + 1.
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*/
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func (a *AddressBus) Read16(address uint16) uint16 {
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func (a *AddressBus) Read16(address uint16) uint16 {
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lo := uint16(a.Read(address))
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lo := uint16(a.Read(address))
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hi := uint16(a.Read(address + 1))
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hi := uint16(a.Read(address + 1))
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@ -70,6 +83,12 @@ func (a *AddressBus) Read16(address uint16) uint16 {
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return (hi << 8) | lo
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return (hi << 8) | lo
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}
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}
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/*
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Write an 8-bit value to the Memory at the 16-bit address.
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This will panic if you try to write to an address that has no Memory attached or
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Memory that is read-only, like Rom.
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*/
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func (a *AddressBus) Write(address uint16, data byte) {
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func (a *AddressBus) Write(address uint16, data byte) {
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addressable, err := a.addressableForAddress(address)
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addressable, err := a.addressableForAddress(address)
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if err != nil {
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if err != nil {
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@ -79,7 +98,23 @@ func (a *AddressBus) Write(address uint16, data byte) {
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addressable.memory.Write(address-addressable.start, data)
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addressable.memory.Write(address-addressable.start, data)
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}
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}
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/*
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Convenience method to quickly write a 16-bit value to address and address + 1.
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Note that the LOW byte will be stored in address and the high byte in address + 1.
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*/
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func (a *AddressBus) Write16(address uint16, data uint16) {
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func (a *AddressBus) Write16(address uint16, data uint16) {
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a.Write(address, byte(data))
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a.Write(address, byte(data))
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a.Write(address+1, byte(data>>8))
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a.Write(address+1, byte(data>>8))
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}
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}
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// Returns the addressable for the specified address, or an error if no addressable exists.
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func (a *AddressBus) addressableForAddress(address uint16) (*addressable, error) {
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for _, addressable := range a.addressables {
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if addressable.start <= address && addressable.end >= address {
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return &addressable, nil
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}
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}
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return nil, fmt.Errorf("No addressable memory found at 0x%04X", address)
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}
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@ -13,7 +13,7 @@ func TestEmptyAddressBus(t *testing.T) {
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assert.Nil(err)
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assert.Nil(err)
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if assert.NotNil(bus) {
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if assert.NotNil(bus) {
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assert.Equal(0, bus.AddressablesCount())
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assert.Equal(0, len(bus.addressables))
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}
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}
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}
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}
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@ -24,7 +24,7 @@ func TestAttachToAddressBus(t *testing.T) {
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ram, _ := NewRam(0x10000)
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ram, _ := NewRam(0x10000)
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bus.Attach(ram, 0x0000)
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bus.Attach(ram, 0x0000)
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assert.Equal(1, bus.AddressablesCount())
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assert.Equal(1, len(bus.addressables))
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}
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}
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func TestBusReadWrite(t *testing.T) {
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func TestBusReadWrite(t *testing.T) {
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51
cpu.go
51
cpu.go
@ -2,40 +2,58 @@ package i6502
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import "fmt"
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import "fmt"
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/*
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The Cpu only contains the AddressBus, through which 8-bit values can be read and written
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at 16-bit addresses.
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The Cpu has an 8-bit accumulator (A) and two 8-bit index registers (X,Y). There is a 16-bit
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Program Counter (PC) and an 8-bit Stack Pointer (SP), pointing to addresses in 0x0100-01FF.
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The status register (P) contains flags for Zero, Negative, Break, Decimal, IrqDisable,
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Carry and Overflow flags.
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*/
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type Cpu struct {
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type Cpu struct {
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A byte // Accumulator
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X byte // Index register X
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Y byte // Index register Y
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PC uint16 // 16-bit program counter
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PC uint16 // 16-bit program counter
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P byte // Status Register
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P byte // Status Register
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SP byte // Stack Pointer
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SP byte // Stack Pointer
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A byte // Accumulator
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X byte // X index register
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Y byte // Y index register
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Bus *AddressBus // The address bus
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Bus *AddressBus // The address bus
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}
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}
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const (
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const (
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ZeropageBase = 0x0000 // 0x0000-00FF Reserved for zeropage instructions
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StackBase = 0x0100 // 0x0100-01FF Reserved for stack
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ResetVector = 0xFFFC // 0xFFFC-FFFD
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ResetVector = 0xFFFC // 0xFFFC-FFFD
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IrqVector = 0xFFFE // 0xFFFE-FFFF
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IrqVector = 0xFFFE // 0xFFFE-FFFF
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StackBase = 0x0100 // One page 0x0100-01FF
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)
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)
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// Create an new Cpu instance with the specified AddressBus
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// Create an new Cpu, using the AddressBus for accessing memory.
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func NewCpu(bus *AddressBus) (*Cpu, error) {
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func NewCpu(bus *AddressBus) (*Cpu, error) {
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return &Cpu{Bus: bus}, nil
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return &Cpu{Bus: bus}, nil
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}
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}
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// Returns a string containing the current state of the CPU.
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func (c *Cpu) String() string {
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func (c *Cpu) String() string {
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str := ">>> CPU [ A ] [ X ] [ Y ] [ SP ] [ PC ] NVxBDIZC\n>>> 0x%02X 0x%02X 0x%02X 0x%02X 0x%04X %08b\n"
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str := ">>> CPU [ A ] [ X ] [ Y ] [ SP ] [ PC ] NVxBDIZC\n>>> 0x%02X 0x%02X 0x%02X 0x%02X 0x%04X %08b\n"
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return fmt.Sprintf(str, c.A, c.X, c.Y, c.SP, c.PC, c.P)
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return fmt.Sprintf(str, c.A, c.X, c.Y, c.SP, c.PC, c.P)
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}
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}
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func (c *Cpu) hasAddressBus() bool {
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/*
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return c.Bus != nil
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Reset the CPU, emulating the RESB pin.
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}
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// Reset the CPU, emulating the RESB pin.
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The status register is reset to a know state (0x34, IrqDisabled set, Decimal unset, Break set).
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Then the Program Counter is set to the value read from `ResetVector` (0xFFFC-FFFD).
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Normally, no assumptions can be made about registers (A, X, Y) and the
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Stack Pointer. For convenience, these are reset to 0x00 (A,X,Y) and 0xFF (SP).
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*/
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func (c *Cpu) Reset() {
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func (c *Cpu) Reset() {
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c.PC = c.Bus.Read16(ResetVector)
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c.PC = c.Bus.Read16(ResetVector)
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c.P = 0x34
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c.P = 0x34
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@ -47,11 +65,17 @@ func (c *Cpu) Reset() {
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c.SP = 0xFF
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c.SP = 0xFF
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}
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}
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// Simulate the IRQ pin
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/*
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|
Simulate the IRQ pin.
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|
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This will push the current Cpu state to the stack (P + PC) and set the PC
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|
to the address read from the `IrqVector` (0xFFFE-FFFF)
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*/
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func (c *Cpu) Interrupt() {
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func (c *Cpu) Interrupt() {
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c.handleIrq(c.PC)
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c.handleIrq(c.PC)
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}
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}
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|
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// Handles an interrupt or BRK.
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func (c *Cpu) handleIrq(PC uint16) {
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func (c *Cpu) handleIrq(PC uint16) {
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c.stackPush(byte(PC >> 8))
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c.stackPush(byte(PC >> 8))
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c.stackPush(byte(PC))
|
c.stackPush(byte(PC))
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@ -63,7 +87,7 @@ func (c *Cpu) handleIrq(PC uint16) {
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}
|
}
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|
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// Load the specified program data at the given memory location
|
// Load the specified program data at the given memory location
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// and point the Program Counter to the beginning of the program
|
// and point the Program Counter to the beginning of the program.
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func (c *Cpu) LoadProgram(data []byte, location uint16) {
|
func (c *Cpu) LoadProgram(data []byte, location uint16) {
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for i, b := range data {
|
for i, b := range data {
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c.Bus.Write(location+uint16(i), b)
|
c.Bus.Write(location+uint16(i), b)
|
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@ -72,13 +96,14 @@ func (c *Cpu) LoadProgram(data []byte, location uint16) {
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c.PC = location
|
c.PC = location
|
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}
|
}
|
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|
|
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// Execute the instruction pointed to by the Program Counter (PC)
|
// Read and execute the instruction pointed to by the Program Counter (PC)
|
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func (c *Cpu) Step() {
|
func (c *Cpu) Step() {
|
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instruction := c.readNextInstruction()
|
instruction := c.readNextInstruction()
|
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c.PC += uint16(instruction.Size)
|
c.PC += uint16(instruction.Size)
|
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c.execute(instruction)
|
c.execute(instruction)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// Handle the execution of an instruction
|
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func (c *Cpu) execute(instruction Instruction) {
|
func (c *Cpu) execute(instruction Instruction) {
|
||||||
switch instruction.opcodeId {
|
switch instruction.opcodeId {
|
||||||
case nop:
|
case nop:
|
||||||
|
@ -76,6 +76,9 @@ func TestCpuReset(t *testing.T) {
|
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// **1101** is specified, but we are satisfied with
|
// **1101** is specified, but we are satisfied with
|
||||||
// 00110100 here.
|
// 00110100 here.
|
||||||
assert.Equal(0x34, cpu.P)
|
assert.Equal(0x34, cpu.P)
|
||||||
|
assert.True(cpu.getIrqDisable())
|
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|
assert.False(cpu.getDecimal())
|
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|
assert.True(cpu.getBreak())
|
||||||
|
|
||||||
// Read PC from $FFFC-FFFD
|
// Read PC from $FFFC-FFFD
|
||||||
assert.Equal(0x1234, cpu.PC)
|
assert.Equal(0x1234, cpu.PC)
|
||||||
|
79
doc.go
Normal file
79
doc.go
Normal file
@ -0,0 +1,79 @@
|
|||||||
|
/*
|
||||||
|
The i6502 package contains all the components needed to construct
|
||||||
|
a working MOS 6502 emulated computer using different common parts,
|
||||||
|
like the MOS 6502 or WDC 65C02, VIA 6522 (parallel I/O) and
|
||||||
|
ACIA 6551 (serial I/O).
|
||||||
|
|
||||||
|
The CPU is the core of the system. It features an 8-bit accumulator (A)
|
||||||
|
and two general purpose 8-bit index registers (X, Y). There is a
|
||||||
|
16-bit program counter (PC). The 8-bit stack pointer (SP) points to
|
||||||
|
the 0x0100-0x1FF address space moves downward. The status register (P)
|
||||||
|
contains bits indicating Zero, Negative, Break, Decimal, IrqDisable,
|
||||||
|
Carry and Overflow conditions. The 6502 uses a 16-bit address bus to
|
||||||
|
access 8-bit data values.
|
||||||
|
|
||||||
|
The AddressBus can be used to attach different components to different
|
||||||
|
parts of the 16-bit address space, accessible by the 6502. Common
|
||||||
|
layouts are
|
||||||
|
|
||||||
|
* 64kB RAM at 0x0000-FFFF
|
||||||
|
|
||||||
|
Or
|
||||||
|
|
||||||
|
* 32kB RAM at 0x0000-7FFF
|
||||||
|
* VIA 6522 at 0x8000-800F
|
||||||
|
* ACIA 6551 at 0x8800-8803
|
||||||
|
* 16kB ROM at 0xC000-FFFF
|
||||||
|
|
||||||
|
Creating a new emulated machine entails three steps:
|
||||||
|
|
||||||
|
1. Create the different memory components (Ram, Rom, IO)
|
||||||
|
2. Create the AddressBus and attach memory
|
||||||
|
3. Create the Cpu with the AddressBus
|
||||||
|
|
||||||
|
Example: create an emulator using the full 64kB address space for RAM
|
||||||
|
|
||||||
|
import "github.com/ariejan/i6502"
|
||||||
|
|
||||||
|
// Create Ram, 64kB in size
|
||||||
|
ram, err := i6502.NewRam(0x10000)
|
||||||
|
|
||||||
|
// Create the AddressBus
|
||||||
|
bus, err := i6502.NewAddressBus()
|
||||||
|
|
||||||
|
// And attach the Ram at 0x0000
|
||||||
|
bus.Attach(ram, 0x0000)
|
||||||
|
|
||||||
|
// Create the Cpu, with the AddressBus
|
||||||
|
cpu, err := i6502.NewCpu(bus)
|
||||||
|
|
||||||
|
The hardware pins `IRQ` and `RESB` are implemented and mapped to
|
||||||
|
the functions `Interrupt()` and `Reset()`.
|
||||||
|
|
||||||
|
Running a program from memory can be done by loading the binary
|
||||||
|
data into memory using `LoadProgram`. Keep in mind that the first
|
||||||
|
two memory pages (0x0000-01FF) are reserved for zeropage and stack
|
||||||
|
memory.
|
||||||
|
|
||||||
|
Example of loading a binary program from disk into memory:
|
||||||
|
|
||||||
|
import "io/ioutil"
|
||||||
|
|
||||||
|
program, err := ioutil.ReadFile(path)
|
||||||
|
|
||||||
|
// This will load the program (if it fits within memory)
|
||||||
|
// at 0x0200 and set cpu.PC to 0x0200 as well.
|
||||||
|
cpu.LoadProgram(program, 0x0200)
|
||||||
|
|
||||||
|
With all memory connected and a program loaded, all that's left
|
||||||
|
is executing instructions on the Cpu. A single call to `Step()` will
|
||||||
|
read and execute a single (1, 2 or 3 byte) instruction from memory.
|
||||||
|
|
||||||
|
To create a Cpu and have it running, simple create a go-routine.
|
||||||
|
|
||||||
|
go for {
|
||||||
|
cpu.Step()
|
||||||
|
}()
|
||||||
|
|
||||||
|
*/
|
||||||
|
package i6502
|
@ -5,19 +5,15 @@ import (
|
|||||||
)
|
)
|
||||||
|
|
||||||
type Instruction struct {
|
type Instruction struct {
|
||||||
// Embed OpType
|
OpType // Embed OpType
|
||||||
OpType
|
|
||||||
|
|
||||||
// 8-bit operand for 2-byte instructions
|
Op8 byte // 8-bit operand for 2-byte instructions
|
||||||
Op8 byte
|
Op16 uint16 // 16-bit operand for 3-byte instructions
|
||||||
|
|
||||||
// 16-bit operand for 3-byte instructions
|
Address uint16 // Address location where this instruction got read, for debugging purposes
|
||||||
Op16 uint16
|
|
||||||
|
|
||||||
// Address location where this instruction got read
|
|
||||||
Address uint16
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// Return a string containing debug information about the instruction and operands.
|
||||||
func (i Instruction) String() (output string) {
|
func (i Instruction) String() (output string) {
|
||||||
switch i.Size {
|
switch i.Size {
|
||||||
case 1:
|
case 1:
|
||||||
|
@ -1,5 +1,9 @@
|
|||||||
package i6502
|
package i6502
|
||||||
|
|
||||||
|
/*
|
||||||
|
Anything implementing the Memory interface can be attached to the AddressBus
|
||||||
|
and become accessible by the Cpu.
|
||||||
|
*/
|
||||||
type Memory interface {
|
type Memory interface {
|
||||||
Size() uint16
|
Size() uint16
|
||||||
Read(address uint16) byte
|
Read(address uint16) byte
|
||||||
|
17
opcodes.go
17
opcodes.go
@ -160,20 +160,13 @@ var instructionNames = [...]string{
|
|||||||
// addressing mode. It also includes some extra information for the
|
// addressing mode. It also includes some extra information for the
|
||||||
// emulator, like number of cycles
|
// emulator, like number of cycles
|
||||||
type OpType struct {
|
type OpType struct {
|
||||||
// The actual Opcode byte read from memory
|
Opcode byte // 65(C)02 Opcode, this includes an instruction and addressing mode
|
||||||
Opcode byte
|
|
||||||
|
|
||||||
// Opcode ID
|
opcodeId uint8 // Decoded opcode Id,
|
||||||
opcodeId uint8
|
addressingId uint8 // Decoded address mode Id
|
||||||
|
|
||||||
// Addressing Mode ID
|
Size uint8 // Size of the entire instruction in bytes
|
||||||
addressingId uint8
|
Cycles uint8 // Number of clock cycles required to complete this instruction
|
||||||
|
|
||||||
// Size of this instruction, either 1, 2 or 3 bytes
|
|
||||||
Size uint8
|
|
||||||
|
|
||||||
// Number of clock cycles this instruction needs
|
|
||||||
Cycles uint8
|
|
||||||
}
|
}
|
||||||
|
|
||||||
var opTypes = map[uint8]OpType{
|
var opTypes = map[uint8]OpType{
|
||||||
|
4
ram.go
4
ram.go
@ -1,9 +1,13 @@
|
|||||||
package i6502
|
package i6502
|
||||||
|
|
||||||
|
/*
|
||||||
|
Random Access Memory, read/write, can be of any size.
|
||||||
|
*/
|
||||||
type Ram struct {
|
type Ram struct {
|
||||||
data []byte
|
data []byte
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// Create a new Ram component of the given size.
|
||||||
func NewRam(size int) (*Ram, error) {
|
func NewRam(size int) (*Ram, error) {
|
||||||
return &Ram{data: make([]byte, size)}, nil
|
return &Ram{data: make([]byte, size)}, nil
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user