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Implement more opcodes, minor improvements
This commit is contained in:
Ariejan de Vroom
parent
9c8f47abbc
commit
f3f95dda39
67
cpu.go
67
cpu.go
@ -7,6 +7,7 @@ type Cpu struct {
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PC uint16 // 16-bit program counter
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P byte // Status Register
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SP byte // Stack Pointer
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A byte // Accumulator
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X byte // X index register
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@ -52,8 +53,74 @@ func (c *Cpu) Step() {
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func (c *Cpu) execute(instruction Instruction) {
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switch instruction.opcodeId {
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case nop:
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break
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case adc:
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c.ADC(instruction)
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case sbc:
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c.SBC(instruction)
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case sec:
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c.setCarry(true)
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case sed:
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c.setDecimal(true)
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case sei:
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c.setInterrupt(true)
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case clc:
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c.setCarry(false)
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case cld:
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c.setDecimal(false)
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case cli:
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c.setInterrupt(false)
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case clv:
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c.setOverflow(false)
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case inx:
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c.setX(c.X + 1)
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case iny:
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c.setY(c.Y + 1)
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case inc:
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c.INC(instruction)
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case dex:
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c.setX(c.X - 1)
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case dey:
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c.setY(c.Y - 1)
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case dec:
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c.DEC(instruction)
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case lda:
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c.LDA(instruction)
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case ldx:
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c.LDX(instruction)
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case ldy:
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c.LDY(instruction)
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case ora:
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c.ORA(instruction)
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case and:
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c.AND(instruction)
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case eor:
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c.EOR(instruction)
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case sta:
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c.STA(instruction)
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case stx:
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c.STX(instruction)
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case sty:
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c.STY(instruction)
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case tax:
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c.setX(c.A)
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case tay:
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c.setY(c.A)
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case txa:
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c.setA(c.X)
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case tya:
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c.setA(c.Y)
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case tsx:
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c.setX(c.SP)
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case txs:
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c.setSP(c.X)
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case asl:
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c.ASL(instruction)
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case lsr:
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c.LSR(instruction)
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default:
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panic(fmt.Errorf("Unimplemented instruction: %s", instruction))
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}
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}
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@ -3,15 +3,120 @@ package i6502
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// Add Memory to Accumulator with Carry
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func (c *Cpu) ADC(in Instruction) {
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operand := c.resolveOperand(in)
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carryIn := c.getStatusInt(sCarry)
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carryIn := c.getCarryInt()
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if c.getStatus(sDecimal) {
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if c.getDecimal() {
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c.adcDecimal(c.A, operand, carryIn)
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} else {
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c.adcNormal(c.A, operand, carryIn)
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}
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}
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// Substract memory from Accummulator with carry
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func (c *Cpu) SBC(in Instruction) {
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operand := c.resolveOperand(in)
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carryIn := c.getCarryInt()
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if c.getDecimal() {
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c.sbcDecimal(c.A, operand, carryIn)
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} else {
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c.adcNormal(c.A, ^operand, carryIn)
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}
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}
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func (c *Cpu) INC(in Instruction) {
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address := c.memoryAddress(in)
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value := c.bus.Read(address) + 1
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c.bus.Write(address, value)
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c.setArithmeticFlags(value)
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}
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func (c *Cpu) DEC(in Instruction) {
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address := c.memoryAddress(in)
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value := c.bus.Read(address) - 1
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c.bus.Write(address, value)
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c.setArithmeticFlags(value)
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}
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func (c *Cpu) LDA(in Instruction) {
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value := c.resolveOperand(in)
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c.setA(value)
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}
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func (c *Cpu) LDX(in Instruction) {
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value := c.resolveOperand(in)
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c.setX(value)
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}
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func (c *Cpu) LDY(in Instruction) {
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value := c.resolveOperand(in)
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c.setY(value)
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}
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func (c *Cpu) ORA(in Instruction) {
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value := c.resolveOperand(in)
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c.setA(c.A | value)
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}
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func (c *Cpu) AND(in Instruction) {
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value := c.resolveOperand(in)
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c.setA(c.A & value)
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}
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func (c *Cpu) EOR(in Instruction) {
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value := c.resolveOperand(in)
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c.setA(c.A ^ value)
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}
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func (c *Cpu) STA(in Instruction) {
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address := c.memoryAddress(in)
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c.bus.Write(address, c.A)
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}
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func (c *Cpu) STX(in Instruction) {
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address := c.memoryAddress(in)
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c.bus.Write(address, c.X)
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}
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func (c *Cpu) STY(in Instruction) {
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address := c.memoryAddress(in)
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c.bus.Write(address, c.Y)
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}
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func (c *Cpu) ASL(in Instruction) {
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switch in.addressingId {
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case accumulator:
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c.setCarry((c.A >> 7) == 1)
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c.A <<= 1
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c.setArithmeticFlags(c.A)
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default:
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address := c.memoryAddress(in)
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value := c.bus.Read(address)
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c.setCarry((value >> 7) == 1)
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value <<= 1
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c.bus.Write(address, value)
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c.setArithmeticFlags(value)
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}
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}
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func (c *Cpu) LSR(in Instruction) {
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switch in.addressingId {
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case accumulator:
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c.setCarry((c.A & 0x01) == 1)
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c.A >>= 1
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c.setArithmeticFlags(c.A)
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default:
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address := c.memoryAddress(in)
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value := c.bus.Read(address)
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c.setCarry((value & 0x01) == 1)
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value >>= 1
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c.bus.Write(address, value)
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c.setArithmeticFlags(value)
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}
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}
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// Performs regular, 8-bit addition
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func (c *Cpu) adcNormal(a uint8, b uint8, carryIn uint8) {
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result16 := uint16(a) + uint16(b) + uint16(carryIn)
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@ -24,9 +129,7 @@ func (c *Cpu) adcNormal(a uint8, b uint8, carryIn uint8) {
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// Set the overflow bit
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c.setOverflow(overflow)
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// Store the resulting value (8-bits)
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c.A = result
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// Update sZero and sNegative
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c.setArithmeticFlags(c.A)
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c.setA(result)
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}
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// Performs addition in decimal mode
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@ -50,7 +153,35 @@ func (c *Cpu) adcDecimal(a uint8, b uint8, carryIn uint8) {
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c.setCarry(high > 15)
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c.setZero(result == 0)
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c.setNegative(false) // BCD is never negative
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c.setNegative(false) // BCD never sets negative
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c.setOverflow(false) // BCD never sets overflow
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c.A = result
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}
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func (c *Cpu) sbcDecimal(a uint8, b uint8, carryIn uint8) {
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var carryB uint8 = 0
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carryIn = (carryIn + 1) % 1
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low := (a & 0x0F) - (b & 0x0F) - carryIn
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if (low & 0x10) != 0 {
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low -= 6
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}
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if (low & 0x10) != 0 {
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carryB = 1
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}
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high := (a >> 4) - (b >> 4) - carryB
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if (high & 0x10) != 0 {
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high -= 6
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}
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result := (low & 0x0F) | (high << 4)
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c.setCarry((high & 0xFF) < 15)
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c.setZero(result == 0)
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c.setNegative(false) // BCD never sets negative
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c.setOverflow(false) // BCD never sets overflow
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c.A = result
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@ -32,18 +32,62 @@ func (c *Cpu) setCarry(state bool) {
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c.setStatus(sCarry, state)
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}
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func (c *Cpu) setOverflow(state bool) {
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c.setStatus(sOverflow, state)
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}
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func (c *Cpu) setZero(state bool) {
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c.setStatus(sZero, state)
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}
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func (c *Cpu) setInterrupt(state bool) {
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c.setStatus(sInterrupt, state)
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}
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func (c *Cpu) setDecimal(state bool) {
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c.setStatus(sDecimal, state)
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}
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func (c *Cpu) setBreak(state bool) {
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c.setStatus(sBreak, state)
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}
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func (c *Cpu) setOverflow(state bool) {
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c.setStatus(sOverflow, state)
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}
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func (c *Cpu) setNegative(state bool) {
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c.setStatus(sNegative, state)
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}
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func (c *Cpu) getCarry() bool {
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return c.getStatus(sCarry)
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}
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func (c *Cpu) getCarryInt() uint8 {
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return c.getStatusInt(sCarry)
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}
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func (c *Cpu) getZero() bool {
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return c.getStatus(sZero)
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}
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func (c *Cpu) getInterrupt() bool {
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return c.getStatus(sInterrupt)
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}
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func (c *Cpu) getDecimal() bool {
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return c.getStatus(sDecimal)
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}
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func (c *Cpu) getBreak() bool {
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return c.getStatus(sBreak)
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}
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func (c *Cpu) getOverflow() bool {
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return c.getStatus(sOverflow)
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}
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func (c *Cpu) getNegative() bool {
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return c.getStatus(sNegative)
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}
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func (c *Cpu) setArithmeticFlags(value uint8) {
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// Set sZero if value is 0
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c.setStatus(sZero, value == 0)
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@ -53,3 +97,23 @@ func (c *Cpu) setArithmeticFlags(value uint8) {
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// negatives
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c.setStatus(sNegative, (value>>7) == 1)
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}
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func (c *Cpu) setA(value byte) {
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c.A = value
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c.setArithmeticFlags(c.A)
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}
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func (c *Cpu) setX(value byte) {
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c.X = value
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c.setArithmeticFlags(c.X)
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}
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func (c *Cpu) setY(value byte) {
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c.Y = value
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c.setArithmeticFlags(c.Y)
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}
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func (c *Cpu) setSP(value byte) {
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c.SP = value
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c.setArithmeticFlags(c.SP)
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}
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1706
cpu_test.go
1706
cpu_test.go
File diff suppressed because it is too large
Load Diff
147
opcodes.go
147
opcodes.go
@ -144,12 +144,157 @@ type OpType struct {
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var opTypes = map[uint8]OpType{
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0xEA: OpType{0xEA, nop, implied, 1, 2},
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// Set instruction
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0x38: OpType{0x38, sec, implied, 1, 2},
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0xF8: OpType{0xF8, sed, implied, 1, 2},
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0x78: OpType{0x78, sei, implied, 1, 2},
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// Clear instructions
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0x18: OpType{0x18, clc, implied, 1, 2},
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0xD8: OpType{0xD8, cld, implied, 1, 2},
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0x58: OpType{0x58, cli, implied, 1, 2},
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0xB8: OpType{0xB8, clv, implied, 1, 2},
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// ADC
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0x69: OpType{0x69, adc, immediate, 2, 2},
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0x65: OpType{0x65, adc, zeropage, 2, 2},
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0x65: OpType{0x65, adc, zeropage, 2, 3},
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0x75: OpType{0x75, adc, zeropageX, 2, 4},
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0x6D: OpType{0x6D, adc, absolute, 3, 4},
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0x7D: OpType{0x7D, adc, absoluteX, 3, 4},
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0x79: OpType{0x79, adc, absoluteY, 3, 4},
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0x61: OpType{0x61, adc, indirectX, 2, 6},
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0x71: OpType{0x71, adc, indirectY, 2, 5},
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// SBC
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0xE9: OpType{0xE9, sbc, immediate, 2, 2},
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0xE5: OpType{0xE5, sbc, zeropage, 2, 3},
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0xF5: OpType{0xF5, sbc, zeropageX, 2, 4},
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0xED: OpType{0xED, sbc, absolute, 3, 4},
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0xFD: OpType{0xFD, sbc, absoluteX, 3, 4},
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0xF9: OpType{0xF9, sbc, absoluteY, 3, 4},
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0xE1: OpType{0xE1, sbc, indirectX, 2, 6},
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0xF1: OpType{0xF1, sbc, indirectY, 2, 5},
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// Increments
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0xE8: OpType{0xE8, inx, implied, 1, 2},
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0xC8: OpType{0xC8, iny, implied, 1, 2},
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0xE6: OpType{0xE6, inc, zeropage, 2, 5},
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0xF6: OpType{0xF6, inc, zeropageX, 2, 6},
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0xEE: OpType{0xEE, inc, absolute, 3, 6},
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0xFE: OpType{0xFE, inc, absoluteX, 3, 7},
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// Decrements
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0xCA: OpType{0xCA, dex, implied, 1, 2},
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0x88: OpType{0x88, dey, implied, 1, 2},
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0xC6: OpType{0xC6, dec, zeropage, 2, 5},
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0xD6: OpType{0xD6, dec, zeropageX, 2, 6},
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0xCE: OpType{0xCE, dec, absolute, 3, 6},
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0xDE: OpType{0xDE, dec, absoluteX, 3, 7},
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// LDA
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0xA9: OpType{0xA9, lda, immediate, 2, 2},
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0xA5: OpType{0xA5, lda, zeropage, 2, 3},
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0xB5: OpType{0xB5, lda, zeropageX, 2, 4},
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0xAD: OpType{0xAD, lda, absolute, 3, 4},
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0xBD: OpType{0xBD, lda, absoluteX, 3, 4},
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0xB9: OpType{0xB9, lda, absoluteY, 3, 4},
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0xA1: OpType{0xA1, lda, indirectX, 2, 6},
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0xB1: OpType{0xB1, lda, indirectY, 2, 5},
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// LDX
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0xA2: OpType{0xA2, ldx, immediate, 2, 2},
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0xA6: OpType{0xA6, ldx, zeropage, 2, 3},
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0xB6: OpType{0xB6, ldx, zeropageY, 2, 4},
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0xAE: OpType{0xAE, ldx, absolute, 3, 4},
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0xBE: OpType{0xBE, ldx, absoluteY, 3, 4},
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// LDY
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0xA0: OpType{0xA0, ldy, immediate, 2, 2},
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0xA4: OpType{0xA4, ldy, zeropage, 2, 3},
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0xB4: OpType{0xB4, ldy, zeropageY, 2, 4},
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0xAC: OpType{0xAC, ldy, absolute, 3, 4},
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0xBC: OpType{0xBC, ldy, absoluteY, 3, 4},
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// ORA
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0x09: OpType{0x09, ora, immediate, 2, 2},
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0x05: OpType{0x05, ora, zeropage, 2, 3},
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0x15: OpType{0x15, ora, zeropageX, 2, 4},
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0x0D: OpType{0x0D, ora, absolute, 3, 4},
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0x1D: OpType{0x1D, ora, absoluteX, 3, 4},
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0x19: OpType{0x19, ora, absoluteY, 3, 4},
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0x01: OpType{0x01, ora, indirectX, 2, 6},
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0x11: OpType{0x11, ora, indirectY, 2, 5},
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// AND
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0x29: OpType{0x29, and, immediate, 2, 2},
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0x25: OpType{0x25, and, zeropage, 2, 3},
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0x35: OpType{0x35, and, zeropageX, 2, 4},
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0x2D: OpType{0x2D, and, absolute, 3, 4},
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0x3D: OpType{0x3D, and, absoluteX, 3, 4},
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0x39: OpType{0x39, and, absoluteY, 3, 4},
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0x21: OpType{0x21, and, indirectX, 2, 6},
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0x31: OpType{0x31, and, indirectY, 2, 5},
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// EOR
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0x49: OpType{0x49, eor, immediate, 2, 2},
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0x45: OpType{0x45, eor, zeropage, 2, 3},
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0x55: OpType{0x55, eor, zeropageX, 2, 4},
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0x4D: OpType{0x4D, eor, absolute, 3, 4},
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0x5D: OpType{0x5D, eor, absoluteX, 3, 4},
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0x59: OpType{0x59, eor, absoluteY, 3, 4},
|
||||
0x41: OpType{0x41, eor, indirectX, 2, 6},
|
||||
0x51: OpType{0x51, eor, indirectY, 2, 5},
|
||||
|
||||
// STA
|
||||
0x85: OpType{0x85, sta, zeropage, 2, 3},
|
||||
0x95: OpType{0x95, sta, zeropageX, 2, 4},
|
||||
0x8D: OpType{0x8D, sta, absolute, 3, 4},
|
||||
0x9D: OpType{0x9D, sta, absoluteX, 3, 5},
|
||||
0x99: OpType{0x99, sta, absoluteY, 3, 5},
|
||||
0x81: OpType{0x81, sta, indirectX, 2, 6},
|
||||
0x91: OpType{0x91, sta, indirectY, 2, 6},
|
||||
|
||||
// STX
|
||||
0x86: OpType{0x86, stx, zeropage, 2, 3},
|
||||
0x96: OpType{0x96, stx, zeropageY, 2, 4},
|
||||
0x8E: OpType{0x8E, stx, absolute, 3, 4},
|
||||
|
||||
// STY
|
||||
0x84: OpType{0x84, sty, zeropage, 2, 3},
|
||||
0x94: OpType{0x94, sty, zeropageX, 2, 4},
|
||||
0x8C: OpType{0x8C, sty, absolute, 3, 4},
|
||||
|
||||
// TAX
|
||||
0xAA: OpType{0xAA, tax, implied, 1, 2},
|
||||
|
||||
// TAY
|
||||
0xA8: OpType{0xA8, tay, implied, 1, 2},
|
||||
|
||||
// TXA
|
||||
0x8A: OpType{0x8A, txa, implied, 1, 2},
|
||||
|
||||
// TXA
|
||||
0x98: OpType{0x98, tya, implied, 1, 2},
|
||||
|
||||
// TSX
|
||||
0xBA: OpType{0xBA, tsx, implied, 1, 2},
|
||||
|
||||
// TXS
|
||||
0x9A: OpType{0x9A, txs, implied, 1, 2},
|
||||
|
||||
// ASL
|
||||
0x0A: OpType{0x0A, asl, accumulator, 1, 2},
|
||||
0x06: OpType{0x06, asl, zeropage, 2, 5},
|
||||
0x16: OpType{0x16, asl, zeropageX, 2, 6},
|
||||
0x0E: OpType{0x0E, asl, absolute, 3, 6},
|
||||
0x1E: OpType{0x1E, asl, absoluteX, 3, 7},
|
||||
|
||||
// LSR
|
||||
0x4A: OpType{0x4A, lsr, accumulator, 1, 2},
|
||||
0x46: OpType{0x46, lsr, zeropage, 2, 5},
|
||||
0x56: OpType{0x56, lsr, zeropageX, 2, 6},
|
||||
0x4E: OpType{0x4E, lsr, absolute, 3, 6},
|
||||
0x5E: OpType{0x5E, lsr, absoluteX, 3, 7},
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user