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i6502/address_bus_test.go
Ariejan de Vroom da43c2bca1 Update Memory interface
Because io.Reader and io.Writer already claim the functions Read and
Write it was necessary to rename the Memory interface methods Read and
Write to ReadByte and WriteByte.
2014-08-19 16:49:48 +02:00

67 lines
1.3 KiB
Go

package i6502
import (
"testing"
"github.com/stretchr/testify/assert"
)
func TestEmptyAddressBus(t *testing.T) {
assert := assert.New(t)
bus, err := NewAddressBus()
assert.Nil(err)
if assert.NotNil(bus) {
assert.Equal(0, len(bus.addressables))
}
}
func TestAttachToAddressBus(t *testing.T) {
assert := assert.New(t)
bus, _ := NewAddressBus()
ram, _ := NewRam(0x10000)
bus.Attach(ram, 0x0000)
assert.Equal(1, len(bus.addressables))
}
func TestBusReadWrite(t *testing.T) {
assert := assert.New(t)
bus, _ := NewAddressBus()
ram, _ := NewRam(0x8000)
ram2, _ := NewRam(0x8000)
bus.Attach(ram, 0x0000)
bus.Attach(ram2, 0x8000)
// 8-bit Writing
bus.WriteByte(0x1234, 0xFA)
assert.Equal(0xFA, ram.ReadByte(0x1234))
// 16-bit Writing
bus.Write16(0x1000, 0xAB42)
assert.Equal(0x42, ram.ReadByte(0x1000))
assert.Equal(0xAB, ram.ReadByte(0x1001))
// 8-bit Reading
ram.WriteByte(0x5522, 0xDA)
assert.Equal(0xDA, bus.ReadByte(0x5522))
// 16-bit Reading
ram.WriteByte(0x4440, 0x7F)
ram.WriteByte(0x4441, 0x56)
assert.Equal(0x567F, bus.Read16(0x4440))
//// Test addressing memory not mounted at 0x0000
// Read from relative addressable Ram2: $C123
ram2.WriteByte(0x4123, 0xEF)
assert.Equal(0xEF, bus.ReadByte(0xC123))
bus.WriteByte(0x8001, 0x12)
assert.Equal(0x12, ram2.ReadByte(0x0001))
}