1
0
mirror of https://gitlab.com/camelot/kickc.git synced 2024-07-03 20:29:34 +00:00
kickc/src/test/ref/c64dtv-8bppchunkystretch.log

2760 lines
129 KiB
Plaintext
Raw Normal View History

Identified constant variable (byte*) dtvSetCpuBankSegment1::cpuBank
Identified constant variable (byte*) DTV_BLITTER_ALU
2019-06-12 23:15:34 +00:00
Inlined call (byte~) vicSelectGfxBank::$0 ← call toDd00 (byte*) vicSelectGfxBank::gfx
2019-05-30 20:29:04 +00:00
Culled Empty Block (label) @1
Culled Empty Block (label) @2
Culled Empty Block (label) @3
Culled Empty Block (label) main::@2
Culled Empty Block (label) main::@15
Culled Empty Block (label) main::@5
Culled Empty Block (label) main::@16
Culled Empty Block (label) main::@7
Culled Empty Block (label) main::@9
Culled Empty Block (label) main::@10
Culled Empty Block (label) main::@11
Culled Empty Block (label) main::@13
Culled Empty Block (label) main::@14
Culled Empty Block (label) @6
2018-08-22 22:24:32 +00:00
CONTROL FLOW GRAPH SSA
@begin: scope:[] from
2019-05-30 20:29:04 +00:00
(byte*) PROCPORT_DDR#0 ← ((byte*)) (number) 0
(byte) PROCPORT_DDR_MEMORY_MASK#0 ← (number) 7
(byte*) PROCPORT#0 ← ((byte*)) (number) 1
(byte) PROCPORT_RAM_IO#0 ← (number) $35
(byte*) RASTER#0 ← ((byte*)) (number) $d012
(byte*) BORDERCOL#0 ← ((byte*)) (number) $d020
(byte*) VIC_CONTROL#0 ← ((byte*)) (number) $d011
(byte) VIC_ECM#0 ← (number) $40
(byte) VIC_DEN#0 ← (number) $10
(byte) VIC_RSEL#0 ← (number) 8
(byte*) VIC_CONTROL2#0 ← ((byte*)) (number) $d016
(byte) VIC_MCM#0 ← (number) $10
(byte) VIC_CSEL#0 ← (number) 8
(byte*) VIC_MEMORY#0 ← ((byte*)) (number) $d018
(byte*) CIA2_PORT_A#0 ← ((byte*)) (number) $dd00
(byte*) CIA2_PORT_A_DDR#0 ← ((byte*)) (number) $dd02
to:@4
@4: scope:[] from @begin
2019-05-30 20:29:04 +00:00
(byte*) DTV_FEATURE#0 ← ((byte*)) (number) $d03f
(byte) DTV_FEATURE_ENABLE#0 ← (number) 1
(byte*) DTV_CONTROL#0 ← ((byte*)) (number) $d03c
(byte) DTV_LINEAR#0 ← (number) 1
(byte) DTV_HIGHCOLOR#0 ← (number) 4
(byte) DTV_COLORRAM_OFF#0 ← (number) $10
(byte) DTV_BADLINE_OFF#0 ← (number) $20
(byte) DTV_CHUNKY#0 ← (number) $40
(byte*) DTV_PALETTE#0 ← ((byte*)) (number) $d200
(byte*) DTV_PLANEB_START_LO#0 ← ((byte*)) (number) $d049
(byte*) DTV_PLANEB_START_MI#0 ← ((byte*)) (number) $d04a
(byte*) DTV_PLANEB_START_HI#0 ← ((byte*)) (number) $d04b
(byte*) DTV_PLANEB_STEP#0 ← ((byte*)) (number) $d04c
(byte*) DTV_PLANEB_MODULO_LO#0 ← ((byte*)) (number) $d047
(byte*) DTV_PLANEB_MODULO_HI#0 ← ((byte*)) (number) $d048
to:@5
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 ← phi( gfx_init_chunky/(byte) dtvSetCpuBankSegment1::cpuBankIdx#0 gfx_init_chunky::@4/(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 gfx_init_chunky::@6/(byte) dtvSetCpuBankSegment1::cpuBankIdx#2 )
2019-05-30 20:29:04 +00:00
(byte*) dtvSetCpuBankSegment1::cpuBank#0 ← ((byte*)) (number) $ff
*((byte*) dtvSetCpuBankSegment1::cpuBank#0) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3
asm { .byte$32,$dd lda$ff .byte$32,$00 }
to:dtvSetCpuBankSegment1::@return
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
return
to:@return
@5: scope:[] from @4
2019-05-30 20:29:04 +00:00
(byte*) CHUNKY#0 ← ((byte*)) (number) $8000
to:@7
main: scope:[main] from @7
asm { sei }
*((byte*) PROCPORT_DDR#0) ← (byte) PROCPORT_DDR_MEMORY_MASK#0
*((byte*) PROCPORT#0) ← (byte) PROCPORT_RAM_IO#0
call gfx_init_chunky
to:main::@17
main::@17: scope:[main] from main
*((byte*) DTV_FEATURE#0) ← (byte) DTV_FEATURE_ENABLE#0
(byte~) main::$1 ← (byte) DTV_HIGHCOLOR#0 | (byte) DTV_LINEAR#0
(byte~) main::$2 ← (byte~) main::$1 | (byte) DTV_COLORRAM_OFF#0
(byte~) main::$3 ← (byte~) main::$2 | (byte) DTV_CHUNKY#0
(byte~) main::$4 ← (byte~) main::$3 | (byte) DTV_BADLINE_OFF#0
*((byte*) DTV_CONTROL#0) ← (byte~) main::$4
(byte~) main::$5 ← (byte) VIC_DEN#0 | (byte) VIC_ECM#0
(byte~) main::$6 ← (byte~) main::$5 | (byte) VIC_RSEL#0
2019-05-30 20:29:04 +00:00
(number~) main::$7 ← (byte~) main::$6 | (number) 3
*((byte*) VIC_CONTROL#0) ← (number~) main::$7
(byte~) main::$8 ← (byte) VIC_MCM#0 | (byte) VIC_CSEL#0
*((byte*) VIC_CONTROL2#0) ← (byte~) main::$8
(byte~) main::$9 ← < (byte*) CHUNKY#0
*((byte*) DTV_PLANEB_START_LO#0) ← (byte~) main::$9
(byte~) main::$10 ← > (byte*) CHUNKY#0
*((byte*) DTV_PLANEB_START_MI#0) ← (byte~) main::$10
2019-05-30 20:29:04 +00:00
*((byte*) DTV_PLANEB_START_HI#0) ← (number) 0
*((byte*) DTV_PLANEB_STEP#0) ← (number) 8
*((byte*) DTV_PLANEB_MODULO_LO#0) ← (number) 0
*((byte*) DTV_PLANEB_MODULO_HI#0) ← (number) 0
*((byte*) CIA2_PORT_A_DDR#0) ← (number) 3
(word~) main::$11 ← ((word)) (byte*) CHUNKY#0
2019-05-30 20:29:04 +00:00
(number~) main::$12 ← (word~) main::$11 / (number) $4000
(byte~) main::$13 ← ((byte)) (number~) main::$12
(number~) main::$14 ← (number) 3 ^ (byte~) main::$13
*((byte*) CIA2_PORT_A#0) ← (number~) main::$14
(word~) main::$15 ← ((word)) (byte*) CHUNKY#0
2019-05-30 20:29:04 +00:00
(number~) main::$16 ← (word~) main::$15 & (number) $3fff
(number~) main::$17 ← (number~) main::$16 / (number) $40
(byte~) main::$18 ← ((byte)) (number~) main::$17
(word~) main::$19 ← ((word)) (byte*) CHUNKY#0
2019-05-30 20:29:04 +00:00
(number~) main::$20 ← (word~) main::$19 & (number) $3fff
(number~) main::$21 ← > (number~) main::$20
(number~) main::$22 ← (number~) main::$21 / (number) 4
(number~) main::$23 ← (byte~) main::$18 | (number~) main::$22
*((byte*) VIC_MEMORY#0) ← (number~) main::$23
(byte) main::j#0 ← (byte) 0
2019-03-31 15:57:54 +00:00
to:main::@1
main::@1: scope:[main] from main::@1 main::@17
(byte) main::j#2 ← phi( main::@1/(byte) main::j#1 main::@17/(byte) main::j#0 )
*((byte*) DTV_PALETTE#0 + (byte) main::j#2) ← (byte) main::j#2
(byte) main::j#1 ← (byte) main::j#2 + rangenext(0,$f)
(bool~) main::$24 ← (byte) main::j#1 != rangelast(0,$f)
2019-03-31 15:57:54 +00:00
if((bool~) main::$24) goto main::@1
to:main::@3
main::@3: scope:[main] from main::@1 main::@12
if(true) goto main::@4
to:main::@return
2019-03-31 15:57:54 +00:00
main::@4: scope:[main] from main::@3
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
(byte~) main::$25 ← (byte) VIC_DEN#0 | (byte) VIC_ECM#0
(byte~) main::$26 ← (byte~) main::$25 | (byte) VIC_RSEL#0
2019-05-30 20:29:04 +00:00
(number~) main::$27 ← (byte~) main::$26 | (number) 3
*((byte*) VIC_CONTROL#0) ← (number~) main::$27
*((byte*) BORDERCOL#0) ← (number) 0
(byte) main::rst#0 ← (number) $42
2019-03-31 15:57:54 +00:00
to:main::@6
2019-05-30 20:29:04 +00:00
main::@6: scope:[main] from main::@4 main::@6
(byte) main::rst#2 ← phi( main::@4/(byte) main::rst#0 main::@6/(byte) main::rst#2 )
2018-04-28 06:41:05 +00:00
(bool~) main::$28 ← *((byte*) RASTER#0) != (byte) main::rst#2
2019-05-30 20:29:04 +00:00
if((bool~) main::$28) goto main::@6
to:main::@8
2019-03-31 15:57:54 +00:00
main::@8: scope:[main] from main::@6
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
2019-03-31 15:57:54 +00:00
to:main::@12
main::@12: scope:[main] from main::@12 main::@8
(byte) main::rst#1 ← *((byte*) RASTER#0)
(byte~) main::$29 ← (byte) VIC_DEN#0 | (byte) VIC_ECM#0
(byte~) main::$30 ← (byte~) main::$29 | (byte) VIC_RSEL#0
2019-05-30 20:29:04 +00:00
(number~) main::$31 ← (byte) main::rst#1 & (number) 7
(number~) main::$32 ← (byte~) main::$30 | (number~) main::$31
*((byte*) VIC_CONTROL#0) ← (number~) main::$32
(number~) main::$33 ← (byte) main::rst#1 * (number) $10
*((byte*) BORDERCOL#0) ← (number~) main::$33
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
2019-05-30 20:29:04 +00:00
(bool~) main::$34 ← (byte) main::rst#1 != (number) $f2
2019-03-31 15:57:54 +00:00
if((bool~) main::$34) goto main::@12
to:main::@3
main::@return: scope:[main] from main::@3
return
to:@return
gfx_init_chunky: scope:[gfx_init_chunky] from main
2019-05-30 20:29:04 +00:00
(byte*~) gfx_init_chunky::$0 ← (byte*) CHUNKY#0 / (number) $4000
(byte~) gfx_init_chunky::$1 ← ((byte)) (byte*~) gfx_init_chunky::$0
(byte) gfx_init_chunky::gfxbCpuBank#0 ← (byte~) gfx_init_chunky::$1
(byte) dtvSetCpuBankSegment1::cpuBankIdx#0 ← (byte) gfx_init_chunky::gfxbCpuBank#0
call dtvSetCpuBankSegment1
to:gfx_init_chunky::@7
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky
(byte) gfx_init_chunky::gfxbCpuBank#3 ← phi( gfx_init_chunky/(byte) gfx_init_chunky::gfxbCpuBank#0 )
(byte) gfx_init_chunky::gfxbCpuBank#1 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#3
2019-05-30 20:29:04 +00:00
(byte*) gfx_init_chunky::gfxb#0 ← ((byte*)) (number) $4000
(byte) gfx_init_chunky::y#0 ← (byte) 0
to:gfx_init_chunky::@1
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky::@5 gfx_init_chunky::@7
(byte) gfx_init_chunky::gfxbCpuBank#7 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::gfxbCpuBank#9 gfx_init_chunky::@7/(byte) gfx_init_chunky::gfxbCpuBank#1 )
(byte) gfx_init_chunky::y#6 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::y#1 gfx_init_chunky::@7/(byte) gfx_init_chunky::y#0 )
(byte*) gfx_init_chunky::gfxb#5 ← phi( gfx_init_chunky::@5/(byte*) gfx_init_chunky::gfxb#6 gfx_init_chunky::@7/(byte*) gfx_init_chunky::gfxb#0 )
(word) gfx_init_chunky::x#0 ← (word) 0
to:gfx_init_chunky::@2
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
(byte) gfx_init_chunky::gfxbCpuBank#6 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
(byte) gfx_init_chunky::y#4 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::y#6 gfx_init_chunky::@3/(byte) gfx_init_chunky::y#2 )
(word) gfx_init_chunky::x#3 ← phi( gfx_init_chunky::@1/(word) gfx_init_chunky::x#0 gfx_init_chunky::@3/(word) gfx_init_chunky::x#1 )
(byte*) gfx_init_chunky::gfxb#3 ← phi( gfx_init_chunky::@1/(byte*) gfx_init_chunky::gfxb#5 gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
(bool~) gfx_init_chunky::$5 ← (byte*) gfx_init_chunky::gfxb#3 == (number) $8000
(bool~) gfx_init_chunky::$6 ← ! (bool~) gfx_init_chunky::$5
if((bool~) gfx_init_chunky::$6) goto gfx_init_chunky::@3
to:gfx_init_chunky::@4
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@8
(byte) gfx_init_chunky::gfxbCpuBank#8 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#6 gfx_init_chunky::@8/(byte) gfx_init_chunky::gfxbCpuBank#2 )
(byte*) gfx_init_chunky::gfxb#4 ← phi( gfx_init_chunky::@2/(byte*) gfx_init_chunky::gfxb#3 gfx_init_chunky::@8/(byte*) gfx_init_chunky::gfxb#2 )
(byte) gfx_init_chunky::y#2 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::y#4 gfx_init_chunky::@8/(byte) gfx_init_chunky::y#5 )
(word) gfx_init_chunky::x#2 ← phi( gfx_init_chunky::@2/(word) gfx_init_chunky::x#3 gfx_init_chunky::@8/(word) gfx_init_chunky::x#4 )
(word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#2
(byte~) gfx_init_chunky::$9 ← ((byte)) (word~) gfx_init_chunky::$8
(byte) gfx_init_chunky::c#0 ← (byte~) gfx_init_chunky::$9
*((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0
(byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4
(word) gfx_init_chunky::x#1 ← (word) gfx_init_chunky::x#2 + rangenext(0,$13f)
(bool~) gfx_init_chunky::$10 ← (word) gfx_init_chunky::x#1 != rangelast(0,$13f)
if((bool~) gfx_init_chunky::$10) goto gfx_init_chunky::@2
to:gfx_init_chunky::@5
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
(byte) gfx_init_chunky::y#7 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::y#4 )
(word) gfx_init_chunky::x#5 ← phi( gfx_init_chunky::@2/(word) gfx_init_chunky::x#3 )
(byte) gfx_init_chunky::gfxbCpuBank#4 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#6 )
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4
call dtvSetCpuBankSegment1
to:gfx_init_chunky::@8
gfx_init_chunky::@8: scope:[gfx_init_chunky] from gfx_init_chunky::@4
(byte) gfx_init_chunky::y#5 ← phi( gfx_init_chunky::@4/(byte) gfx_init_chunky::y#7 )
(word) gfx_init_chunky::x#4 ← phi( gfx_init_chunky::@4/(word) gfx_init_chunky::x#5 )
(byte) gfx_init_chunky::gfxbCpuBank#5 ← phi( gfx_init_chunky::@4/(byte) gfx_init_chunky::gfxbCpuBank#4 )
(byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#5
2019-05-30 20:29:04 +00:00
(byte*) gfx_init_chunky::gfxb#2 ← ((byte*)) (number) $4000
to:gfx_init_chunky::@3
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
(byte) gfx_init_chunky::gfxbCpuBank#9 ← phi( gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
(byte*) gfx_init_chunky::gfxb#6 ← phi( gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
(byte) gfx_init_chunky::y#3 ← phi( gfx_init_chunky::@3/(byte) gfx_init_chunky::y#2 )
(byte) gfx_init_chunky::y#1 ← (byte) gfx_init_chunky::y#3 + rangenext(0,$32)
(bool~) gfx_init_chunky::$11 ← (byte) gfx_init_chunky::y#1 != rangelast(0,$32)
if((bool~) gfx_init_chunky::$11) goto gfx_init_chunky::@1
to:gfx_init_chunky::@6
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
(byte~) gfx_init_chunky::$3 ← ((byte)) (number) $4000/(number) $4000
(byte) dtvSetCpuBankSegment1::cpuBankIdx#2 ← (byte~) gfx_init_chunky::$3
call dtvSetCpuBankSegment1
to:gfx_init_chunky::@9
gfx_init_chunky::@9: scope:[gfx_init_chunky] from gfx_init_chunky::@6
to:gfx_init_chunky::@return
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@9
return
to:@return
@7: scope:[] from @5
call main
to:@8
@8: scope:[] from @7
to:@end
@end: scope:[] from @8
SYMBOL TABLE SSA
(label) @4
(label) @5
(label) @7
(label) @8
(label) @begin
(label) @end
(byte*) BORDERCOL
(byte*) BORDERCOL#0
(byte*) CHUNKY
(byte*) CHUNKY#0
(byte*) CIA2_PORT_A
(byte*) CIA2_PORT_A#0
(byte*) CIA2_PORT_A_DDR
(byte*) CIA2_PORT_A_DDR#0
(byte) DTV_BADLINE_OFF
(byte) DTV_BADLINE_OFF#0
(byte) DTV_CHUNKY
(byte) DTV_CHUNKY#0
(byte) DTV_COLORRAM_OFF
(byte) DTV_COLORRAM_OFF#0
(byte*) DTV_CONTROL
(byte*) DTV_CONTROL#0
(byte*) DTV_FEATURE
(byte*) DTV_FEATURE#0
(byte) DTV_FEATURE_ENABLE
(byte) DTV_FEATURE_ENABLE#0
(byte) DTV_HIGHCOLOR
(byte) DTV_HIGHCOLOR#0
(byte) DTV_LINEAR
(byte) DTV_LINEAR#0
(byte*) DTV_PALETTE
(byte*) DTV_PALETTE#0
(byte*) DTV_PLANEB_MODULO_HI
(byte*) DTV_PLANEB_MODULO_HI#0
(byte*) DTV_PLANEB_MODULO_LO
(byte*) DTV_PLANEB_MODULO_LO#0
(byte*) DTV_PLANEB_START_HI
(byte*) DTV_PLANEB_START_HI#0
(byte*) DTV_PLANEB_START_LO
(byte*) DTV_PLANEB_START_LO#0
(byte*) DTV_PLANEB_START_MI
(byte*) DTV_PLANEB_START_MI#0
(byte*) DTV_PLANEB_STEP
(byte*) DTV_PLANEB_STEP#0
(byte*) PROCPORT
(byte*) PROCPORT#0
(byte*) PROCPORT_DDR
(byte*) PROCPORT_DDR#0
(byte) PROCPORT_DDR_MEMORY_MASK
(byte) PROCPORT_DDR_MEMORY_MASK#0
(byte) PROCPORT_RAM_IO
(byte) PROCPORT_RAM_IO#0
(byte*) RASTER
(byte*) RASTER#0
(byte*) VIC_CONTROL
(byte*) VIC_CONTROL#0
(byte*) VIC_CONTROL2
(byte*) VIC_CONTROL2#0
(byte) VIC_CSEL
(byte) VIC_CSEL#0
(byte) VIC_DEN
(byte) VIC_DEN#0
(byte) VIC_ECM
(byte) VIC_ECM#0
(byte) VIC_MCM
(byte) VIC_MCM#0
(byte*) VIC_MEMORY
(byte*) VIC_MEMORY#0
(byte) VIC_RSEL
(byte) VIC_RSEL#0
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
(label) dtvSetCpuBankSegment1::@return
(byte*) dtvSetCpuBankSegment1::cpuBank
(byte*) dtvSetCpuBankSegment1::cpuBank#0
(byte) dtvSetCpuBankSegment1::cpuBankIdx
(byte) dtvSetCpuBankSegment1::cpuBankIdx#0
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1
(byte) dtvSetCpuBankSegment1::cpuBankIdx#2
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3
(void()) gfx_init_chunky()
(byte*~) gfx_init_chunky::$0
(byte~) gfx_init_chunky::$1
(bool~) gfx_init_chunky::$10
(bool~) gfx_init_chunky::$11
(byte~) gfx_init_chunky::$3
(bool~) gfx_init_chunky::$5
(bool~) gfx_init_chunky::$6
(word~) gfx_init_chunky::$8
(byte~) gfx_init_chunky::$9
(label) gfx_init_chunky::@1
(label) gfx_init_chunky::@2
(label) gfx_init_chunky::@3
(label) gfx_init_chunky::@4
(label) gfx_init_chunky::@5
(label) gfx_init_chunky::@6
(label) gfx_init_chunky::@7
(label) gfx_init_chunky::@8
(label) gfx_init_chunky::@9
(label) gfx_init_chunky::@return
(byte) gfx_init_chunky::c
(byte) gfx_init_chunky::c#0
(byte*) gfx_init_chunky::gfxb
(byte*) gfx_init_chunky::gfxb#0
(byte*) gfx_init_chunky::gfxb#1
(byte*) gfx_init_chunky::gfxb#2
(byte*) gfx_init_chunky::gfxb#3
(byte*) gfx_init_chunky::gfxb#4
(byte*) gfx_init_chunky::gfxb#5
(byte*) gfx_init_chunky::gfxb#6
(byte) gfx_init_chunky::gfxbCpuBank
(byte) gfx_init_chunky::gfxbCpuBank#0
(byte) gfx_init_chunky::gfxbCpuBank#1
(byte) gfx_init_chunky::gfxbCpuBank#2
(byte) gfx_init_chunky::gfxbCpuBank#3
(byte) gfx_init_chunky::gfxbCpuBank#4
(byte) gfx_init_chunky::gfxbCpuBank#5
(byte) gfx_init_chunky::gfxbCpuBank#6
(byte) gfx_init_chunky::gfxbCpuBank#7
(byte) gfx_init_chunky::gfxbCpuBank#8
(byte) gfx_init_chunky::gfxbCpuBank#9
(word) gfx_init_chunky::x
(word) gfx_init_chunky::x#0
(word) gfx_init_chunky::x#1
(word) gfx_init_chunky::x#2
(word) gfx_init_chunky::x#3
(word) gfx_init_chunky::x#4
(word) gfx_init_chunky::x#5
(byte) gfx_init_chunky::y
(byte) gfx_init_chunky::y#0
(byte) gfx_init_chunky::y#1
(byte) gfx_init_chunky::y#2
(byte) gfx_init_chunky::y#3
(byte) gfx_init_chunky::y#4
(byte) gfx_init_chunky::y#5
(byte) gfx_init_chunky::y#6
(byte) gfx_init_chunky::y#7
(void()) main()
(byte~) main::$1
(byte~) main::$10
(word~) main::$11
2019-05-30 20:29:04 +00:00
(number~) main::$12
(byte~) main::$13
2019-05-30 20:29:04 +00:00
(number~) main::$14
(word~) main::$15
2019-05-30 20:29:04 +00:00
(number~) main::$16
(number~) main::$17
(byte~) main::$18
(word~) main::$19
(byte~) main::$2
2019-05-30 20:29:04 +00:00
(number~) main::$20
(number~) main::$21
(number~) main::$22
(number~) main::$23
2018-04-28 06:41:05 +00:00
(bool~) main::$24
(byte~) main::$25
(byte~) main::$26
2019-05-30 20:29:04 +00:00
(number~) main::$27
2018-04-28 06:41:05 +00:00
(bool~) main::$28
(byte~) main::$29
(byte~) main::$3
(byte~) main::$30
2019-05-30 20:29:04 +00:00
(number~) main::$31
(number~) main::$32
(number~) main::$33
2018-04-28 06:41:05 +00:00
(bool~) main::$34
(byte~) main::$4
(byte~) main::$5
(byte~) main::$6
2019-05-30 20:29:04 +00:00
(number~) main::$7
(byte~) main::$8
(byte~) main::$9
(label) main::@1
2019-03-31 15:57:54 +00:00
(label) main::@12
(label) main::@17
2019-03-31 15:57:54 +00:00
(label) main::@3
(label) main::@4
(label) main::@6
(label) main::@8
(label) main::@return
(byte) main::j
(byte) main::j#0
(byte) main::j#1
(byte) main::j#2
(byte) main::rst
(byte) main::rst#0
(byte) main::rst#1
(byte) main::rst#2
2019-05-30 20:29:04 +00:00
Adding number conversion cast (unumber) 7 in (byte) PROCPORT_DDR_MEMORY_MASK#0 ← (number) 7
Adding number conversion cast (unumber) $35 in (byte) PROCPORT_RAM_IO#0 ← (number) $35
Adding number conversion cast (unumber) $40 in (byte) VIC_ECM#0 ← (number) $40
Adding number conversion cast (unumber) $10 in (byte) VIC_DEN#0 ← (number) $10
Adding number conversion cast (unumber) 8 in (byte) VIC_RSEL#0 ← (number) 8
Adding number conversion cast (unumber) $10 in (byte) VIC_MCM#0 ← (number) $10
Adding number conversion cast (unumber) 8 in (byte) VIC_CSEL#0 ← (number) 8
Adding number conversion cast (unumber) 1 in (byte) DTV_FEATURE_ENABLE#0 ← (number) 1
Adding number conversion cast (unumber) 1 in (byte) DTV_LINEAR#0 ← (number) 1
Adding number conversion cast (unumber) 4 in (byte) DTV_HIGHCOLOR#0 ← (number) 4
Adding number conversion cast (unumber) $10 in (byte) DTV_COLORRAM_OFF#0 ← (number) $10
Adding number conversion cast (unumber) $20 in (byte) DTV_BADLINE_OFF#0 ← (number) $20
Adding number conversion cast (unumber) $40 in (byte) DTV_CHUNKY#0 ← (number) $40
Adding number conversion cast (unumber) 3 in (number~) main::$7 ← (byte~) main::$6 | (number) 3
Adding number conversion cast (unumber) main::$7 in (number~) main::$7 ← (byte~) main::$6 | (unumber)(number) 3
Adding number conversion cast (unumber) 0 in *((byte*) DTV_PLANEB_START_HI#0) ← (number) 0
Adding number conversion cast (unumber) 8 in *((byte*) DTV_PLANEB_STEP#0) ← (number) 8
Adding number conversion cast (unumber) 0 in *((byte*) DTV_PLANEB_MODULO_LO#0) ← (number) 0
Adding number conversion cast (unumber) 0 in *((byte*) DTV_PLANEB_MODULO_HI#0) ← (number) 0
Adding number conversion cast (unumber) 3 in *((byte*) CIA2_PORT_A_DDR#0) ← (number) 3
Adding number conversion cast (unumber) $4000 in (number~) main::$12 ← (word~) main::$11 / (number) $4000
Adding number conversion cast (unumber) main::$12 in (number~) main::$12 ← (word~) main::$11 / (unumber)(number) $4000
Adding number conversion cast (unumber) 3 in (number~) main::$14 ← (number) 3 ^ (byte~) main::$13
Adding number conversion cast (unumber) main::$14 in (number~) main::$14 ← (unumber)(number) 3 ^ (byte~) main::$13
Adding number conversion cast (unumber) $3fff in (number~) main::$16 ← (word~) main::$15 & (number) $3fff
Adding number conversion cast (unumber) main::$16 in (number~) main::$16 ← (word~) main::$15 & (unumber)(number) $3fff
Adding number conversion cast (unumber) $40 in (number~) main::$17 ← (unumber~) main::$16 / (number) $40
Adding number conversion cast (unumber) main::$17 in (number~) main::$17 ← (unumber~) main::$16 / (unumber)(number) $40
Adding number conversion cast (unumber) $3fff in (number~) main::$20 ← (word~) main::$19 & (number) $3fff
Adding number conversion cast (unumber) main::$20 in (number~) main::$20 ← (word~) main::$19 & (unumber)(number) $3fff
Adding number conversion cast (unumber) main::$21 in (number~) main::$21 ← > (unumber~) main::$20
Adding number conversion cast (unumber) 4 in (number~) main::$22 ← (unumber~) main::$21 / (number) 4
Adding number conversion cast (unumber) main::$22 in (number~) main::$22 ← (unumber~) main::$21 / (unumber)(number) 4
Adding number conversion cast (unumber) main::$23 in (number~) main::$23 ← (byte~) main::$18 | (unumber~) main::$22
Adding number conversion cast (unumber) 3 in (number~) main::$27 ← (byte~) main::$26 | (number) 3
Adding number conversion cast (unumber) main::$27 in (number~) main::$27 ← (byte~) main::$26 | (unumber)(number) 3
Adding number conversion cast (unumber) 0 in *((byte*) BORDERCOL#0) ← (number) 0
Adding number conversion cast (unumber) $42 in (byte) main::rst#0 ← (number) $42
Adding number conversion cast (unumber) 7 in (number~) main::$31 ← (byte) main::rst#1 & (number) 7
Adding number conversion cast (unumber) main::$31 in (number~) main::$31 ← (byte) main::rst#1 & (unumber)(number) 7
Adding number conversion cast (unumber) main::$32 in (number~) main::$32 ← (byte~) main::$30 | (unumber~) main::$31
Adding number conversion cast (unumber) $10 in (number~) main::$33 ← (byte) main::rst#1 * (number) $10
Adding number conversion cast (unumber) main::$33 in (number~) main::$33 ← (byte) main::rst#1 * (unumber)(number) $10
Adding number conversion cast (unumber) $f2 in (bool~) main::$34 ← (byte) main::rst#1 != (number) $f2
Adding number conversion cast (unumber) $4000 in (byte*~) gfx_init_chunky::$0 ← (byte*) CHUNKY#0 / (number) $4000
Adding number conversion cast (unumber) $8000 in (bool~) gfx_init_chunky::$5 ← (byte*) gfx_init_chunky::gfxb#3 == (number) $8000
2019-05-30 20:29:04 +00:00
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast (byte*) PROCPORT_DDR#0 ← (byte*)(number) 0
Inlining cast (byte) PROCPORT_DDR_MEMORY_MASK#0 ← (unumber)(number) 7
Inlining cast (byte*) PROCPORT#0 ← (byte*)(number) 1
Inlining cast (byte) PROCPORT_RAM_IO#0 ← (unumber)(number) $35
Inlining cast (byte*) RASTER#0 ← (byte*)(number) $d012
Inlining cast (byte*) BORDERCOL#0 ← (byte*)(number) $d020
Inlining cast (byte*) VIC_CONTROL#0 ← (byte*)(number) $d011
Inlining cast (byte) VIC_ECM#0 ← (unumber)(number) $40
Inlining cast (byte) VIC_DEN#0 ← (unumber)(number) $10
Inlining cast (byte) VIC_RSEL#0 ← (unumber)(number) 8
Inlining cast (byte*) VIC_CONTROL2#0 ← (byte*)(number) $d016
Inlining cast (byte) VIC_MCM#0 ← (unumber)(number) $10
Inlining cast (byte) VIC_CSEL#0 ← (unumber)(number) 8
Inlining cast (byte*) VIC_MEMORY#0 ← (byte*)(number) $d018
Inlining cast (byte*) CIA2_PORT_A#0 ← (byte*)(number) $dd00
Inlining cast (byte*) CIA2_PORT_A_DDR#0 ← (byte*)(number) $dd02
Inlining cast (byte*) DTV_FEATURE#0 ← (byte*)(number) $d03f
Inlining cast (byte) DTV_FEATURE_ENABLE#0 ← (unumber)(number) 1
Inlining cast (byte*) DTV_CONTROL#0 ← (byte*)(number) $d03c
Inlining cast (byte) DTV_LINEAR#0 ← (unumber)(number) 1
Inlining cast (byte) DTV_HIGHCOLOR#0 ← (unumber)(number) 4
Inlining cast (byte) DTV_COLORRAM_OFF#0 ← (unumber)(number) $10
Inlining cast (byte) DTV_BADLINE_OFF#0 ← (unumber)(number) $20
Inlining cast (byte) DTV_CHUNKY#0 ← (unumber)(number) $40
Inlining cast (byte*) DTV_PALETTE#0 ← (byte*)(number) $d200
Inlining cast (byte*) DTV_PLANEB_START_LO#0 ← (byte*)(number) $d049
Inlining cast (byte*) DTV_PLANEB_START_MI#0 ← (byte*)(number) $d04a
Inlining cast (byte*) DTV_PLANEB_START_HI#0 ← (byte*)(number) $d04b
Inlining cast (byte*) DTV_PLANEB_STEP#0 ← (byte*)(number) $d04c
Inlining cast (byte*) DTV_PLANEB_MODULO_LO#0 ← (byte*)(number) $d047
Inlining cast (byte*) DTV_PLANEB_MODULO_HI#0 ← (byte*)(number) $d048
Inlining cast (byte*) dtvSetCpuBankSegment1::cpuBank#0 ← (byte*)(number) $ff
Inlining cast (byte*) CHUNKY#0 ← (byte*)(number) $8000
Inlining cast *((byte*) DTV_PLANEB_START_HI#0) ← (unumber)(number) 0
Inlining cast *((byte*) DTV_PLANEB_STEP#0) ← (unumber)(number) 8
Inlining cast *((byte*) DTV_PLANEB_MODULO_LO#0) ← (unumber)(number) 0
Inlining cast *((byte*) DTV_PLANEB_MODULO_HI#0) ← (unumber)(number) 0
Inlining cast *((byte*) CIA2_PORT_A_DDR#0) ← (unumber)(number) 3
Inlining cast (word~) main::$11 ← (word)(byte*) CHUNKY#0
Inlining cast (byte~) main::$13 ← (byte)(unumber~) main::$12
Inlining cast (word~) main::$15 ← (word)(byte*) CHUNKY#0
Inlining cast (byte~) main::$18 ← (byte)(unumber~) main::$17
Inlining cast (word~) main::$19 ← (word)(byte*) CHUNKY#0
Inlining cast *((byte*) BORDERCOL#0) ← (unumber)(number) 0
Inlining cast (byte) main::rst#0 ← (unumber)(number) $42
Inlining cast (byte~) gfx_init_chunky::$1 ← (byte)(byte*~) gfx_init_chunky::$0
Inlining cast (byte*) gfx_init_chunky::gfxb#0 ← (byte*)(number) $4000
Inlining cast (byte~) gfx_init_chunky::$9 ← (byte)(word~) gfx_init_chunky::$8
2019-05-30 20:29:04 +00:00
Inlining cast (byte*) gfx_init_chunky::gfxb#2 ← (byte*)(number) $4000
Inlining cast (byte~) gfx_init_chunky::$3 ← (byte)(number) $4000/(number) $4000
2019-05-30 20:29:04 +00:00
Successful SSA optimization Pass2InlineCast
Simplifying constant pointer cast (byte*) 0
Simplifying constant integer cast 7
Simplifying constant pointer cast (byte*) 1
Simplifying constant integer cast $35
Simplifying constant pointer cast (byte*) 53266
Simplifying constant pointer cast (byte*) 53280
Simplifying constant pointer cast (byte*) 53265
Simplifying constant integer cast $40
Simplifying constant integer cast $10
Simplifying constant integer cast 8
Simplifying constant pointer cast (byte*) 53270
Simplifying constant integer cast $10
Simplifying constant integer cast 8
Simplifying constant pointer cast (byte*) 53272
Simplifying constant pointer cast (byte*) 56576
Simplifying constant pointer cast (byte*) 56578
Simplifying constant pointer cast (byte*) 53311
Simplifying constant integer cast 1
Simplifying constant pointer cast (byte*) 53308
Simplifying constant integer cast 1
Simplifying constant integer cast 4
Simplifying constant integer cast $10
Simplifying constant integer cast $20
Simplifying constant integer cast $40
Simplifying constant pointer cast (byte*) 53760
Simplifying constant pointer cast (byte*) 53321
Simplifying constant pointer cast (byte*) 53322
Simplifying constant pointer cast (byte*) 53323
Simplifying constant pointer cast (byte*) 53324
Simplifying constant pointer cast (byte*) 53319
Simplifying constant pointer cast (byte*) 53320
Simplifying constant pointer cast (byte*) 255
Simplifying constant pointer cast (byte*) 32768
Simplifying constant integer cast 3
Simplifying constant integer cast 0
Simplifying constant integer cast 8
Simplifying constant integer cast 0
Simplifying constant integer cast 0
Simplifying constant integer cast 3
Simplifying constant integer cast $4000
Simplifying constant integer cast 3
Simplifying constant integer cast $3fff
Simplifying constant integer cast $40
Simplifying constant integer cast $3fff
Simplifying constant integer cast 4
Simplifying constant integer cast 3
Simplifying constant integer cast 0
Simplifying constant integer cast $42
Simplifying constant integer cast 7
Simplifying constant integer cast $10
Simplifying constant integer cast $f2
Simplifying constant integer cast $4000
Simplifying constant pointer cast (byte*) 16384
Simplifying constant integer cast $8000
Simplifying constant pointer cast (byte*) 16384
Successful SSA optimization PassNCastSimplification
Finalized unsigned number type (byte) 7
Finalized unsigned number type (byte) $35
Finalized unsigned number type (byte) $40
Finalized unsigned number type (byte) $10
Finalized unsigned number type (byte) 8
Finalized unsigned number type (byte) $10
Finalized unsigned number type (byte) 8
Finalized unsigned number type (byte) 1
Finalized unsigned number type (byte) 1
Finalized unsigned number type (byte) 4
Finalized unsigned number type (byte) $10
Finalized unsigned number type (byte) $20
Finalized unsigned number type (byte) $40
Finalized unsigned number type (byte) 3
Finalized unsigned number type (byte) 0
Finalized unsigned number type (byte) 8
Finalized unsigned number type (byte) 0
Finalized unsigned number type (byte) 0
Finalized unsigned number type (byte) 3
Finalized unsigned number type (word) $4000
Finalized unsigned number type (byte) 3
Finalized unsigned number type (word) $3fff
Finalized unsigned number type (byte) $40
Finalized unsigned number type (word) $3fff
Finalized unsigned number type (byte) 4
Finalized unsigned number type (byte) 3
Finalized unsigned number type (byte) 0
Finalized unsigned number type (byte) $42
Finalized unsigned number type (byte) 7
Finalized unsigned number type (byte) $10
Finalized unsigned number type (byte) $f2
Finalized unsigned number type (word) $4000
Finalized unsigned number type (word) $8000
Successful SSA optimization PassNFinalizeNumberTypeConversions
Inferred type updated to byte in (unumber~) main::$7 ← (byte~) main::$6 | (byte) 3
Inferred type updated to word in (unumber~) main::$12 ← (word~) main::$11 / (word) $4000
Inferred type updated to byte in (unumber~) main::$14 ← (byte) 3 ^ (byte~) main::$13
Inferred type updated to word in (unumber~) main::$16 ← (word~) main::$15 & (word) $3fff
Inferred type updated to word in (unumber~) main::$17 ← (word~) main::$16 / (byte) $40
Inferred type updated to word in (unumber~) main::$20 ← (word~) main::$19 & (word) $3fff
Inferred type updated to byte in (unumber~) main::$21 ← > (word~) main::$20
Inferred type updated to byte in (unumber~) main::$22 ← (byte~) main::$21 / (byte) 4
Inferred type updated to byte in (unumber~) main::$23 ← (byte~) main::$18 | (byte~) main::$22
Inferred type updated to byte in (unumber~) main::$27 ← (byte~) main::$26 | (byte) 3
Inferred type updated to byte in (unumber~) main::$31 ← (byte) main::rst#1 & (byte) 7
Inferred type updated to byte in (unumber~) main::$32 ← (byte~) main::$30 | (byte~) main::$31
Inferred type updated to byte in (unumber~) main::$33 ← (byte) main::rst#1 * (byte) $10
Inversing boolean not [120] (bool~) gfx_init_chunky::$6 ← (byte*) gfx_init_chunky::gfxb#3 != (word) $8000 from [119] (bool~) gfx_init_chunky::$5 ← (byte*) gfx_init_chunky::gfxb#3 == (word) $8000
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2UnaryNotSimplification
Alias (byte) gfx_init_chunky::gfxbCpuBank#0 = (byte~) gfx_init_chunky::$1 (byte) gfx_init_chunky::gfxbCpuBank#3
Alias (byte) gfx_init_chunky::c#0 = (byte~) gfx_init_chunky::$9
Alias (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#6 (byte) gfx_init_chunky::gfxbCpuBank#5
Alias (word) gfx_init_chunky::x#3 = (word) gfx_init_chunky::x#5 (word) gfx_init_chunky::x#4
Alias (byte) gfx_init_chunky::y#4 = (byte) gfx_init_chunky::y#7 (byte) gfx_init_chunky::y#5
Alias (byte) gfx_init_chunky::y#2 = (byte) gfx_init_chunky::y#3
Alias (byte*) gfx_init_chunky::gfxb#1 = (byte*) gfx_init_chunky::gfxb#6
Alias (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#9
Alias (byte) dtvSetCpuBankSegment1::cpuBankIdx#2 = (byte~) gfx_init_chunky::$3
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2AliasElimination
Alias (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#3
Alias (byte) gfx_init_chunky::y#2 = (byte) gfx_init_chunky::y#4
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2AliasElimination
2019-05-30 20:29:04 +00:00
Identical Phi Values (byte) main::rst#2 (byte) main::rst#0
Identical Phi Values (byte) gfx_init_chunky::y#2 (byte) gfx_init_chunky::y#6
Successful SSA optimization Pass2IdenticalPhiElimination
Simple Condition (bool~) main::$24 [82] if((byte) main::j#1!=rangelast(0,$f)) goto main::@1
2019-05-30 20:29:04 +00:00
Simple Condition (bool~) main::$28 [93] if(*((byte*) RASTER#0)!=(byte) main::rst#0) goto main::@6
Simple Condition (bool~) main::$34 [105] if((byte) main::rst#1!=(byte) $f2) goto main::@12
Simple Condition (bool~) gfx_init_chunky::$6 [121] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3
Simple Condition (bool~) gfx_init_chunky::$10 [130] if((word) gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2
Simple Condition (bool~) gfx_init_chunky::$11 [140] if((byte) gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConditionalJumpSimplification
Constant right-side identified [141] (byte) dtvSetCpuBankSegment1::cpuBankIdx#2 ← (byte)(number) $4000/(number) $4000
2019-05-30 20:29:04 +00:00
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant (const byte*) PROCPORT_DDR#0 = (byte*) 0
Constant (const byte) PROCPORT_DDR_MEMORY_MASK#0 = 7
2019-05-30 20:29:04 +00:00
Constant (const byte*) PROCPORT#0 = (byte*) 1
Constant (const byte) PROCPORT_RAM_IO#0 = $35
2019-05-30 20:29:04 +00:00
Constant (const byte*) RASTER#0 = (byte*) 53266
Constant (const byte*) BORDERCOL#0 = (byte*) 53280
Constant (const byte*) VIC_CONTROL#0 = (byte*) 53265
Constant (const byte) VIC_ECM#0 = $40
Constant (const byte) VIC_DEN#0 = $10
Constant (const byte) VIC_RSEL#0 = 8
2019-05-30 20:29:04 +00:00
Constant (const byte*) VIC_CONTROL2#0 = (byte*) 53270
Constant (const byte) VIC_MCM#0 = $10
Constant (const byte) VIC_CSEL#0 = 8
2019-05-30 20:29:04 +00:00
Constant (const byte*) VIC_MEMORY#0 = (byte*) 53272
Constant (const byte*) CIA2_PORT_A#0 = (byte*) 56576
Constant (const byte*) CIA2_PORT_A_DDR#0 = (byte*) 56578
Constant (const byte*) DTV_FEATURE#0 = (byte*) 53311
Constant (const byte) DTV_FEATURE_ENABLE#0 = 1
2019-05-30 20:29:04 +00:00
Constant (const byte*) DTV_CONTROL#0 = (byte*) 53308
Constant (const byte) DTV_LINEAR#0 = 1
Constant (const byte) DTV_HIGHCOLOR#0 = 4
Constant (const byte) DTV_COLORRAM_OFF#0 = $10
Constant (const byte) DTV_BADLINE_OFF#0 = $20
Constant (const byte) DTV_CHUNKY#0 = $40
2019-05-30 20:29:04 +00:00
Constant (const byte*) DTV_PALETTE#0 = (byte*) 53760
Constant (const byte*) DTV_PLANEB_START_LO#0 = (byte*) 53321
Constant (const byte*) DTV_PLANEB_START_MI#0 = (byte*) 53322
Constant (const byte*) DTV_PLANEB_START_HI#0 = (byte*) 53323
Constant (const byte*) DTV_PLANEB_STEP#0 = (byte*) 53324
Constant (const byte*) DTV_PLANEB_MODULO_LO#0 = (byte*) 53319
Constant (const byte*) DTV_PLANEB_MODULO_HI#0 = (byte*) 53320
Constant (const byte*) dtvSetCpuBankSegment1::cpuBank#0 = (byte*) 255
Constant (const byte*) CHUNKY#0 = (byte*) 32768
Constant (const byte) main::j#0 = 0
Constant (const byte) main::rst#0 = $42
2019-05-30 20:29:04 +00:00
Constant (const byte*) gfx_init_chunky::gfxb#0 = (byte*) 16384
Constant (const byte) gfx_init_chunky::y#0 = 0
Constant (const word) gfx_init_chunky::x#0 = 0
2019-05-30 20:29:04 +00:00
Constant (const byte*) gfx_init_chunky::gfxb#2 = (byte*) 16384
Constant (const byte) dtvSetCpuBankSegment1::cpuBankIdx#2 = (byte)$4000/$4000
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Constant value identified (word)CHUNKY#0 in [62] (word~) main::$11 ← (word)(const byte*) CHUNKY#0
Constant value identified (word)CHUNKY#0 in [67] (word~) main::$15 ← (word)(const byte*) CHUNKY#0
Constant value identified (word)CHUNKY#0 in [71] (word~) main::$19 ← (word)(const byte*) CHUNKY#0
Successful SSA optimization Pass2ConstantValues
if() condition always true - replacing block destination [83] if(true) goto main::@4
Successful SSA optimization Pass2ConstantIfs
Resolved ranged next value [80] main::j#1 ← ++ main::j#2 to ++
Resolved ranged comparison value [82] if(main::j#1!=rangelast(0,$f)) goto main::@1 to (number) $10
Resolved ranged next value [128] gfx_init_chunky::x#1 ← ++ gfx_init_chunky::x#2 to ++
Resolved ranged comparison value [130] if(gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2 to (number) $140
Resolved ranged next value [138] gfx_init_chunky::y#1 ← ++ gfx_init_chunky::y#6 to ++
Resolved ranged comparison value [140] if(gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1 to (number) $33
Removing unused block main::@return
Successful SSA optimization Pass2EliminateUnusedBlocks
Adding number conversion cast (unumber) $10 in if((byte) main::j#1!=(number) $10) goto main::@1
Adding number conversion cast (unumber) $140 in if((word) gfx_init_chunky::x#1!=(number) $140) goto gfx_init_chunky::@2
Adding number conversion cast (unumber) $33 in if((byte) gfx_init_chunky::y#1!=(number) $33) goto gfx_init_chunky::@1
Successful SSA optimization PassNAddNumberTypeConversions
Simplifying constant integer cast $10
Simplifying constant integer cast $140
Simplifying constant integer cast $33
Successful SSA optimization PassNCastSimplification
Finalized unsigned number type (byte) $10
Finalized unsigned number type (word) $140
Finalized unsigned number type (byte) $33
Successful SSA optimization PassNFinalizeNumberTypeConversions
Constant right-side identified [9] (byte~) main::$1 ← (const byte) DTV_HIGHCOLOR#0 | (const byte) DTV_LINEAR#0
Constant right-side identified [14] (byte~) main::$5 ← (const byte) VIC_DEN#0 | (const byte) VIC_ECM#0
Constant right-side identified [18] (byte~) main::$8 ← (const byte) VIC_MCM#0 | (const byte) VIC_CSEL#0
Constant right-side identified [20] (byte~) main::$9 ← < (const byte*) CHUNKY#0
Constant right-side identified [22] (byte~) main::$10 ← > (const byte*) CHUNKY#0
Constant right-side identified [49] (byte~) main::$25 ← (const byte) VIC_DEN#0 | (const byte) VIC_ECM#0
Constant right-side identified [57] (byte~) main::$29 ← (const byte) VIC_DEN#0 | (const byte) VIC_ECM#0
Constant right-side identified [66] (byte*~) gfx_init_chunky::$0 ← (const byte*) CHUNKY#0 / (word) $4000
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant (const byte) main::$1 = DTV_HIGHCOLOR#0|DTV_LINEAR#0
Constant (const byte) main::$5 = VIC_DEN#0|VIC_ECM#0
Constant (const byte) main::$8 = VIC_MCM#0|VIC_CSEL#0
Constant (const byte) main::$9 = <CHUNKY#0
Constant (const byte) main::$10 = >CHUNKY#0
2019-05-30 20:29:04 +00:00
Constant (const word) main::$11 = (word)CHUNKY#0
Constant (const word) main::$15 = (word)CHUNKY#0
Constant (const word) main::$19 = (word)CHUNKY#0
Constant (const byte) main::$25 = VIC_DEN#0|VIC_ECM#0
Constant (const byte) main::$29 = VIC_DEN#0|VIC_ECM#0
Constant (const byte*) gfx_init_chunky::$0 = CHUNKY#0/$4000
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Constant value identified (byte)gfx_init_chunky::$0 in [67] (byte) gfx_init_chunky::gfxbCpuBank#0 ← (byte)(const byte*) gfx_init_chunky::$0
Successful SSA optimization Pass2ConstantValues
Simplifying constant evaluating to zero <(const byte*) CHUNKY#0 in
Successful SSA optimization PassNSimplifyConstantZero
Constant right-side identified [9] (byte~) main::$2 ← (const byte) main::$1 | (const byte) DTV_COLORRAM_OFF#0
Constant right-side identified [13] (byte~) main::$6 ← (const byte) main::$5 | (const byte) VIC_RSEL#0
Constant right-side identified [24] (word~) main::$12 ← (const word) main::$11 / (word) $4000
Constant right-side identified [28] (word~) main::$16 ← (const word) main::$15 & (word) $3fff
Constant right-side identified [31] (word~) main::$20 ← (const word) main::$19 & (word) $3fff
Constant right-side identified [41] (byte~) main::$26 ← (const byte) main::$25 | (const byte) VIC_RSEL#0
Constant right-side identified [48] (byte~) main::$30 ← (const byte) main::$29 | (const byte) VIC_RSEL#0
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant (const byte) main::$2 = main::$1|DTV_COLORRAM_OFF#0
Constant (const byte) main::$6 = main::$5|VIC_RSEL#0
2019-05-30 20:29:04 +00:00
Constant (const word) main::$12 = main::$11/$4000
Constant (const word) main::$16 = main::$15&$3fff
Constant (const word) main::$20 = main::$19&$3fff
Constant (const byte) main::$26 = main::$25|VIC_RSEL#0
Constant (const byte) main::$30 = main::$29|VIC_RSEL#0
2019-05-30 20:29:04 +00:00
Constant (const byte) gfx_init_chunky::gfxbCpuBank#0 = (byte)gfx_init_chunky::$0
Successful SSA optimization Pass2ConstantIdentification
Constant (const byte) dtvSetCpuBankSegment1::cpuBankIdx#0 = gfx_init_chunky::gfxbCpuBank#0
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Constant value identified (byte)main::$12 in [25] (byte~) main::$13 ← (byte)(const word) main::$12
Successful SSA optimization Pass2ConstantValues
Simplifying constant evaluating to zero (const word) main::$15&(word) $3fff in
Simplifying constant evaluating to zero (const word) main::$19&(word) $3fff in
Successful SSA optimization PassNSimplifyConstantZero
Eliminating unused constant (const word) main::$15
Eliminating unused constant (const word) main::$19
Successful SSA optimization PassNEliminateUnusedVars
Constant right-side identified [9] (byte~) main::$3 ← (const byte) main::$2 | (const byte) DTV_CHUNKY#0
Constant right-side identified [12] (byte~) main::$7 ← (const byte) main::$6 | (byte) 3
Constant right-side identified [25] (word~) main::$17 ← (const word) main::$16 / (byte) $40
Constant right-side identified [27] (byte~) main::$21 ← > (const word) main::$20
Constant right-side identified [36] (byte~) main::$27 ← (const byte) main::$26 | (byte) 3
Constant right-side identified [50] (byte) gfx_init_chunky::gfxbCpuBank#1 ← ++ (const byte) gfx_init_chunky::gfxbCpuBank#0
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant (const byte) main::$3 = main::$2|DTV_CHUNKY#0
2019-05-30 20:29:04 +00:00
Constant (const byte) main::$7 = main::$6|3
Constant (const byte) main::$13 = (byte)main::$12
Constant (const word) main::$17 = main::$16/$40
Constant (const byte) main::$21 = >main::$20
2019-05-30 20:29:04 +00:00
Constant (const byte) main::$27 = main::$26|3
Constant (const byte) gfx_init_chunky::gfxbCpuBank#1 = ++gfx_init_chunky::gfxbCpuBank#0
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Constant value identified (byte)main::$17 in [26] (byte~) main::$18 ← (byte)(const word) main::$17
Successful SSA optimization Pass2ConstantValues
Simplifying constant evaluating to zero (const word) main::$16/(byte) $40 in
Simplifying constant evaluating to zero >(const word) main::$20 in
Simplifying constant evaluating to zero (byte)(const word) main::$17 in [26] (byte~) main::$18 ← (byte)(const word) main::$17
Successful SSA optimization PassNSimplifyConstantZero
Eliminating unused constant (const word) main::$16
Eliminating unused constant (const word) main::$20
Eliminating unused constant (const word) main::$17
Successful SSA optimization PassNEliminateUnusedVars
Constant right-side identified [9] (byte~) main::$4 ← (const byte) main::$3 | (const byte) DTV_BADLINE_OFF#0
Constant right-side identified [20] (byte~) main::$14 ← (byte) 3 ^ (const byte) main::$13
Constant right-side identified [23] (byte~) main::$22 ← (const byte) main::$21 / (byte) 4
Successful SSA optimization Pass2ConstantRValueConsolidation
Constant (const byte) main::$4 = main::$3|DTV_BADLINE_OFF#0
2019-05-30 20:29:04 +00:00
Constant (const byte) main::$14 = 3^main::$13
Constant (const byte) main::$18 = 0
Constant (const byte) main::$22 = main::$21/4
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Simplifying constant evaluating to zero (const byte) main::$21/(byte) 4 in
Successful SSA optimization PassNSimplifyConstantZero
Simplifying expression containing zero main::$22 in [24] (byte~) main::$23 ← (const byte) main::$18 | (const byte) main::$22
Successful SSA optimization PassNSimplifyExpressionWithZero
Eliminating unused constant (const byte) main::$21
Eliminating unused constant (const byte) main::$18
Successful SSA optimization PassNEliminateUnusedVars
Constant (const byte) main::$23 = main::$22
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantIdentification
2019-05-30 20:29:04 +00:00
Rewriting multiplication to use shift [34] (byte~) main::$33 ← (byte) main::rst#1 * (byte) $10
Successful SSA optimization Pass2MultiplyToShiftRewriting
Inlining constant with var siblings (const byte) dtvSetCpuBankSegment1::cpuBankIdx#2
Inlining constant with var siblings (const byte) dtvSetCpuBankSegment1::cpuBankIdx#0
Inlining constant with var siblings (const byte) main::j#0
Inlining constant with var siblings (const byte) main::rst#0
Inlining constant with var siblings (const byte*) gfx_init_chunky::gfxb#0
Inlining constant with var siblings (const byte) gfx_init_chunky::y#0
Inlining constant with var siblings (const word) gfx_init_chunky::x#0
Inlining constant with var siblings (const byte*) gfx_init_chunky::gfxb#2
Inlining constant with var siblings (const byte) gfx_init_chunky::gfxbCpuBank#0
Inlining constant with var siblings (const byte) gfx_init_chunky::gfxbCpuBank#1
2019-05-30 20:29:04 +00:00
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#0 = (byte)(const byte*) CHUNKY#0/(word) $4000
Constant inlined main::rst#0 = (byte) $42
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#2 = (byte)(number) $4000/(number) $4000
Constant inlined main::$12 = (word)(const byte*) CHUNKY#0/(word) $4000
Constant inlined main::$13 = (byte)(word)(const byte*) CHUNKY#0/(word) $4000
Constant inlined main::$14 = (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000
Constant inlined gfx_init_chunky::y#0 = (byte) 0
Constant inlined gfx_init_chunky::x#0 = (word) 0
Constant inlined main::$30 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0
Constant inlined main::$10 = >(const byte*) CHUNKY#0
2019-05-30 20:29:04 +00:00
Constant inlined main::$11 = (word)(const byte*) CHUNKY#0
Constant inlined main::j#0 = (byte) 0
Constant inlined main::$23 = (byte) 0
Constant inlined gfx_init_chunky::gfxbCpuBank#1 = ++(byte)(const byte*) CHUNKY#0/(word) $4000
Constant inlined main::$25 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0
Constant inlined main::$26 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0
2019-05-30 20:29:04 +00:00
Constant inlined gfx_init_chunky::gfxb#2 = (byte*) 16384
Constant inlined gfx_init_chunky::gfxb#0 = (byte*) 16384
Constant inlined main::$22 = (byte) 0
Constant inlined gfx_init_chunky::gfxbCpuBank#0 = (byte)(const byte*) CHUNKY#0/(word) $4000
Constant inlined main::$1 = (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0
2019-05-30 20:29:04 +00:00
Constant inlined main::$27 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3
Constant inlined main::$2 = (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0
Constant inlined main::$29 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0
Constant inlined main::$5 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0
Constant inlined main::$6 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0
Constant inlined main::$3 = (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0
Constant inlined main::$4 = (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0
2019-05-30 20:29:04 +00:00
Constant inlined gfx_init_chunky::$0 = (const byte*) CHUNKY#0/(word) $4000
Constant inlined main::$9 = (byte) 0
Constant inlined main::$7 = (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3
Constant inlined main::$8 = (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0
2018-08-22 20:23:42 +00:00
Successful SSA optimization Pass2ConstantInlining
2019-03-31 15:57:54 +00:00
Added new block during phi lifting main::@18(between main::@1 and main::@1)
Added new block during phi lifting gfx_init_chunky::@10(between gfx_init_chunky::@5 and gfx_init_chunky::@1)
Added new block during phi lifting gfx_init_chunky::@11(between gfx_init_chunky::@3 and gfx_init_chunky::@2)
Added new block during phi lifting gfx_init_chunky::@12(between gfx_init_chunky::@2 and gfx_init_chunky::@3)
Adding NOP phi() at start of @begin
2019-05-30 20:29:04 +00:00
Adding NOP phi() at start of @4
Adding NOP phi() at start of @5
Adding NOP phi() at start of @7
2019-05-30 20:29:04 +00:00
Adding NOP phi() at start of @8
Adding NOP phi() at start of @end
2019-05-30 20:29:04 +00:00
Adding NOP phi() at start of main::@3
Adding NOP phi() at start of gfx_init_chunky
2019-05-30 20:29:04 +00:00
Adding NOP phi() at start of gfx_init_chunky::@7
Adding NOP phi() at start of gfx_init_chunky::@6
2019-05-30 20:29:04 +00:00
Adding NOP phi() at start of gfx_init_chunky::@9
CALL GRAPH
2019-05-30 20:29:04 +00:00
Calls in [] to main:4
Calls in [main] to gfx_init_chunky:10
Calls in [gfx_init_chunky] to dtvSetCpuBankSegment1:44 dtvSetCpuBankSegment1:53 dtvSetCpuBankSegment1:66
Created 10 initial phi equivalence classes
2019-05-30 20:29:04 +00:00
Coalesced [42] main::j#3 ← main::j#1
Coalesced [47] gfx_init_chunky::gfxb#8 ← gfx_init_chunky::gfxb#5
Coalesced [48] gfx_init_chunky::gfxbCpuBank#11 ← gfx_init_chunky::gfxbCpuBank#7
Coalesced [52] dtvSetCpuBankSegment1::cpuBankIdx#4 ← dtvSetCpuBankSegment1::cpuBankIdx#1
Coalesced [55] gfx_init_chunky::gfxbCpuBank#14 ← gfx_init_chunky::gfxbCpuBank#2
Coalesced [69] gfx_init_chunky::gfxb#7 ← gfx_init_chunky::gfxb#1
Coalesced [70] gfx_init_chunky::y#8 ← gfx_init_chunky::y#1
Coalesced [71] gfx_init_chunky::gfxbCpuBank#10 ← gfx_init_chunky::gfxbCpuBank#8
Coalesced (already) [72] gfx_init_chunky::gfxb#9 ← gfx_init_chunky::gfxb#1
Coalesced [73] gfx_init_chunky::x#6 ← gfx_init_chunky::x#1
Coalesced (already) [74] gfx_init_chunky::gfxbCpuBank#12 ← gfx_init_chunky::gfxbCpuBank#8
Coalesced [75] gfx_init_chunky::gfxb#10 ← gfx_init_chunky::gfxb#3
Coalesced (already) [76] gfx_init_chunky::gfxbCpuBank#13 ← gfx_init_chunky::gfxbCpuBank#4
Coalesced down to 6 phi equivalence classes
2019-05-30 20:29:04 +00:00
Culled Empty Block (label) @4
Culled Empty Block (label) @5
Culled Empty Block (label) @8
Culled Empty Block (label) main::@3
Culled Empty Block (label) main::@18
2019-05-30 20:29:04 +00:00
Culled Empty Block (label) gfx_init_chunky::@7
Culled Empty Block (label) gfx_init_chunky::@9
Culled Empty Block (label) gfx_init_chunky::@10
Culled Empty Block (label) gfx_init_chunky::@11
Culled Empty Block (label) gfx_init_chunky::@12
Renumbering block @7 to @1
2019-03-31 15:57:54 +00:00
Renumbering block main::@4 to main::@2
Renumbering block main::@6 to main::@3
Renumbering block main::@8 to main::@4
Renumbering block main::@12 to main::@5
Renumbering block main::@17 to main::@6
Renumbering block gfx_init_chunky::@8 to gfx_init_chunky::@7
Adding NOP phi() at start of @begin
Adding NOP phi() at start of @1
Adding NOP phi() at start of @end
Adding NOP phi() at start of gfx_init_chunky
Adding NOP phi() at start of gfx_init_chunky::@6
FINAL CONTROL FLOW GRAPH
@begin: scope:[] from
2018-11-11 20:51:36 +00:00
[0] phi()
to:@1
@1: scope:[] from @begin
2018-11-11 20:51:36 +00:00
[1] phi()
[2] call main
to:@end
@end: scope:[] from @1
2018-11-11 20:51:36 +00:00
[3] phi()
main: scope:[main] from @1
asm { sei }
2018-11-11 20:51:36 +00:00
[5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0
[6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0
[7] call gfx_init_chunky
to:main::@6
main::@6: scope:[main] from main
2018-11-11 20:51:36 +00:00
[8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0
[9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0
2019-05-30 20:29:04 +00:00
[10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3
2018-11-11 20:51:36 +00:00
[11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0
2019-05-30 20:29:04 +00:00
[12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0
2018-11-11 20:51:36 +00:00
[13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0
2019-05-30 20:29:04 +00:00
[14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0
[15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8
[16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0
[17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0
[18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3
[19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000
[20] *((const byte*) VIC_MEMORY#0) ← (byte) 0
2019-03-31 15:57:54 +00:00
to:main::@1
main::@1: scope:[main] from main::@1 main::@6
2019-05-30 20:29:04 +00:00
[21] (byte) main::j#2 ← phi( main::@1/(byte) main::j#1 main::@6/(byte) 0 )
2018-11-11 20:51:36 +00:00
[22] *((const byte*) DTV_PALETTE#0 + (byte) main::j#2) ← (byte) main::j#2
[23] (byte) main::j#1 ← ++ (byte) main::j#2
2019-05-30 20:29:04 +00:00
[24] if((byte) main::j#1!=(byte) $10) goto main::@1
2019-03-31 15:57:54 +00:00
to:main::@2
main::@2: scope:[main] from main::@1 main::@5
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
2019-05-30 20:29:04 +00:00
[26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3
[27] *((const byte*) BORDERCOL#0) ← (byte) 0
to:main::@3
2019-03-31 15:57:54 +00:00
main::@3: scope:[main] from main::@2 main::@3
2019-05-30 20:29:04 +00:00
[28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3
to:main::@4
main::@4: scope:[main] from main::@3
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
to:main::@5
main::@5: scope:[main] from main::@4 main::@5
2018-11-11 20:51:36 +00:00
[30] (byte) main::rst#1 ← *((const byte*) RASTER#0)
2019-05-30 20:29:04 +00:00
[31] (byte~) main::$31 ← (byte) main::rst#1 & (byte) 7
2018-11-11 20:51:36 +00:00
[32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31
[33] *((const byte*) VIC_CONTROL#0) ← (byte~) main::$32
2019-05-30 20:29:04 +00:00
[34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4
2018-11-11 20:51:36 +00:00
[35] *((const byte*) BORDERCOL#0) ← (byte~) main::$33
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
2019-05-30 20:29:04 +00:00
[37] if((byte) main::rst#1!=(byte) $f2) goto main::@5
2019-03-31 15:57:54 +00:00
to:main::@2
gfx_init_chunky: scope:[gfx_init_chunky] from main
2018-11-11 20:51:36 +00:00
[38] phi()
[39] call dtvSetCpuBankSegment1
to:gfx_init_chunky::@1
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky gfx_init_chunky::@5
2019-05-30 20:29:04 +00:00
[40] (byte) gfx_init_chunky::gfxbCpuBank#7 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky/++(byte)(const byte*) CHUNKY#0/(word) $4000 )
[40] (byte) gfx_init_chunky::y#6 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::y#1 gfx_init_chunky/(byte) 0 )
[40] (byte*) gfx_init_chunky::gfxb#5 ← phi( gfx_init_chunky::@5/(byte*) gfx_init_chunky::gfxb#1 gfx_init_chunky/(byte*) 16384 )
to:gfx_init_chunky::@2
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
2018-11-11 20:51:36 +00:00
[41] (byte) gfx_init_chunky::gfxbCpuBank#4 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
[41] (word) gfx_init_chunky::x#2 ← phi( gfx_init_chunky::@1/(word) 0 gfx_init_chunky::@3/(word) gfx_init_chunky::x#1 )
2018-11-11 20:51:36 +00:00
[41] (byte*) gfx_init_chunky::gfxb#3 ← phi( gfx_init_chunky::@1/(byte*) gfx_init_chunky::gfxb#5 gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
2019-05-30 20:29:04 +00:00
[42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3
to:gfx_init_chunky::@4
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
2018-11-11 20:51:36 +00:00
[43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4
[44] call dtvSetCpuBankSegment1
to:gfx_init_chunky::@7
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky::@4
2018-11-11 20:51:36 +00:00
[45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4
to:gfx_init_chunky::@3
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@7
[46] (byte) gfx_init_chunky::gfxbCpuBank#8 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::@7/(byte) gfx_init_chunky::gfxbCpuBank#2 )
2019-05-30 20:29:04 +00:00
[46] (byte*) gfx_init_chunky::gfxb#4 ← phi( gfx_init_chunky::@2/(byte*) gfx_init_chunky::gfxb#3 gfx_init_chunky::@7/(byte*) 16384 )
[47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6
[48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8
2018-11-11 20:51:36 +00:00
[49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0
[50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4
[51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2
2019-05-30 20:29:04 +00:00
[52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2
to:gfx_init_chunky::@5
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
2018-11-11 20:51:36 +00:00
[53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6
2019-05-30 20:29:04 +00:00
[54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1
to:gfx_init_chunky::@6
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
2018-11-11 20:51:36 +00:00
[55] phi()
[56] call dtvSetCpuBankSegment1
to:gfx_init_chunky::@return
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@6
2018-11-11 20:51:36 +00:00
[57] return
to:@return
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
2019-05-30 20:29:04 +00:00
[58] (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 ← phi( gfx_init_chunky/(byte)(const byte*) CHUNKY#0/(word) $4000 gfx_init_chunky::@4/(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 gfx_init_chunky::@6/(byte)(number) $4000/(number) $4000 )
2018-11-11 20:51:36 +00:00
[59] *((const byte*) dtvSetCpuBankSegment1::cpuBank#0) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3
asm { .byte$32,$dd lda$ff .byte$32,$00 }
to:dtvSetCpuBankSegment1::@return
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
2018-11-11 20:51:36 +00:00
[61] return
to:@return
VARIABLE REGISTER WEIGHTS
(byte*) BORDERCOL
(byte*) CHUNKY
(byte*) CIA2_PORT_A
(byte*) CIA2_PORT_A_DDR
(byte) DTV_BADLINE_OFF
(byte) DTV_CHUNKY
(byte) DTV_COLORRAM_OFF
(byte*) DTV_CONTROL
(byte*) DTV_FEATURE
(byte) DTV_FEATURE_ENABLE
(byte) DTV_HIGHCOLOR
(byte) DTV_LINEAR
(byte*) DTV_PALETTE
(byte*) DTV_PLANEB_MODULO_HI
(byte*) DTV_PLANEB_MODULO_LO
(byte*) DTV_PLANEB_START_HI
(byte*) DTV_PLANEB_START_LO
(byte*) DTV_PLANEB_START_MI
(byte*) DTV_PLANEB_STEP
(byte*) PROCPORT
(byte*) PROCPORT_DDR
(byte) PROCPORT_DDR_MEMORY_MASK
(byte) PROCPORT_RAM_IO
(byte*) RASTER
(byte*) VIC_CONTROL
(byte*) VIC_CONTROL2
(byte) VIC_CSEL
(byte) VIC_DEN
(byte) VIC_ECM
(byte) VIC_MCM
(byte*) VIC_MEMORY
(byte) VIC_RSEL
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
(byte*) dtvSetCpuBankSegment1::cpuBank
(byte) dtvSetCpuBankSegment1::cpuBankIdx
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 202.0
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 103.0
(void()) gfx_init_chunky()
(word~) gfx_init_chunky::$8 101.0
(byte) gfx_init_chunky::c
(byte) gfx_init_chunky::c#0 202.0
(byte*) gfx_init_chunky::gfxb
(byte*) gfx_init_chunky::gfxb#1 42.599999999999994
(byte*) gfx_init_chunky::gfxb#3 157.0
(byte*) gfx_init_chunky::gfxb#4 75.75
(byte*) gfx_init_chunky::gfxb#5 22.0
(byte) gfx_init_chunky::gfxbCpuBank
(byte) gfx_init_chunky::gfxbCpuBank#2 202.0
(byte) gfx_init_chunky::gfxbCpuBank#4 103.75
(byte) gfx_init_chunky::gfxbCpuBank#7 22.0
(byte) gfx_init_chunky::gfxbCpuBank#8 34.888888888888886
(word) gfx_init_chunky::x
(word) gfx_init_chunky::x#1 151.5
(word) gfx_init_chunky::x#2 30.299999999999997
(byte) gfx_init_chunky::y
(byte) gfx_init_chunky::y#1 16.5
(byte) gfx_init_chunky::y#6 9.461538461538462
(void()) main()
(byte~) main::$31 202.0
(byte~) main::$32 202.0
(byte~) main::$33 202.0
(byte) main::j
(byte) main::j#1 16.5
(byte) main::j#2 22.0
(byte) main::rst
(byte) main::rst#1 57.714285714285715
Initial phi equivalence classes
[ main::j#2 main::j#1 ]
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
Added variable main::rst#1 to zero page equivalence class [ main::rst#1 ]
Added variable main::$31 to zero page equivalence class [ main::$31 ]
Added variable main::$32 to zero page equivalence class [ main::$32 ]
Added variable main::$33 to zero page equivalence class [ main::$33 ]
Added variable gfx_init_chunky::$8 to zero page equivalence class [ gfx_init_chunky::$8 ]
Added variable gfx_init_chunky::c#0 to zero page equivalence class [ gfx_init_chunky::c#0 ]
Complete equivalence classes
[ main::j#2 main::j#1 ]
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
[ main::rst#1 ]
[ main::$31 ]
[ main::$32 ]
[ main::$33 ]
[ gfx_init_chunky::$8 ]
[ gfx_init_chunky::c#0 ]
Allocated zp ZP_BYTE:2 [ main::j#2 main::j#1 ]
Allocated zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Allocated zp ZP_WORD:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
Allocated zp ZP_BYTE:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
Allocated zp ZP_WORD:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
Allocated zp ZP_BYTE:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
Allocated zp ZP_BYTE:10 [ main::rst#1 ]
Allocated zp ZP_BYTE:11 [ main::$31 ]
Allocated zp ZP_BYTE:12 [ main::$32 ]
Allocated zp ZP_BYTE:13 [ main::$33 ]
Allocated zp ZP_WORD:14 [ gfx_init_chunky::$8 ]
Allocated zp ZP_BYTE:16 [ gfx_init_chunky::c#0 ]
INITIAL ASM
// File Comments
2019-02-17 23:12:29 +00:00
// C64DTV 8bpp charmode stretcher
// Basic Upstart
.pc = $801 "Basic"
:BasicUpstart(bbegin)
.pc = $80d "Program"
// Global Constants & labels
2019-02-17 23:12:29 +00:00
// Processor port data direction register
.label PROCPORT_DDR = 0
2019-02-17 23:12:29 +00:00
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
.const PROCPORT_DDR_MEMORY_MASK = 7
2019-02-17 23:12:29 +00:00
// Processor Port Register controlling RAM/ROM configuration and the datasette
.label PROCPORT = 1
2019-02-17 23:12:29 +00:00
// RAM in $A000, $E000 I/O in $D000
.const PROCPORT_RAM_IO = $35
.label RASTER = $d012
.label BORDERCOL = $d020
.label VIC_CONTROL = $d011
.const VIC_ECM = $40
.const VIC_DEN = $10
.const VIC_RSEL = 8
.label VIC_CONTROL2 = $d016
.const VIC_MCM = $10
.const VIC_CSEL = 8
.label VIC_MEMORY = $d018
2019-02-17 23:12:29 +00:00
// CIA#2 Port A: Serial bus, RS-232, VIC memory bank
.label CIA2_PORT_A = $dd00
2019-02-17 23:12:29 +00:00
// CIA #2 Port A data direction register.
.label CIA2_PORT_A_DDR = $dd02
2019-02-17 23:12:29 +00:00
// Feature enables or disables the extra C64 DTV features
.label DTV_FEATURE = $d03f
.const DTV_FEATURE_ENABLE = 1
2019-02-17 23:12:29 +00:00
// Controls the graphics modes of the C64 DTV
.label DTV_CONTROL = $d03c
.const DTV_LINEAR = 1
.const DTV_HIGHCOLOR = 4
.const DTV_COLORRAM_OFF = $10
.const DTV_BADLINE_OFF = $20
.const DTV_CHUNKY = $40
2019-02-17 23:12:29 +00:00
// Defines colors for the 16 first colors ($00-$0f)
.label DTV_PALETTE = $d200
2019-02-17 23:12:29 +00:00
// Linear Graphics Plane B Counter Control
.label DTV_PLANEB_START_LO = $d049
.label DTV_PLANEB_START_MI = $d04a
.label DTV_PLANEB_START_HI = $d04b
.label DTV_PLANEB_STEP = $d04c
.label DTV_PLANEB_MODULO_LO = $d047
.label DTV_PLANEB_MODULO_HI = $d048
2019-02-17 23:12:29 +00:00
// Plane with all pixels
.label CHUNKY = $8000
// @begin
bbegin:
// [1] phi from @begin to @1 [phi:@begin->@1]
b1_from_bbegin:
jmp b1
// @1
b1:
// [2] call main
jsr main
// [3] phi from @1 to @end [phi:@1->@end]
bend_from_b1:
jmp bend
// @end
bend:
// main
main: {
.label _31 = $b
.label _32 = $c
.label _33 = $d
.label j = 2
.label rst = $a
// asm { sei }
sei
// [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
// Disable kernal & basic
lda #PROCPORT_DDR_MEMORY_MASK
sta PROCPORT_DDR
// [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 -- _deref_pbuc1=vbuc2
lda #PROCPORT_RAM_IO
sta PROCPORT
// [7] call gfx_init_chunky
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
gfx_init_chunky_from_main:
jsr gfx_init_chunky
jmp b6
// main::@6
b6:
// [8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Enable DTV extended modes
lda #DTV_FEATURE_ENABLE
sta DTV_FEATURE
// [9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// [10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// [11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0 -- _deref_pbuc1=vbuc2
lda #VIC_MCM|VIC_CSEL
sta VIC_CONTROL2
// [12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Plane B: CHUNKY
2019-05-30 20:29:04 +00:00
lda #0
sta DTV_PLANEB_START_LO
// [13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0 -- _deref_pbuc1=vbuc2
lda #>CHUNKY
sta DTV_PLANEB_START_MI
// [14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_START_HI
// [15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8 -- _deref_pbuc1=vbuc2
lda #8
sta DTV_PLANEB_STEP
// [16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_MODULO_LO
// [17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_MODULO_HI
// [18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// VIC Graphics Bank
lda #3
sta CIA2_PORT_A_DDR
// [19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank bits to output - all others to input
lda #3^CHUNKY/$4000
sta CIA2_PORT_A
// [20] *((const byte*) VIC_MEMORY#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank
// VIC memory
2019-05-30 20:29:04 +00:00
lda #0
sta VIC_MEMORY
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
2019-03-31 15:57:54 +00:00
b1_from_b6:
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuz1=vbuc1
lda #0
sta j
2019-03-31 15:57:54 +00:00
jmp b1
2019-02-17 23:12:29 +00:00
// DTV Palette - Grey Tones
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
2019-03-31 15:57:54 +00:00
b1_from_b1:
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
2019-03-31 15:57:54 +00:00
jmp b1
// main::@1
2019-03-31 15:57:54 +00:00
b1:
// [22] *((const byte*) DTV_PALETTE#0 + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuz1=vbuz1
ldy j
tya
sta DTV_PALETTE,y
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuz1=_inc_vbuz1
inc j
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuz1_neq_vbuc1_then_la1
lda #$10
cmp j
2019-03-31 15:57:54 +00:00
bne b1_from_b1
jmp b2
// main::@2
2019-03-31 15:57:54 +00:00
b2:
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
2019-02-17 23:12:29 +00:00
// Stabilize Raster
ldx #$ff
rff:
cpx RASTER
bne rff
stabilize:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
cpx RASTER
beq eat+0
eat:
inx
cpx #8
bne stabilize
// [26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// [27] *((const byte*) BORDERCOL#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta BORDERCOL
jmp b3
// main::@3
b3:
// [28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
lda #$42
cmp RASTER
bne b3
jmp b4
// main::@4
b4:
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
jmp b5
// main::@5
b5:
// [30] (byte) main::rst#1 ← *((const byte*) RASTER#0) -- vbuz1=_deref_pbuc1
lda RASTER
sta rst
// [31] (byte~) main::$31 ← (byte) main::rst#1 & (byte) 7 -- vbuz1=vbuz2_band_vbuc1
lda #7
and rst
sta _31
// [32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31 -- vbuz1=vbuc1_bor_vbuz2
lda #VIC_DEN|VIC_ECM|VIC_RSEL
ora _31
sta _32
// [33] *((const byte*) VIC_CONTROL#0) ← (byte~) main::$32 -- _deref_pbuc1=vbuz1
lda _32
sta VIC_CONTROL
// [34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4 -- vbuz1=vbuz2_rol_4
lda rst
asl
asl
asl
asl
sta _33
// [35] *((const byte*) BORDERCOL#0) ← (byte~) main::$33 -- _deref_pbuc1=vbuz1
lda _33
sta BORDERCOL
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuz1_neq_vbuc1_then_la1
lda #$f2
cmp rst
bne b5
2019-03-31 15:57:54 +00:00
jmp b2
}
// gfx_init_chunky
2019-02-17 23:12:29 +00:00
// Initialize Plane with 8bpp chunky
gfx_init_chunky: {
.label _8 = $e
.label c = $10
.label gfxb = 7
.label x = 4
.label gfxbCpuBank = 6
.label y = 3
// [39] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_gfx_init_chunky:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuz1=vbuc1
2019-05-30 20:29:04 +00:00
lda #CHUNKY/$4000
sta dtvSetCpuBankSegment1.cpuBankIdx
jsr dtvSetCpuBankSegment1
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
b1_from_gfx_init_chunky:
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuz1=vbuc1
lda #($ff&CHUNKY/$4000)+1
sta gfxbCpuBank
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
lda #0
sta y
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
jmp b1
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
b1_from_b5:
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
jmp b1
// gfx_init_chunky::@1
b1:
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
b2_from_b1:
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
lda #<0
sta x
lda #>0
sta x+1
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
jmp b2
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
b2_from_b3:
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
jmp b2
// gfx_init_chunky::@2
b2:
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
lda gfxb+1
cmp #>$8000
bne b3_from_b2
lda gfxb
cmp #<$8000
bne b3_from_b2
jmp b4
// gfx_init_chunky::@4
b4:
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuz1=vbuz2
lda gfxbCpuBank
sta dtvSetCpuBankSegment1.cpuBankIdx
// [44] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_b4:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
jsr dtvSetCpuBankSegment1
jmp b7
// gfx_init_chunky::@7
b7:
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuz1=_inc_vbuz1
inc gfxbCpuBank
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
b3_from_b7:
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
jmp b3
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
b3_from_b2:
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
jmp b3
// gfx_init_chunky::@3
b3:
// [47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
lda y
clc
adc x
sta _8
lda #0
adc x+1
sta _8+1
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8 -- vbuz1=_byte_vwuz2
lda _8
sta c
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuz2
lda c
ldy #0
sta (gfxb),y
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
inc gfxb
bne !+
inc gfxb+1
!:
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
inc x
bne !+
inc x+1
!:
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
lda x+1
cmp #>$140
bne b2_from_b3
lda x
cmp #<$140
bne b2_from_b3
jmp b5
// gfx_init_chunky::@5
b5:
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
inc y
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
lda #$33
cmp y
bne b1_from_b5
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
b6_from_b5:
jmp b6
// gfx_init_chunky::@6
b6:
// [56] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_b6:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuz1=vbuc1
lda #$4000/$4000
sta dtvSetCpuBankSegment1.cpuBankIdx
jsr dtvSetCpuBankSegment1
jmp breturn
// gfx_init_chunky::@return
breturn:
// [57] return
rts
}
// dtvSetCpuBankSegment1
2019-02-17 23:12:29 +00:00
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
// The actual memory addressed will be $4000*cpuSegmentIdx
// dtvSetCpuBankSegment1(byte zeropage(9) cpuBankIdx)
dtvSetCpuBankSegment1: {
2019-02-17 23:12:29 +00:00
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
.label cpuBank = $ff
.label cpuBankIdx = 9
// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank#0) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuz1
lda cpuBankIdx
sta cpuBank
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
.byte $32, $dd
lda $ff
.byte $32, $00
jmp breturn
// dtvSetCpuBankSegment1::@return
breturn:
// [61] return
rts
}
// File Data
REGISTER UPLIFT POTENTIAL REGISTERS
Statement [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [20] *((const byte*) VIC_MEMORY#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
2019-05-30 20:29:04 +00:00
Statement [26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [27] *((const byte*) BORDERCOL#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31 [ main::rst#1 main::$32 ] ( main:2 [ main::rst#1 main::$32 ] ) always clobbers reg byte a
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:10 [ main::rst#1 ]
2019-05-30 20:29:04 +00:00
Statement [34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4 [ main::rst#1 main::$33 ] ( main:2 [ main::rst#1 main::$33 ] ) always clobbers reg byte a
Statement [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ) always clobbers reg byte a
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
Statement [47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$8 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$8 ] ) always clobbers reg byte a
Statement [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ) always clobbers reg byte a
Statement [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ) always clobbers reg byte y
Removing always clobbered register reg byte y as potential for zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Removing always clobbered register reg byte y as potential for zp ZP_BYTE:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
2019-05-30 20:29:04 +00:00
Statement [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ) always clobbers reg byte a
Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
Statement [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [20] *((const byte*) VIC_MEMORY#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
2019-05-30 20:29:04 +00:00
Statement [26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [27] *((const byte*) BORDERCOL#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3 [ ] ( main:2 [ ] ) always clobbers reg byte a
Statement [31] (byte~) main::$31 ← (byte) main::rst#1 & (byte) 7 [ main::rst#1 main::$31 ] ( main:2 [ main::rst#1 main::$31 ] ) always clobbers reg byte a
Statement [32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31 [ main::rst#1 main::$32 ] ( main:2 [ main::rst#1 main::$32 ] ) always clobbers reg byte a
2019-05-30 20:29:04 +00:00
Statement [34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4 [ main::rst#1 main::$33 ] ( main:2 [ main::rst#1 main::$33 ] ) always clobbers reg byte a
Statement [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ) always clobbers reg byte a
Statement [47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$8 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$8 ] ) always clobbers reg byte a
Statement [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ) always clobbers reg byte a
Statement [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ) always clobbers reg byte y
2019-05-30 20:29:04 +00:00
Statement [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ) always clobbers reg byte a
Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
Potential registers zp ZP_BYTE:2 [ main::j#2 main::j#1 ] : zp ZP_BYTE:2 , reg byte a , reg byte x , reg byte y ,
Potential registers zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ] : zp ZP_BYTE:3 , reg byte x ,
Potential registers zp ZP_WORD:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] : zp ZP_WORD:4 ,
Potential registers zp ZP_BYTE:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] : zp ZP_BYTE:6 , reg byte x ,
Potential registers zp ZP_WORD:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] : zp ZP_WORD:7 ,
Potential registers zp ZP_BYTE:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ] : zp ZP_BYTE:9 , reg byte a , reg byte x , reg byte y ,
Potential registers zp ZP_BYTE:10 [ main::rst#1 ] : zp ZP_BYTE:10 , reg byte x , reg byte y ,
Potential registers zp ZP_BYTE:11 [ main::$31 ] : zp ZP_BYTE:11 , reg byte a , reg byte x , reg byte y ,
Potential registers zp ZP_BYTE:12 [ main::$32 ] : zp ZP_BYTE:12 , reg byte a , reg byte x , reg byte y ,
Potential registers zp ZP_BYTE:13 [ main::$33 ] : zp ZP_BYTE:13 , reg byte a , reg byte x , reg byte y ,
Potential registers zp ZP_WORD:14 [ gfx_init_chunky::$8 ] : zp ZP_WORD:14 ,
Potential registers zp ZP_BYTE:16 [ gfx_init_chunky::c#0 ] : zp ZP_BYTE:16 , reg byte a , reg byte x , reg byte y ,
REGISTER UPLIFT SCOPES
Uplift Scope [gfx_init_chunky] 362.64: zp ZP_BYTE:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] 297.35: zp ZP_WORD:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] 202: zp ZP_BYTE:16 [ gfx_init_chunky::c#0 ] 181.8: zp ZP_WORD:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] 101: zp ZP_WORD:14 [ gfx_init_chunky::$8 ] 25.96: zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Uplift Scope [main] 202: zp ZP_BYTE:11 [ main::$31 ] 202: zp ZP_BYTE:12 [ main::$32 ] 202: zp ZP_BYTE:13 [ main::$33 ] 57.71: zp ZP_BYTE:10 [ main::rst#1 ] 38.5: zp ZP_BYTE:2 [ main::j#2 main::j#1 ]
Uplift Scope [dtvSetCpuBankSegment1] 305: zp ZP_BYTE:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
Uplift Scope []
Uplifting [gfx_init_chunky] best 25250 combination reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] zp ZP_WORD:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] reg byte a [ gfx_init_chunky::c#0 ] zp ZP_WORD:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] zp ZP_WORD:14 [ gfx_init_chunky::$8 ] zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Uplifting [main] best 22650 combination reg byte a [ main::$31 ] reg byte a [ main::$32 ] reg byte a [ main::$33 ] reg byte x [ main::rst#1 ] zp ZP_BYTE:2 [ main::j#2 main::j#1 ]
Limited combination testing to 100 combinations of 768 possible.
Uplifting [dtvSetCpuBankSegment1] best 22541 combination reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
Uplifting [] best 22541 combination
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::j#2 main::j#1 ]
Uplifting [main] best 22421 combination reg byte x [ main::j#2 main::j#1 ]
Attempting to uplift remaining variables inzp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Uplifting [gfx_init_chunky] best 22421 combination zp ZP_BYTE:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Allocated (was zp ZP_BYTE:3) zp ZP_BYTE:2 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
Allocated (was zp ZP_WORD:4) zp ZP_WORD:3 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
Allocated (was zp ZP_WORD:7) zp ZP_WORD:5 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
Allocated (was zp ZP_WORD:14) zp ZP_WORD:7 [ gfx_init_chunky::$8 ]
ASSEMBLER BEFORE OPTIMIZATION
// File Comments
2019-02-17 23:12:29 +00:00
// C64DTV 8bpp charmode stretcher
// Basic Upstart
.pc = $801 "Basic"
:BasicUpstart(bbegin)
.pc = $80d "Program"
// Global Constants & labels
2019-02-17 23:12:29 +00:00
// Processor port data direction register
.label PROCPORT_DDR = 0
2019-02-17 23:12:29 +00:00
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
.const PROCPORT_DDR_MEMORY_MASK = 7
2019-02-17 23:12:29 +00:00
// Processor Port Register controlling RAM/ROM configuration and the datasette
.label PROCPORT = 1
2019-02-17 23:12:29 +00:00
// RAM in $A000, $E000 I/O in $D000
.const PROCPORT_RAM_IO = $35
.label RASTER = $d012
.label BORDERCOL = $d020
.label VIC_CONTROL = $d011
.const VIC_ECM = $40
.const VIC_DEN = $10
.const VIC_RSEL = 8
.label VIC_CONTROL2 = $d016
.const VIC_MCM = $10
.const VIC_CSEL = 8
.label VIC_MEMORY = $d018
2019-02-17 23:12:29 +00:00
// CIA#2 Port A: Serial bus, RS-232, VIC memory bank
.label CIA2_PORT_A = $dd00
2019-02-17 23:12:29 +00:00
// CIA #2 Port A data direction register.
.label CIA2_PORT_A_DDR = $dd02
2019-02-17 23:12:29 +00:00
// Feature enables or disables the extra C64 DTV features
.label DTV_FEATURE = $d03f
.const DTV_FEATURE_ENABLE = 1
2019-02-17 23:12:29 +00:00
// Controls the graphics modes of the C64 DTV
.label DTV_CONTROL = $d03c
.const DTV_LINEAR = 1
.const DTV_HIGHCOLOR = 4
.const DTV_COLORRAM_OFF = $10
.const DTV_BADLINE_OFF = $20
.const DTV_CHUNKY = $40
2019-02-17 23:12:29 +00:00
// Defines colors for the 16 first colors ($00-$0f)
.label DTV_PALETTE = $d200
2019-02-17 23:12:29 +00:00
// Linear Graphics Plane B Counter Control
.label DTV_PLANEB_START_LO = $d049
.label DTV_PLANEB_START_MI = $d04a
.label DTV_PLANEB_START_HI = $d04b
.label DTV_PLANEB_STEP = $d04c
.label DTV_PLANEB_MODULO_LO = $d047
.label DTV_PLANEB_MODULO_HI = $d048
2019-02-17 23:12:29 +00:00
// Plane with all pixels
.label CHUNKY = $8000
// @begin
bbegin:
// [1] phi from @begin to @1 [phi:@begin->@1]
b1_from_bbegin:
jmp b1
// @1
b1:
// [2] call main
jsr main
// [3] phi from @1 to @end [phi:@1->@end]
bend_from_b1:
jmp bend
// @end
bend:
// main
main: {
// asm { sei }
sei
// [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
// Disable kernal & basic
lda #PROCPORT_DDR_MEMORY_MASK
sta PROCPORT_DDR
// [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 -- _deref_pbuc1=vbuc2
lda #PROCPORT_RAM_IO
sta PROCPORT
// [7] call gfx_init_chunky
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
gfx_init_chunky_from_main:
jsr gfx_init_chunky
jmp b6
// main::@6
b6:
// [8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Enable DTV extended modes
lda #DTV_FEATURE_ENABLE
sta DTV_FEATURE
// [9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// [10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// [11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0 -- _deref_pbuc1=vbuc2
lda #VIC_MCM|VIC_CSEL
sta VIC_CONTROL2
// [12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Plane B: CHUNKY
2019-05-30 20:29:04 +00:00
lda #0
sta DTV_PLANEB_START_LO
// [13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0 -- _deref_pbuc1=vbuc2
lda #>CHUNKY
sta DTV_PLANEB_START_MI
// [14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_START_HI
// [15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8 -- _deref_pbuc1=vbuc2
lda #8
sta DTV_PLANEB_STEP
// [16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_MODULO_LO
// [17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_MODULO_HI
// [18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// VIC Graphics Bank
lda #3
sta CIA2_PORT_A_DDR
// [19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank bits to output - all others to input
lda #3^CHUNKY/$4000
sta CIA2_PORT_A
// [20] *((const byte*) VIC_MEMORY#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank
// VIC memory
2019-05-30 20:29:04 +00:00
lda #0
sta VIC_MEMORY
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
2019-03-31 15:57:54 +00:00
b1_from_b6:
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
ldx #0
2019-03-31 15:57:54 +00:00
jmp b1
2019-02-17 23:12:29 +00:00
// DTV Palette - Grey Tones
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
2019-03-31 15:57:54 +00:00
b1_from_b1:
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
2019-03-31 15:57:54 +00:00
jmp b1
// main::@1
2019-03-31 15:57:54 +00:00
b1:
// [22] *((const byte*) DTV_PALETTE#0 + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
txa
sta DTV_PALETTE,x
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuxx=_inc_vbuxx
inx
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
cpx #$10
2019-03-31 15:57:54 +00:00
bne b1_from_b1
jmp b2
// main::@2
2019-03-31 15:57:54 +00:00
b2:
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
2019-02-17 23:12:29 +00:00
// Stabilize Raster
ldx #$ff
rff:
cpx RASTER
bne rff
stabilize:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
cpx RASTER
beq eat+0
eat:
inx
cpx #8
bne stabilize
// [26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// [27] *((const byte*) BORDERCOL#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta BORDERCOL
jmp b3
// main::@3
b3:
// [28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
lda #$42
cmp RASTER
bne b3
jmp b4
// main::@4
b4:
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
jmp b5
// main::@5
b5:
// [30] (byte) main::rst#1 ← *((const byte*) RASTER#0) -- vbuxx=_deref_pbuc1
ldx RASTER
// [31] (byte~) main::$31 ← (byte) main::rst#1 & (byte) 7 -- vbuaa=vbuxx_band_vbuc1
txa
and #7
// [32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31 -- vbuaa=vbuc1_bor_vbuaa
ora #VIC_DEN|VIC_ECM|VIC_RSEL
// [33] *((const byte*) VIC_CONTROL#0) ← (byte~) main::$32 -- _deref_pbuc1=vbuaa
sta VIC_CONTROL
// [34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4 -- vbuaa=vbuxx_rol_4
txa
asl
asl
asl
asl
// [35] *((const byte*) BORDERCOL#0) ← (byte~) main::$33 -- _deref_pbuc1=vbuaa
sta BORDERCOL
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
cpx #$f2
bne b5
2019-03-31 15:57:54 +00:00
jmp b2
}
// gfx_init_chunky
2019-02-17 23:12:29 +00:00
// Initialize Plane with 8bpp chunky
gfx_init_chunky: {
.label _8 = 7
.label gfxb = 5
.label x = 3
.label y = 2
// [39] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_gfx_init_chunky:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
2019-05-30 20:29:04 +00:00
lda #CHUNKY/$4000
jsr dtvSetCpuBankSegment1
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
b1_from_gfx_init_chunky:
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
ldx #($ff&CHUNKY/$4000)+1
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
lda #0
sta y
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
jmp b1
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
b1_from_b5:
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
jmp b1
// gfx_init_chunky::@1
b1:
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
b2_from_b1:
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
lda #<0
sta x
lda #>0
sta x+1
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
jmp b2
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
b2_from_b3:
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
jmp b2
// gfx_init_chunky::@2
b2:
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
lda gfxb+1
cmp #>$8000
bne b3_from_b2
lda gfxb
cmp #<$8000
bne b3_from_b2
jmp b4
// gfx_init_chunky::@4
b4:
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
txa
// [44] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_b4:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
jsr dtvSetCpuBankSegment1
jmp b7
// gfx_init_chunky::@7
b7:
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
inx
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
b3_from_b7:
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
jmp b3
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
b3_from_b2:
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
jmp b3
// gfx_init_chunky::@3
b3:
// [47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
lda y
clc
adc x
sta _8
lda #0
adc x+1
sta _8+1
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8 -- vbuaa=_byte_vwuz1
lda _8
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
ldy #0
sta (gfxb),y
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
inc gfxb
bne !+
inc gfxb+1
!:
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
inc x
bne !+
inc x+1
!:
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
lda x+1
cmp #>$140
bne b2_from_b3
lda x
cmp #<$140
bne b2_from_b3
jmp b5
// gfx_init_chunky::@5
b5:
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
inc y
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
lda #$33
cmp y
bne b1_from_b5
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
b6_from_b5:
jmp b6
// gfx_init_chunky::@6
b6:
// [56] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
dtvSetCpuBankSegment1_from_b6:
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
lda #$4000/$4000
jsr dtvSetCpuBankSegment1
jmp breturn
// gfx_init_chunky::@return
breturn:
// [57] return
rts
}
// dtvSetCpuBankSegment1
2019-02-17 23:12:29 +00:00
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
// The actual memory addressed will be $4000*cpuSegmentIdx
// dtvSetCpuBankSegment1(byte register(A) cpuBankIdx)
dtvSetCpuBankSegment1: {
2019-02-17 23:12:29 +00:00
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
.label cpuBank = $ff
// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank#0) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
sta cpuBank
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
.byte $32, $dd
lda $ff
.byte $32, $00
jmp breturn
// dtvSetCpuBankSegment1::@return
breturn:
// [61] return
rts
}
// File Data
ASSEMBLER OPTIMIZATIONS
Removing instruction jmp b1
Removing instruction jmp bend
Removing instruction jmp b6
Removing instruction jmp b1
2019-03-31 15:57:54 +00:00
Removing instruction jmp b2
Removing instruction jmp b3
Removing instruction jmp b4
Removing instruction jmp b5
Removing instruction jmp b1
Removing instruction jmp b2
Removing instruction jmp b4
Removing instruction jmp b7
Removing instruction jmp b3
Removing instruction jmp b5
Removing instruction jmp b6
Removing instruction jmp breturn
Removing instruction jmp breturn
Succesful ASM optimization Pass5NextJumpElimination
Removing instruction lda #0
Removing instruction lda #>0
Succesful ASM optimization Pass5UnnecesaryLoadElimination
2019-03-31 15:57:54 +00:00
Replacing label b1_from_b1 with b1
Replacing label b3_from_b2 with b3
Replacing label b3_from_b2 with b3
Replacing label b2_from_b3 with b2
Replacing label b2_from_b3 with b2
Replacing label b1_from_b5 with b1
Removing instruction b1_from_bbegin:
Removing instruction b1:
Removing instruction bend_from_b1:
2019-03-31 15:57:54 +00:00
Removing instruction b1_from_b1:
Removing instruction b1_from_b5:
Removing instruction b2_from_b1:
Removing instruction b2_from_b3:
Removing instruction b3_from_b2:
Removing instruction b6_from_b5:
Removing instruction dtvSetCpuBankSegment1_from_b6:
Succesful ASM optimization Pass5RedundantLabelElimination
Removing instruction bend:
Removing instruction gfx_init_chunky_from_main:
Removing instruction b6:
2019-03-31 15:57:54 +00:00
Removing instruction b1_from_b6:
Removing instruction b4:
Removing instruction dtvSetCpuBankSegment1_from_gfx_init_chunky:
Removing instruction b1_from_gfx_init_chunky:
Removing instruction b4:
Removing instruction dtvSetCpuBankSegment1_from_b4:
Removing instruction b7:
Removing instruction b3_from_b7:
Removing instruction b5:
Removing instruction b6:
Removing instruction breturn:
Removing instruction breturn:
Succesful ASM optimization Pass5UnusedLabelElimination
Updating BasicUpstart to call main directly
Removing instruction jsr main
Succesful ASM optimization Pass5SkipBegin
2019-03-31 15:57:54 +00:00
Removing instruction jmp b1
Removing instruction jmp b1
Removing instruction jmp b2
Removing instruction jmp b3
Succesful ASM optimization Pass5NextJumpElimination
2019-05-30 20:29:04 +00:00
Replacing instruction ldx #0 with TAX
Removing instruction bbegin:
Succesful ASM optimization Pass5UnusedLabelElimination
FINAL SYMBOL TABLE
(label) @1
(label) @begin
(label) @end
(byte*) BORDERCOL
2019-05-30 20:29:04 +00:00
(const byte*) BORDERCOL#0 BORDERCOL = (byte*) 53280
(byte*) CHUNKY
2019-05-30 20:29:04 +00:00
(const byte*) CHUNKY#0 CHUNKY = (byte*) 32768
(byte*) CIA2_PORT_A
2019-05-30 20:29:04 +00:00
(const byte*) CIA2_PORT_A#0 CIA2_PORT_A = (byte*) 56576
(byte*) CIA2_PORT_A_DDR
2019-05-30 20:29:04 +00:00
(const byte*) CIA2_PORT_A_DDR#0 CIA2_PORT_A_DDR = (byte*) 56578
(byte) DTV_BADLINE_OFF
2019-05-30 20:29:04 +00:00
(const byte) DTV_BADLINE_OFF#0 DTV_BADLINE_OFF = (byte) $20
(byte) DTV_CHUNKY
2019-05-30 20:29:04 +00:00
(const byte) DTV_CHUNKY#0 DTV_CHUNKY = (byte) $40
(byte) DTV_COLORRAM_OFF
2019-05-30 20:29:04 +00:00
(const byte) DTV_COLORRAM_OFF#0 DTV_COLORRAM_OFF = (byte) $10
(byte*) DTV_CONTROL
2019-05-30 20:29:04 +00:00
(const byte*) DTV_CONTROL#0 DTV_CONTROL = (byte*) 53308
(byte*) DTV_FEATURE
2019-05-30 20:29:04 +00:00
(const byte*) DTV_FEATURE#0 DTV_FEATURE = (byte*) 53311
(byte) DTV_FEATURE_ENABLE
2019-05-30 20:29:04 +00:00
(const byte) DTV_FEATURE_ENABLE#0 DTV_FEATURE_ENABLE = (byte) 1
(byte) DTV_HIGHCOLOR
2019-05-30 20:29:04 +00:00
(const byte) DTV_HIGHCOLOR#0 DTV_HIGHCOLOR = (byte) 4
(byte) DTV_LINEAR
2019-05-30 20:29:04 +00:00
(const byte) DTV_LINEAR#0 DTV_LINEAR = (byte) 1
(byte*) DTV_PALETTE
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PALETTE#0 DTV_PALETTE = (byte*) 53760
(byte*) DTV_PLANEB_MODULO_HI
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_MODULO_HI#0 DTV_PLANEB_MODULO_HI = (byte*) 53320
(byte*) DTV_PLANEB_MODULO_LO
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_MODULO_LO#0 DTV_PLANEB_MODULO_LO = (byte*) 53319
(byte*) DTV_PLANEB_START_HI
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_START_HI#0 DTV_PLANEB_START_HI = (byte*) 53323
(byte*) DTV_PLANEB_START_LO
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_START_LO#0 DTV_PLANEB_START_LO = (byte*) 53321
(byte*) DTV_PLANEB_START_MI
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_START_MI#0 DTV_PLANEB_START_MI = (byte*) 53322
(byte*) DTV_PLANEB_STEP
2019-05-30 20:29:04 +00:00
(const byte*) DTV_PLANEB_STEP#0 DTV_PLANEB_STEP = (byte*) 53324
(byte*) PROCPORT
2019-05-30 20:29:04 +00:00
(const byte*) PROCPORT#0 PROCPORT = (byte*) 1
(byte*) PROCPORT_DDR
2019-05-30 20:29:04 +00:00
(const byte*) PROCPORT_DDR#0 PROCPORT_DDR = (byte*) 0
(byte) PROCPORT_DDR_MEMORY_MASK
2019-05-30 20:29:04 +00:00
(const byte) PROCPORT_DDR_MEMORY_MASK#0 PROCPORT_DDR_MEMORY_MASK = (byte) 7
(byte) PROCPORT_RAM_IO
2019-05-30 20:29:04 +00:00
(const byte) PROCPORT_RAM_IO#0 PROCPORT_RAM_IO = (byte) $35
(byte*) RASTER
2019-05-30 20:29:04 +00:00
(const byte*) RASTER#0 RASTER = (byte*) 53266
(byte*) VIC_CONTROL
2019-05-30 20:29:04 +00:00
(const byte*) VIC_CONTROL#0 VIC_CONTROL = (byte*) 53265
(byte*) VIC_CONTROL2
2019-05-30 20:29:04 +00:00
(const byte*) VIC_CONTROL2#0 VIC_CONTROL2 = (byte*) 53270
(byte) VIC_CSEL
2019-05-30 20:29:04 +00:00
(const byte) VIC_CSEL#0 VIC_CSEL = (byte) 8
(byte) VIC_DEN
2019-05-30 20:29:04 +00:00
(const byte) VIC_DEN#0 VIC_DEN = (byte) $10
(byte) VIC_ECM
2019-05-30 20:29:04 +00:00
(const byte) VIC_ECM#0 VIC_ECM = (byte) $40
(byte) VIC_MCM
2019-05-30 20:29:04 +00:00
(const byte) VIC_MCM#0 VIC_MCM = (byte) $10
(byte*) VIC_MEMORY
2019-05-30 20:29:04 +00:00
(const byte*) VIC_MEMORY#0 VIC_MEMORY = (byte*) 53272
(byte) VIC_RSEL
2019-05-30 20:29:04 +00:00
(const byte) VIC_RSEL#0 VIC_RSEL = (byte) 8
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
(label) dtvSetCpuBankSegment1::@return
(byte*) dtvSetCpuBankSegment1::cpuBank
2019-05-30 20:29:04 +00:00
(const byte*) dtvSetCpuBankSegment1::cpuBank#0 cpuBank = (byte*) 255
(byte) dtvSetCpuBankSegment1::cpuBankIdx
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 reg byte a 202.0
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 reg byte a 103.0
(void()) gfx_init_chunky()
(word~) gfx_init_chunky::$8 $8 zp ZP_WORD:7 101.0
(label) gfx_init_chunky::@1
(label) gfx_init_chunky::@2
(label) gfx_init_chunky::@3
(label) gfx_init_chunky::@4
(label) gfx_init_chunky::@5
(label) gfx_init_chunky::@6
(label) gfx_init_chunky::@7
(label) gfx_init_chunky::@return
(byte) gfx_init_chunky::c
(byte) gfx_init_chunky::c#0 reg byte a 202.0
(byte*) gfx_init_chunky::gfxb
(byte*) gfx_init_chunky::gfxb#1 gfxb zp ZP_WORD:5 42.599999999999994
(byte*) gfx_init_chunky::gfxb#3 gfxb zp ZP_WORD:5 157.0
(byte*) gfx_init_chunky::gfxb#4 gfxb zp ZP_WORD:5 75.75
(byte*) gfx_init_chunky::gfxb#5 gfxb zp ZP_WORD:5 22.0
(byte) gfx_init_chunky::gfxbCpuBank
(byte) gfx_init_chunky::gfxbCpuBank#2 reg byte x 202.0
(byte) gfx_init_chunky::gfxbCpuBank#4 reg byte x 103.75
(byte) gfx_init_chunky::gfxbCpuBank#7 reg byte x 22.0
(byte) gfx_init_chunky::gfxbCpuBank#8 reg byte x 34.888888888888886
(word) gfx_init_chunky::x
(word) gfx_init_chunky::x#1 x zp ZP_WORD:3 151.5
(word) gfx_init_chunky::x#2 x zp ZP_WORD:3 30.299999999999997
(byte) gfx_init_chunky::y
(byte) gfx_init_chunky::y#1 y zp ZP_BYTE:2 16.5
(byte) gfx_init_chunky::y#6 y zp ZP_BYTE:2 9.461538461538462
(void()) main()
(byte~) main::$31 reg byte a 202.0
(byte~) main::$32 reg byte a 202.0
(byte~) main::$33 reg byte a 202.0
(label) main::@1
(label) main::@2
(label) main::@3
(label) main::@4
(label) main::@5
(label) main::@6
(byte) main::j
(byte) main::j#1 reg byte x 16.5
(byte) main::j#2 reg byte x 22.0
(byte) main::rst
(byte) main::rst#1 reg byte x 57.714285714285715
reg byte x [ main::j#2 main::j#1 ]
zp ZP_BYTE:2 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
zp ZP_WORD:3 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
zp ZP_WORD:5 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
reg byte x [ main::rst#1 ]
reg byte a [ main::$31 ]
reg byte a [ main::$32 ]
reg byte a [ main::$33 ]
zp ZP_WORD:7 [ gfx_init_chunky::$8 ]
reg byte a [ gfx_init_chunky::c#0 ]
FINAL ASSEMBLER
Score: 19882
// File Comments
2019-02-17 23:12:29 +00:00
// C64DTV 8bpp charmode stretcher
// Basic Upstart
.pc = $801 "Basic"
:BasicUpstart(main)
.pc = $80d "Program"
// Global Constants & labels
2019-02-17 23:12:29 +00:00
// Processor port data direction register
.label PROCPORT_DDR = 0
2019-02-17 23:12:29 +00:00
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
.const PROCPORT_DDR_MEMORY_MASK = 7
2019-02-17 23:12:29 +00:00
// Processor Port Register controlling RAM/ROM configuration and the datasette
.label PROCPORT = 1
2019-02-17 23:12:29 +00:00
// RAM in $A000, $E000 I/O in $D000
.const PROCPORT_RAM_IO = $35
.label RASTER = $d012
.label BORDERCOL = $d020
.label VIC_CONTROL = $d011
.const VIC_ECM = $40
.const VIC_DEN = $10
.const VIC_RSEL = 8
.label VIC_CONTROL2 = $d016
.const VIC_MCM = $10
.const VIC_CSEL = 8
.label VIC_MEMORY = $d018
2019-02-17 23:12:29 +00:00
// CIA#2 Port A: Serial bus, RS-232, VIC memory bank
.label CIA2_PORT_A = $dd00
2019-02-17 23:12:29 +00:00
// CIA #2 Port A data direction register.
.label CIA2_PORT_A_DDR = $dd02
2019-02-17 23:12:29 +00:00
// Feature enables or disables the extra C64 DTV features
.label DTV_FEATURE = $d03f
.const DTV_FEATURE_ENABLE = 1
2019-02-17 23:12:29 +00:00
// Controls the graphics modes of the C64 DTV
.label DTV_CONTROL = $d03c
.const DTV_LINEAR = 1
.const DTV_HIGHCOLOR = 4
.const DTV_COLORRAM_OFF = $10
.const DTV_BADLINE_OFF = $20
.const DTV_CHUNKY = $40
2019-02-17 23:12:29 +00:00
// Defines colors for the 16 first colors ($00-$0f)
.label DTV_PALETTE = $d200
2019-02-17 23:12:29 +00:00
// Linear Graphics Plane B Counter Control
.label DTV_PLANEB_START_LO = $d049
.label DTV_PLANEB_START_MI = $d04a
.label DTV_PLANEB_START_HI = $d04b
.label DTV_PLANEB_STEP = $d04c
.label DTV_PLANEB_MODULO_LO = $d047
.label DTV_PLANEB_MODULO_HI = $d048
2019-02-17 23:12:29 +00:00
// Plane with all pixels
.label CHUNKY = $8000
// @begin
// [1] phi from @begin to @1 [phi:@begin->@1]
// @1
// [2] call main
// [3] phi from @1 to @end [phi:@1->@end]
// @end
// main
main: {
// asm
// asm { sei }
sei
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
// [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
// Disable kernal & basic
lda #PROCPORT_DDR_MEMORY_MASK
sta PROCPORT_DDR
// *PROCPORT = PROCPORT_RAM_IO
// [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 -- _deref_pbuc1=vbuc2
lda #PROCPORT_RAM_IO
sta PROCPORT
// gfx_init_chunky()
// [7] call gfx_init_chunky
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
jsr gfx_init_chunky
// main::@6
// *DTV_FEATURE = DTV_FEATURE_ENABLE
// [8] *((const byte*) DTV_FEATURE#0) ← (const byte) DTV_FEATURE_ENABLE#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Enable DTV extended modes
lda #DTV_FEATURE_ENABLE
sta DTV_FEATURE
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_COLORRAM_OFF | DTV_CHUNKY | DTV_BADLINE_OFF
// [9] *((const byte*) DTV_CONTROL#0) ← (const byte) DTV_HIGHCOLOR#0|(const byte) DTV_LINEAR#0|(const byte) DTV_COLORRAM_OFF#0|(const byte) DTV_CHUNKY#0|(const byte) DTV_BADLINE_OFF#0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3
// [10] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// *VIC_CONTROL2 = VIC_MCM | VIC_CSEL
// [11] *((const byte*) VIC_CONTROL2#0) ← (const byte) VIC_MCM#0|(const byte) VIC_CSEL#0 -- _deref_pbuc1=vbuc2
lda #VIC_MCM|VIC_CSEL
sta VIC_CONTROL2
// *DTV_PLANEB_START_LO = < CHUNKY
// [12] *((const byte*) DTV_PLANEB_START_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Plane B: CHUNKY
2019-05-30 20:29:04 +00:00
lda #0
sta DTV_PLANEB_START_LO
// *DTV_PLANEB_START_MI = > CHUNKY
// [13] *((const byte*) DTV_PLANEB_START_MI#0) ← >(const byte*) CHUNKY#0 -- _deref_pbuc1=vbuc2
lda #>CHUNKY
sta DTV_PLANEB_START_MI
// *DTV_PLANEB_START_HI = 0
// [14] *((const byte*) DTV_PLANEB_START_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_START_HI
// *DTV_PLANEB_STEP = 8
// [15] *((const byte*) DTV_PLANEB_STEP#0) ← (byte) 8 -- _deref_pbuc1=vbuc2
lda #8
sta DTV_PLANEB_STEP
// *DTV_PLANEB_MODULO_LO = 0
// [16] *((const byte*) DTV_PLANEB_MODULO_LO#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta DTV_PLANEB_MODULO_LO
// *DTV_PLANEB_MODULO_HI = 0
// [17] *((const byte*) DTV_PLANEB_MODULO_HI#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
sta DTV_PLANEB_MODULO_HI
// *CIA2_PORT_A_DDR = %00000011
// [18] *((const byte*) CIA2_PORT_A_DDR#0) ← (byte) 3 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// VIC Graphics Bank
lda #3
sta CIA2_PORT_A_DDR
// *CIA2_PORT_A = %00000011 ^ (byte)((word)CHUNKY/$4000)
// [19] *((const byte*) CIA2_PORT_A#0) ← (byte) 3^(byte)(word)(const byte*) CHUNKY#0/(word) $4000 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank bits to output - all others to input
lda #3^CHUNKY/$4000
sta CIA2_PORT_A
// *VIC_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4)
// [20] *((const byte*) VIC_MEMORY#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
2019-02-17 23:12:29 +00:00
// Set VIC Bank
// VIC memory
2019-05-30 20:29:04 +00:00
lda #0
sta VIC_MEMORY
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
2019-05-30 20:29:04 +00:00
tax
2019-02-17 23:12:29 +00:00
// DTV Palette - Grey Tones
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
// main::@1
2019-03-31 15:57:54 +00:00
b1:
// DTV_PALETTE[j] = j
// [22] *((const byte*) DTV_PALETTE#0 + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
txa
sta DTV_PALETTE,x
// for(byte j : 0..$f)
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuxx=_inc_vbuxx
inx
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
cpx #$10
2019-03-31 15:57:54 +00:00
bne b1
// main::@2
2019-03-31 15:57:54 +00:00
b2:
// asm
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
2019-02-17 23:12:29 +00:00
// Stabilize Raster
ldx #$ff
rff:
cpx RASTER
bne rff
stabilize:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
cpx RASTER
beq eat+0
eat:
inx
cpx #8
bne stabilize
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3
// [26] *((const byte*) VIC_CONTROL#0) ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0|(byte) 3 -- _deref_pbuc1=vbuc2
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
sta VIC_CONTROL
// *BORDERCOL = 0
// [27] *((const byte*) BORDERCOL#0) ← (byte) 0 -- _deref_pbuc1=vbuc2
lda #0
sta BORDERCOL
// main::@3
b3:
// while(*RASTER!=rst)
// [28] if(*((const byte*) RASTER#0)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
lda #$42
cmp RASTER
bne b3
// main::@4
// asm
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
// main::@5
b5:
// rst = *RASTER
// [30] (byte) main::rst#1 ← *((const byte*) RASTER#0) -- vbuxx=_deref_pbuc1
ldx RASTER
// rst&7
// [31] (byte~) main::$31 ← (byte) main::rst#1 & (byte) 7 -- vbuaa=vbuxx_band_vbuc1
txa
and #7
// VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7)
// [32] (byte~) main::$32 ← (const byte) VIC_DEN#0|(const byte) VIC_ECM#0|(const byte) VIC_RSEL#0 | (byte~) main::$31 -- vbuaa=vbuc1_bor_vbuaa
ora #VIC_DEN|VIC_ECM|VIC_RSEL
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7)
// [33] *((const byte*) VIC_CONTROL#0) ← (byte~) main::$32 -- _deref_pbuc1=vbuaa
sta VIC_CONTROL
// rst*$10
// [34] (byte~) main::$33 ← (byte) main::rst#1 << (byte) 4 -- vbuaa=vbuxx_rol_4
txa
asl
asl
asl
asl
// *BORDERCOL = rst*$10
// [35] *((const byte*) BORDERCOL#0) ← (byte~) main::$33 -- _deref_pbuc1=vbuaa
sta BORDERCOL
// asm
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
// while (rst!=$f2)
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
cpx #$f2
bne b5
2019-03-31 15:57:54 +00:00
jmp b2
}
// gfx_init_chunky
2019-02-17 23:12:29 +00:00
// Initialize Plane with 8bpp chunky
gfx_init_chunky: {
.label _8 = 7
.label gfxb = 5
.label x = 3
.label y = 2
// dtvSetCpuBankSegment1(gfxbCpuBank++)
// [39] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
2019-05-30 20:29:04 +00:00
lda #CHUNKY/$4000
jsr dtvSetCpuBankSegment1
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const byte*) CHUNKY#0/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
ldx #($ff&CHUNKY/$4000)+1
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
lda #0
sta y
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
// gfx_init_chunky::@1
b1:
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
lda #<0
sta x
sta x+1
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
// gfx_init_chunky::@2
b2:
// if(gfxb==$8000)
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
lda gfxb+1
cmp #>$8000
bne b3
lda gfxb
cmp #<$8000
bne b3
// gfx_init_chunky::@4
// dtvSetCpuBankSegment1(gfxbCpuBank++)
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
txa
// [44] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
jsr dtvSetCpuBankSegment1
// gfx_init_chunky::@7
// dtvSetCpuBankSegment1(gfxbCpuBank++);
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
inx
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
lda #<$4000
sta gfxb
lda #>$4000
sta gfxb+1
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
// gfx_init_chunky::@3
b3:
// x+y
// [47] (word~) gfx_init_chunky::$8 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
lda y
clc
adc x
sta _8
lda #0
adc x+1
sta _8+1
// c = (byte)(x+y)
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$8 -- vbuaa=_byte_vwuz1
lda _8
// *gfxb++ = c
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
ldy #0
sta (gfxb),y
// *gfxb++ = c;
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
inc gfxb
bne !+
inc gfxb+1
!:
// for (word x : 0..319)
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
inc x
bne !+
inc x+1
!:
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
lda x+1
cmp #>$140
bne b2
lda x
cmp #<$140
bne b2
// gfx_init_chunky::@5
// for(byte y : 0..50)
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
inc y
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
lda #$33
cmp y
bne b1
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
// gfx_init_chunky::@6
// dtvSetCpuBankSegment1((byte)($4000/$4000))
// [56] call dtvSetCpuBankSegment1
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
lda #$4000/$4000
jsr dtvSetCpuBankSegment1
// gfx_init_chunky::@return
// }
// [57] return
rts
}
// dtvSetCpuBankSegment1
2019-02-17 23:12:29 +00:00
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
// The actual memory addressed will be $4000*cpuSegmentIdx
// dtvSetCpuBankSegment1(byte register(A) cpuBankIdx)
dtvSetCpuBankSegment1: {
2019-02-17 23:12:29 +00:00
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
.label cpuBank = $ff
// *cpuBank = cpuBankIdx
// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank#0) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
sta cpuBank
// asm
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
.byte $32, $dd
lda $ff
.byte $32, $00
// dtvSetCpuBankSegment1::@return
// }
// [61] return
rts
}
// File Data