2019-06-12 23:15:34 +00:00
|
|
|
Inlined call (byte~) vicSelectGfxBank::$0 ← call toDd00 (byte*) vicSelectGfxBank::gfx
|
2018-04-15 21:32:49 +00:00
|
|
|
|
2018-08-22 22:24:32 +00:00
|
|
|
CONTROL FLOW GRAPH SSA
|
2018-04-15 21:32:49 +00:00
|
|
|
@begin: scope:[] from
|
2020-04-25 18:10:49 +00:00
|
|
|
to:@1
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 ← phi( gfx_init_chunky/(byte) dtvSetCpuBankSegment1::cpuBankIdx#0 gfx_init_chunky::@4/(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 gfx_init_chunky::@6/(byte) dtvSetCpuBankSegment1::cpuBankIdx#2 )
|
2019-11-03 16:05:55 +00:00
|
|
|
*((const byte*) dtvSetCpuBankSegment1::cpuBank) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
|
|
to:dtvSetCpuBankSegment1::@return
|
|
|
|
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
|
|
|
|
return
|
|
|
|
to:@return
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) main()
|
2020-04-25 18:10:49 +00:00
|
|
|
main: scope:[main] from @1
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { sei }
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK
|
|
|
|
*((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO
|
2018-05-01 20:50:59 +00:00
|
|
|
call gfx_init_chunky
|
2020-04-25 18:10:49 +00:00
|
|
|
to:main::@7
|
|
|
|
main::@7: scope:[main] from main
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE
|
|
|
|
*((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF
|
|
|
|
*((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
*((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_START_LO) ← <(const nomodify byte*) CHUNKY
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_START_HI) ← (number) 0
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_STEP) ← (number) 8
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (number) 0
|
|
|
|
*((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (number) 0
|
2020-04-26 21:30:04 +00:00
|
|
|
*((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (number) 3
|
|
|
|
*((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← (number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(number) $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) VIC_MEMORY) ← (byte)(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) $40|>(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) 4
|
2019-06-02 22:44:46 +00:00
|
|
|
(byte) main::j#0 ← (byte) 0
|
2019-03-31 15:57:54 +00:00
|
|
|
to:main::@1
|
2020-04-25 18:10:49 +00:00
|
|
|
main::@1: scope:[main] from main::@1 main::@7
|
|
|
|
(byte) main::j#2 ← phi( main::@1/(byte) main::j#1 main::@7/(byte) main::j#0 )
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) DTV_PALETTE + (byte) main::j#2) ← (byte) main::j#2
|
2019-03-08 05:54:45 +00:00
|
|
|
(byte) main::j#1 ← (byte) main::j#2 + rangenext(0,$f)
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) main::$1 ← (byte) main::j#1 != rangelast(0,$f)
|
|
|
|
if((bool~) main::$1) goto main::@1
|
2020-04-25 18:10:49 +00:00
|
|
|
to:main::@2
|
|
|
|
main::@2: scope:[main] from main::@1 main::@6
|
|
|
|
if(true) goto main::@3
|
2018-04-15 21:32:49 +00:00
|
|
|
to:main::@return
|
2020-04-25 18:10:49 +00:00
|
|
|
main::@3: scope:[main] from main::@2
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
*((const nomodify byte*) BORDERCOL) ← (number) 0
|
2020-01-01 17:27:53 +00:00
|
|
|
(byte) main::rst#0 ← (byte) $42
|
2020-04-25 18:10:49 +00:00
|
|
|
to:main::@4
|
|
|
|
main::@4: scope:[main] from main::@3 main::@4
|
|
|
|
(byte) main::rst#2 ← phi( main::@3/(byte) main::rst#0 main::@4/(byte) main::rst#2 )
|
2020-03-29 19:00:25 +00:00
|
|
|
(bool~) main::$2 ← *((const nomodify byte*) RASTER) != (byte) main::rst#2
|
2020-04-25 18:10:49 +00:00
|
|
|
if((bool~) main::$2) goto main::@4
|
|
|
|
to:main::@5
|
|
|
|
main::@5: scope:[main] from main::@4
|
2019-03-29 23:15:53 +00:00
|
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2020-04-25 18:10:49 +00:00
|
|
|
to:main::@6
|
|
|
|
main::@6: scope:[main] from main::@5 main::@6
|
2020-03-29 19:00:25 +00:00
|
|
|
(byte) main::rst#1 ← *((const nomodify byte*) RASTER)
|
2019-11-03 23:39:09 +00:00
|
|
|
(number~) main::$3 ← (byte) main::rst#1 & (number) 7
|
2020-03-29 19:00:25 +00:00
|
|
|
(number~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (number~) main::$3
|
|
|
|
*((const nomodify byte*) VIC_CONTROL) ← (number~) main::$4
|
2019-11-03 23:39:09 +00:00
|
|
|
(number~) main::$5 ← (byte) main::rst#1 * (number) $10
|
2020-03-29 19:00:25 +00:00
|
|
|
*((const nomodify byte*) BORDERCOL) ← (number~) main::$5
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) main::$6 ← (byte) main::rst#1 != (number) $f2
|
2020-04-25 18:10:49 +00:00
|
|
|
if((bool~) main::$6) goto main::@6
|
|
|
|
to:main::@2
|
|
|
|
main::@return: scope:[main] from main::@2
|
2018-04-15 21:32:49 +00:00
|
|
|
return
|
|
|
|
to:@return
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) gfx_init_chunky()
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky: scope:[gfx_init_chunky] from main
|
2020-03-29 19:00:25 +00:00
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#0 ← (byte)(const nomodify byte*) CHUNKY/(number) $4000
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#0 ← (byte) gfx_init_chunky::gfxbCpuBank#0
|
2018-05-01 20:50:59 +00:00
|
|
|
call dtvSetCpuBankSegment1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@7
|
|
|
|
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#3 ← phi( gfx_init_chunky/(byte) gfx_init_chunky::gfxbCpuBank#0 )
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#1 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#3
|
2019-12-22 10:53:37 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb#0 ← (byte*)(number) $4000
|
2019-06-02 22:44:46 +00:00
|
|
|
(byte) gfx_init_chunky::y#0 ← (byte) 0
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@1
|
|
|
|
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky::@5 gfx_init_chunky::@7
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#7 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::gfxbCpuBank#9 gfx_init_chunky::@7/(byte) gfx_init_chunky::gfxbCpuBank#1 )
|
|
|
|
(byte) gfx_init_chunky::y#6 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::y#1 gfx_init_chunky::@7/(byte) gfx_init_chunky::y#0 )
|
|
|
|
(byte*) gfx_init_chunky::gfxb#5 ← phi( gfx_init_chunky::@5/(byte*) gfx_init_chunky::gfxb#6 gfx_init_chunky::@7/(byte*) gfx_init_chunky::gfxb#0 )
|
2019-06-02 22:44:46 +00:00
|
|
|
(word) gfx_init_chunky::x#0 ← (word) 0
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@2
|
|
|
|
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#6 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
|
|
|
|
(byte) gfx_init_chunky::y#4 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::y#6 gfx_init_chunky::@3/(byte) gfx_init_chunky::y#2 )
|
|
|
|
(word) gfx_init_chunky::x#3 ← phi( gfx_init_chunky::@1/(word) gfx_init_chunky::x#0 gfx_init_chunky::@3/(word) gfx_init_chunky::x#1 )
|
|
|
|
(byte*) gfx_init_chunky::gfxb#3 ← phi( gfx_init_chunky::@1/(byte*) gfx_init_chunky::gfxb#5 gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) gfx_init_chunky::$2 ← (byte*) gfx_init_chunky::gfxb#3 == (number) $8000
|
|
|
|
(bool~) gfx_init_chunky::$3 ← ! (bool~) gfx_init_chunky::$2
|
|
|
|
if((bool~) gfx_init_chunky::$3) goto gfx_init_chunky::@3
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@4
|
|
|
|
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@8
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#8 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#6 gfx_init_chunky::@8/(byte) gfx_init_chunky::gfxbCpuBank#2 )
|
|
|
|
(byte*) gfx_init_chunky::gfxb#4 ← phi( gfx_init_chunky::@2/(byte*) gfx_init_chunky::gfxb#3 gfx_init_chunky::@8/(byte*) gfx_init_chunky::gfxb#2 )
|
|
|
|
(byte) gfx_init_chunky::y#2 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::y#4 gfx_init_chunky::@8/(byte) gfx_init_chunky::y#5 )
|
|
|
|
(word) gfx_init_chunky::x#2 ← phi( gfx_init_chunky::@2/(word) gfx_init_chunky::x#3 gfx_init_chunky::@8/(word) gfx_init_chunky::x#4 )
|
2019-11-03 23:39:09 +00:00
|
|
|
(word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#2
|
2020-04-19 09:05:54 +00:00
|
|
|
(byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5
|
2018-04-15 21:32:49 +00:00
|
|
|
*((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0
|
|
|
|
(byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4
|
2019-03-08 05:54:45 +00:00
|
|
|
(word) gfx_init_chunky::x#1 ← (word) gfx_init_chunky::x#2 + rangenext(0,$13f)
|
2020-04-19 09:05:54 +00:00
|
|
|
(bool~) gfx_init_chunky::$6 ← (word) gfx_init_chunky::x#1 != rangelast(0,$13f)
|
|
|
|
if((bool~) gfx_init_chunky::$6) goto gfx_init_chunky::@2
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@5
|
|
|
|
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
|
|
|
|
(byte) gfx_init_chunky::y#7 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::y#4 )
|
|
|
|
(word) gfx_init_chunky::x#5 ← phi( gfx_init_chunky::@2/(word) gfx_init_chunky::x#3 )
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#4 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#6 )
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4
|
2018-05-01 20:50:59 +00:00
|
|
|
call dtvSetCpuBankSegment1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@8
|
|
|
|
gfx_init_chunky::@8: scope:[gfx_init_chunky] from gfx_init_chunky::@4
|
|
|
|
(byte) gfx_init_chunky::y#5 ← phi( gfx_init_chunky::@4/(byte) gfx_init_chunky::y#7 )
|
|
|
|
(word) gfx_init_chunky::x#4 ← phi( gfx_init_chunky::@4/(word) gfx_init_chunky::x#5 )
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#5 ← phi( gfx_init_chunky::@4/(byte) gfx_init_chunky::gfxbCpuBank#4 )
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#5
|
2019-05-30 20:29:04 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb#2 ← ((byte*)) (number) $4000
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@3
|
|
|
|
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#9 ← phi( gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
|
|
|
|
(byte*) gfx_init_chunky::gfxb#6 ← phi( gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
|
|
|
|
(byte) gfx_init_chunky::y#3 ← phi( gfx_init_chunky::@3/(byte) gfx_init_chunky::y#2 )
|
2019-03-08 05:54:45 +00:00
|
|
|
(byte) gfx_init_chunky::y#1 ← (byte) gfx_init_chunky::y#3 + rangenext(0,$32)
|
2020-04-19 09:05:54 +00:00
|
|
|
(bool~) gfx_init_chunky::$7 ← (byte) gfx_init_chunky::y#1 != rangelast(0,$32)
|
|
|
|
if((bool~) gfx_init_chunky::$7) goto gfx_init_chunky::@1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@6
|
|
|
|
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
|
2019-11-03 23:39:09 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#2 ← (byte)(number) $4000/(number) $4000
|
2018-05-01 20:50:59 +00:00
|
|
|
call dtvSetCpuBankSegment1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@9
|
|
|
|
gfx_init_chunky::@9: scope:[gfx_init_chunky] from gfx_init_chunky::@6
|
|
|
|
to:gfx_init_chunky::@return
|
|
|
|
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@9
|
|
|
|
return
|
|
|
|
to:@return
|
2020-04-25 18:10:49 +00:00
|
|
|
@1: scope:[] from @begin
|
2018-05-01 20:50:59 +00:00
|
|
|
call main
|
2020-04-25 18:10:49 +00:00
|
|
|
to:@2
|
|
|
|
@2: scope:[] from @1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:@end
|
2020-04-25 18:10:49 +00:00
|
|
|
@end: scope:[] from @2
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
SYMBOL TABLE SSA
|
2020-04-25 18:10:49 +00:00
|
|
|
(label) @1
|
|
|
|
(label) @2
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) @begin
|
|
|
|
(label) @end
|
2020-03-29 19:00:25 +00:00
|
|
|
(const nomodify byte*) BORDERCOL = (byte*)(number) $d020
|
|
|
|
(const nomodify byte*) CHUNKY = (byte*)(number) $8000
|
2020-04-26 21:30:04 +00:00
|
|
|
(const nomodify struct MOS6526_CIA*) CIA2 = (struct MOS6526_CIA*)(number) $dd00
|
2020-03-29 19:00:25 +00:00
|
|
|
(const nomodify byte) DTV_BADLINE_OFF = (byte) $20
|
|
|
|
(const nomodify byte) DTV_CHUNKY = (byte) $40
|
|
|
|
(const nomodify byte) DTV_COLORRAM_OFF = (byte) $10
|
|
|
|
(const nomodify byte*) DTV_CONTROL = (byte*)(number) $d03c
|
|
|
|
(const nomodify byte*) DTV_FEATURE = (byte*)(number) $d03f
|
|
|
|
(const nomodify byte) DTV_FEATURE_ENABLE = (byte) 1
|
|
|
|
(const nomodify byte) DTV_HIGHCOLOR = (byte) 4
|
|
|
|
(const nomodify byte) DTV_LINEAR = (byte) 1
|
|
|
|
(const nomodify byte*) DTV_PALETTE = (byte*)(number) $d200
|
|
|
|
(const nomodify byte*) DTV_PLANEB_MODULO_HI = (byte*)(number) $d048
|
|
|
|
(const nomodify byte*) DTV_PLANEB_MODULO_LO = (byte*)(number) $d047
|
|
|
|
(const nomodify byte*) DTV_PLANEB_START_HI = (byte*)(number) $d04b
|
|
|
|
(const nomodify byte*) DTV_PLANEB_START_LO = (byte*)(number) $d049
|
|
|
|
(const nomodify byte*) DTV_PLANEB_START_MI = (byte*)(number) $d04a
|
|
|
|
(const nomodify byte*) DTV_PLANEB_STEP = (byte*)(number) $d04c
|
2020-04-26 21:30:04 +00:00
|
|
|
(byte) MOS6526_CIA::INTERRUPT
|
|
|
|
(byte) MOS6526_CIA::PORT_A
|
|
|
|
(byte) MOS6526_CIA::PORT_A_DDR
|
|
|
|
(byte) MOS6526_CIA::PORT_B
|
|
|
|
(byte) MOS6526_CIA::PORT_B_DDR
|
|
|
|
(byte) MOS6526_CIA::SERIAL_DATA
|
|
|
|
(word) MOS6526_CIA::TIMER_A
|
|
|
|
(byte) MOS6526_CIA::TIMER_A_CONTROL
|
|
|
|
(word) MOS6526_CIA::TIMER_B
|
|
|
|
(byte) MOS6526_CIA::TIMER_B_CONTROL
|
|
|
|
(byte) MOS6526_CIA::TOD_10THS
|
|
|
|
(byte) MOS6526_CIA::TOD_HOURS
|
|
|
|
(byte) MOS6526_CIA::TOD_MIN
|
|
|
|
(byte) MOS6526_CIA::TOD_SEC
|
2020-04-28 20:58:16 +00:00
|
|
|
(byte) MOS6569_VICII::BG_COLOR
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR1
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR2
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR3
|
|
|
|
(byte) MOS6569_VICII::BORDER_COLOR
|
|
|
|
(byte) MOS6569_VICII::CONTROL1
|
|
|
|
(byte) MOS6569_VICII::CONTROL2
|
|
|
|
(byte) MOS6569_VICII::IRQ_ENABLE
|
|
|
|
(byte) MOS6569_VICII::IRQ_STATUS
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_X
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_Y
|
|
|
|
(byte) MOS6569_VICII::MEMORY
|
|
|
|
(byte) MOS6569_VICII::RASTER
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITES_BG_COLLISION
|
|
|
|
(byte) MOS6569_VICII::SPRITES_COLLISION
|
|
|
|
(byte) MOS6569_VICII::SPRITES_ENABLE
|
|
|
|
(byte) MOS6569_VICII::SPRITES_EXPAND_X
|
|
|
|
(byte) MOS6569_VICII::SPRITES_EXPAND_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MC
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MCOLOR1
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MCOLOR2
|
|
|
|
(byte) MOS6569_VICII::SPRITES_PRIORITY
|
|
|
|
(byte) MOS6569_VICII::SPRITES_XMSB
|
2020-04-27 22:30:35 +00:00
|
|
|
(byte) MOS6581_SID::CH1_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH1_CONTROL
|
|
|
|
(word) MOS6581_SID::CH1_FREQ
|
|
|
|
(word) MOS6581_SID::CH1_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH1_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::CH2_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH2_CONTROL
|
|
|
|
(word) MOS6581_SID::CH2_FREQ
|
|
|
|
(word) MOS6581_SID::CH2_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH2_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::CH3_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH3_CONTROL
|
|
|
|
(byte) MOS6581_SID::CH3_ENV
|
|
|
|
(word) MOS6581_SID::CH3_FREQ
|
|
|
|
(byte) MOS6581_SID::CH3_OSC
|
|
|
|
(word) MOS6581_SID::CH3_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH3_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::FILTER_CUTOFF_HIGH
|
|
|
|
(byte) MOS6581_SID::FILTER_CUTOFF_LOW
|
|
|
|
(byte) MOS6581_SID::FILTER_SETUP
|
|
|
|
(byte) MOS6581_SID::POT_X
|
|
|
|
(byte) MOS6581_SID::POT_Y
|
|
|
|
(byte) MOS6581_SID::VOLUME_FILTER_MODE
|
2020-04-26 21:30:04 +00:00
|
|
|
(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A = (byte) 0
|
|
|
|
(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = (byte) 2
|
2020-03-29 19:00:25 +00:00
|
|
|
(const nomodify byte*) PROCPORT = (byte*)(number) 1
|
|
|
|
(const nomodify byte*) PROCPORT_DDR = (byte*)(number) 0
|
|
|
|
(const nomodify byte) PROCPORT_DDR_MEMORY_MASK = (byte) 7
|
|
|
|
(const nomodify byte) PROCPORT_RAM_IO = (byte) 5
|
|
|
|
(const nomodify byte*) RASTER = (byte*)(number) $d012
|
|
|
|
(const nomodify byte*) VIC_CONTROL = (byte*)(number) $d011
|
|
|
|
(const nomodify byte*) VIC_CONTROL2 = (byte*)(number) $d016
|
|
|
|
(const nomodify byte) VIC_CSEL = (byte) 8
|
|
|
|
(const nomodify byte) VIC_DEN = (byte) $10
|
|
|
|
(const nomodify byte) VIC_ECM = (byte) $40
|
|
|
|
(const nomodify byte) VIC_MCM = (byte) $10
|
|
|
|
(const nomodify byte*) VIC_MEMORY = (byte*)(number) $d018
|
|
|
|
(const nomodify byte) VIC_RSEL = (byte) 8
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
|
|
|
|
(label) dtvSetCpuBankSegment1::@return
|
2019-11-03 16:05:55 +00:00
|
|
|
(const byte*) dtvSetCpuBankSegment1::cpuBank = (byte*)(number) $ff
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#0
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#2
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3
|
|
|
|
(void()) gfx_init_chunky()
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) gfx_init_chunky::$2
|
|
|
|
(bool~) gfx_init_chunky::$3
|
|
|
|
(word~) gfx_init_chunky::$5
|
2020-04-19 09:05:54 +00:00
|
|
|
(bool~) gfx_init_chunky::$6
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) gfx_init_chunky::$7
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) gfx_init_chunky::@1
|
|
|
|
(label) gfx_init_chunky::@2
|
|
|
|
(label) gfx_init_chunky::@3
|
|
|
|
(label) gfx_init_chunky::@4
|
|
|
|
(label) gfx_init_chunky::@5
|
|
|
|
(label) gfx_init_chunky::@6
|
|
|
|
(label) gfx_init_chunky::@7
|
|
|
|
(label) gfx_init_chunky::@8
|
|
|
|
(label) gfx_init_chunky::@9
|
|
|
|
(label) gfx_init_chunky::@return
|
|
|
|
(byte) gfx_init_chunky::c
|
|
|
|
(byte) gfx_init_chunky::c#0
|
|
|
|
(byte*) gfx_init_chunky::gfxb
|
|
|
|
(byte*) gfx_init_chunky::gfxb#0
|
|
|
|
(byte*) gfx_init_chunky::gfxb#1
|
|
|
|
(byte*) gfx_init_chunky::gfxb#2
|
|
|
|
(byte*) gfx_init_chunky::gfxb#3
|
|
|
|
(byte*) gfx_init_chunky::gfxb#4
|
|
|
|
(byte*) gfx_init_chunky::gfxb#5
|
|
|
|
(byte*) gfx_init_chunky::gfxb#6
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#0
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#1
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#2
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#3
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#4
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#5
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#6
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#7
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#8
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#9
|
|
|
|
(word) gfx_init_chunky::x
|
|
|
|
(word) gfx_init_chunky::x#0
|
|
|
|
(word) gfx_init_chunky::x#1
|
|
|
|
(word) gfx_init_chunky::x#2
|
|
|
|
(word) gfx_init_chunky::x#3
|
|
|
|
(word) gfx_init_chunky::x#4
|
|
|
|
(word) gfx_init_chunky::x#5
|
|
|
|
(byte) gfx_init_chunky::y
|
|
|
|
(byte) gfx_init_chunky::y#0
|
|
|
|
(byte) gfx_init_chunky::y#1
|
|
|
|
(byte) gfx_init_chunky::y#2
|
|
|
|
(byte) gfx_init_chunky::y#3
|
|
|
|
(byte) gfx_init_chunky::y#4
|
|
|
|
(byte) gfx_init_chunky::y#5
|
|
|
|
(byte) gfx_init_chunky::y#6
|
|
|
|
(byte) gfx_init_chunky::y#7
|
|
|
|
(void()) main()
|
2019-11-03 23:39:09 +00:00
|
|
|
(bool~) main::$1
|
|
|
|
(bool~) main::$2
|
|
|
|
(number~) main::$3
|
2019-11-03 16:05:55 +00:00
|
|
|
(number~) main::$4
|
2019-11-03 23:39:09 +00:00
|
|
|
(number~) main::$5
|
|
|
|
(bool~) main::$6
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) main::@1
|
2020-04-25 18:10:49 +00:00
|
|
|
(label) main::@2
|
2019-03-31 15:57:54 +00:00
|
|
|
(label) main::@3
|
|
|
|
(label) main::@4
|
2020-04-25 18:10:49 +00:00
|
|
|
(label) main::@5
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) main::@6
|
2020-04-25 18:10:49 +00:00
|
|
|
(label) main::@7
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) main::@return
|
|
|
|
(byte) main::j
|
|
|
|
(byte) main::j#0
|
|
|
|
(byte) main::j#1
|
|
|
|
(byte) main::j#2
|
|
|
|
(byte) main::rst
|
|
|
|
(byte) main::rst#0
|
|
|
|
(byte) main::rst#1
|
|
|
|
(byte) main::rst#2
|
|
|
|
|
2020-03-29 19:00:25 +00:00
|
|
|
Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
Adding number conversion cast (unumber) 3 in *((const nomodify byte*) VIC_CONTROL) ← ((unumber)) (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
Adding number conversion cast (unumber) 0 in *((const nomodify byte*) DTV_PLANEB_START_HI) ← (number) 0
|
|
|
|
Adding number conversion cast (unumber) 8 in *((const nomodify byte*) DTV_PLANEB_STEP) ← (number) 8
|
|
|
|
Adding number conversion cast (unumber) 0 in *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (number) 0
|
|
|
|
Adding number conversion cast (unumber) 0 in *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (number) 0
|
2020-04-26 21:30:04 +00:00
|
|
|
Adding number conversion cast (unumber) 3 in *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (number) 3
|
|
|
|
Adding number conversion cast (unumber) 3^(byte)(word)CHUNKY/$4000 in *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← (number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(number) $4000
|
|
|
|
Adding number conversion cast (unumber) 3 in *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← ((unumber)) (number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(number) $4000
|
|
|
|
Adding number conversion cast (unumber) $4000 in *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← ((unumber)) (unumber)(number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(number) $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
Adding number conversion cast (unumber) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 in *((const nomodify byte*) VIC_MEMORY) ← (byte)(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) $40|>(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) 4
|
|
|
|
Adding number conversion cast (unumber) >(word)CHUNKY&$3fff/4 in *((const nomodify byte*) VIC_MEMORY) ← ((unumber)) (byte)(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) $40|>(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) 4
|
|
|
|
Adding number conversion cast (unumber) $3fff in *((const nomodify byte*) VIC_MEMORY) ← ((unumber)) (byte)(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) 4
|
|
|
|
Adding number conversion cast (unumber) $3fff in *((const nomodify byte*) VIC_MEMORY) ← ((unumber)) (byte)(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(number) $3fff/(number) 4
|
|
|
|
Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
Adding number conversion cast (unumber) 3 in *((const nomodify byte*) VIC_CONTROL) ← ((unumber)) (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(number) 3
|
|
|
|
Adding number conversion cast (unumber) 0 in *((const nomodify byte*) BORDERCOL) ← (number) 0
|
2019-11-03 23:39:09 +00:00
|
|
|
Adding number conversion cast (unumber) 7 in (number~) main::$3 ← (byte) main::rst#1 & (number) 7
|
|
|
|
Adding number conversion cast (unumber) main::$3 in (number~) main::$3 ← (byte) main::rst#1 & (unumber)(number) 7
|
2020-03-29 19:00:25 +00:00
|
|
|
Adding number conversion cast (unumber) main::$4 in (number~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (unumber~) main::$3
|
2019-11-03 23:39:09 +00:00
|
|
|
Adding number conversion cast (unumber) $10 in (number~) main::$5 ← (byte) main::rst#1 * (number) $10
|
|
|
|
Adding number conversion cast (unumber) main::$5 in (number~) main::$5 ← (byte) main::rst#1 * (unumber)(number) $10
|
|
|
|
Adding number conversion cast (unumber) $f2 in (bool~) main::$6 ← (byte) main::rst#1 != (number) $f2
|
2020-03-29 19:00:25 +00:00
|
|
|
Adding number conversion cast (unumber) $4000 in (byte) gfx_init_chunky::gfxbCpuBank#0 ← (byte)(const nomodify byte*) CHUNKY/(number) $4000
|
2019-11-03 23:39:09 +00:00
|
|
|
Adding number conversion cast (unumber) $8000 in (bool~) gfx_init_chunky::$2 ← (byte*) gfx_init_chunky::gfxb#3 == (number) $8000
|
|
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
2020-03-29 19:00:25 +00:00
|
|
|
Adding number conversion cast (unumber) $40 in *((const nomodify byte*) VIC_MEMORY) ← ((unumber)) (byte)(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(number) 4
|
|
|
|
Adding number conversion cast (unumber) 4 in *((const nomodify byte*) VIC_MEMORY) ← ((unumber)) (byte)(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(number) 4
|
2019-05-30 20:29:04 +00:00
|
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
2020-03-29 19:00:25 +00:00
|
|
|
Inlining cast *((const nomodify byte*) VIC_CONTROL) ← (unumber)(const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(unumber)(number) 3
|
|
|
|
Inlining cast *((const nomodify byte*) DTV_PLANEB_START_HI) ← (unumber)(number) 0
|
|
|
|
Inlining cast *((const nomodify byte*) DTV_PLANEB_STEP) ← (unumber)(number) 8
|
|
|
|
Inlining cast *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (unumber)(number) 0
|
|
|
|
Inlining cast *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (unumber)(number) 0
|
2020-04-26 21:30:04 +00:00
|
|
|
Inlining cast *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (unumber)(number) 3
|
|
|
|
Inlining cast *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← (unumber)(unumber)(number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(unumber)(number) $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
Inlining cast *((const nomodify byte*) VIC_MEMORY) ← (unumber)(byte)(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) 4
|
|
|
|
Inlining cast *((const nomodify byte*) VIC_CONTROL) ← (unumber)(const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(unumber)(number) 3
|
|
|
|
Inlining cast *((const nomodify byte*) BORDERCOL) ← (unumber)(number) 0
|
2019-05-30 20:29:04 +00:00
|
|
|
Inlining cast (byte*) gfx_init_chunky::gfxb#2 ← (byte*)(number) $4000
|
|
|
|
Successful SSA optimization Pass2InlineCast
|
|
|
|
Simplifying constant pointer cast (byte*) 53266
|
|
|
|
Simplifying constant pointer cast (byte*) 53280
|
|
|
|
Simplifying constant pointer cast (byte*) 53265
|
|
|
|
Simplifying constant pointer cast (byte*) 53270
|
|
|
|
Simplifying constant pointer cast (byte*) 53272
|
2020-04-28 20:58:16 +00:00
|
|
|
Simplifying constant pointer cast (byte*) 0
|
|
|
|
Simplifying constant pointer cast (byte*) 1
|
2020-04-26 21:30:04 +00:00
|
|
|
Simplifying constant pointer cast (struct MOS6526_CIA*) 56576
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant pointer cast (byte*) 53311
|
|
|
|
Simplifying constant pointer cast (byte*) 53308
|
|
|
|
Simplifying constant pointer cast (byte*) 53760
|
|
|
|
Simplifying constant pointer cast (byte*) 53321
|
|
|
|
Simplifying constant pointer cast (byte*) 53322
|
|
|
|
Simplifying constant pointer cast (byte*) 53323
|
|
|
|
Simplifying constant pointer cast (byte*) 53324
|
|
|
|
Simplifying constant pointer cast (byte*) 53319
|
|
|
|
Simplifying constant pointer cast (byte*) 53320
|
|
|
|
Simplifying constant pointer cast (byte*) 255
|
|
|
|
Simplifying constant pointer cast (byte*) 32768
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant integer cast (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(unumber)(number) 3
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant integer cast 3
|
|
|
|
Simplifying constant integer cast 0
|
|
|
|
Simplifying constant integer cast 8
|
|
|
|
Simplifying constant integer cast 0
|
|
|
|
Simplifying constant integer cast 0
|
|
|
|
Simplifying constant integer cast 3
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant integer cast (unumber)(number) 3^(byte)(word)(const nomodify byte*) CHUNKY/(unumber)(number) $4000
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant integer cast 3
|
2019-11-03 23:39:09 +00:00
|
|
|
Simplifying constant integer cast $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant integer cast (byte)(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) $40|(unumber)>(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) 4
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant integer cast $3fff
|
|
|
|
Simplifying constant integer cast $40
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant integer cast >(word)(const nomodify byte*) CHUNKY&(unumber)(number) $3fff/(unumber)(number) 4
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant integer cast $3fff
|
|
|
|
Simplifying constant integer cast 4
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant integer cast (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(unumber)(number) 3
|
2019-05-30 20:29:04 +00:00
|
|
|
Simplifying constant integer cast 3
|
|
|
|
Simplifying constant integer cast 0
|
|
|
|
Simplifying constant integer cast 7
|
|
|
|
Simplifying constant integer cast $10
|
|
|
|
Simplifying constant integer cast $f2
|
|
|
|
Simplifying constant integer cast $4000
|
|
|
|
Simplifying constant pointer cast (byte*) 16384
|
|
|
|
Simplifying constant integer cast $8000
|
|
|
|
Simplifying constant pointer cast (byte*) 16384
|
|
|
|
Successful SSA optimization PassNCastSimplification
|
|
|
|
Finalized unsigned number type (byte) 3
|
|
|
|
Finalized unsigned number type (byte) 0
|
|
|
|
Finalized unsigned number type (byte) 8
|
|
|
|
Finalized unsigned number type (byte) 0
|
|
|
|
Finalized unsigned number type (byte) 0
|
|
|
|
Finalized unsigned number type (byte) 3
|
|
|
|
Finalized unsigned number type (byte) 3
|
2019-11-03 23:39:09 +00:00
|
|
|
Finalized unsigned number type (word) $4000
|
2019-05-30 20:29:04 +00:00
|
|
|
Finalized unsigned number type (word) $3fff
|
|
|
|
Finalized unsigned number type (byte) $40
|
|
|
|
Finalized unsigned number type (word) $3fff
|
|
|
|
Finalized unsigned number type (byte) 4
|
|
|
|
Finalized unsigned number type (byte) 3
|
|
|
|
Finalized unsigned number type (byte) 0
|
|
|
|
Finalized unsigned number type (byte) 7
|
|
|
|
Finalized unsigned number type (byte) $10
|
|
|
|
Finalized unsigned number type (byte) $f2
|
|
|
|
Finalized unsigned number type (word) $4000
|
|
|
|
Finalized unsigned number type (word) $8000
|
|
|
|
Successful SSA optimization PassNFinalizeNumberTypeConversions
|
2019-11-03 23:39:09 +00:00
|
|
|
Inferred type updated to byte in (unumber~) main::$3 ← (byte) main::rst#1 & (byte) 7
|
2020-03-29 19:00:25 +00:00
|
|
|
Inferred type updated to byte in (unumber~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3
|
2019-11-03 23:39:09 +00:00
|
|
|
Inferred type updated to byte in (unumber~) main::$5 ← (byte) main::rst#1 * (byte) $10
|
|
|
|
Inversing boolean not [57] (bool~) gfx_init_chunky::$3 ← (byte*) gfx_init_chunky::gfxb#3 != (word) $8000 from [56] (bool~) gfx_init_chunky::$2 ← (byte*) gfx_init_chunky::gfxb#3 == (word) $8000
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2UnaryNotSimplification
|
2020-03-22 21:26:39 +00:00
|
|
|
Alias gfx_init_chunky::gfxbCpuBank#0 = gfx_init_chunky::gfxbCpuBank#3
|
|
|
|
Alias gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#6 gfx_init_chunky::gfxbCpuBank#5
|
|
|
|
Alias gfx_init_chunky::x#3 = gfx_init_chunky::x#5 gfx_init_chunky::x#4
|
|
|
|
Alias gfx_init_chunky::y#4 = gfx_init_chunky::y#7 gfx_init_chunky::y#5
|
|
|
|
Alias gfx_init_chunky::y#2 = gfx_init_chunky::y#3
|
|
|
|
Alias gfx_init_chunky::gfxb#1 = gfx_init_chunky::gfxb#6
|
|
|
|
Alias gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#9
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2AliasElimination
|
2020-03-22 21:26:39 +00:00
|
|
|
Alias gfx_init_chunky::x#2 = gfx_init_chunky::x#3
|
|
|
|
Alias gfx_init_chunky::y#2 = gfx_init_chunky::y#4
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2AliasElimination
|
2019-05-30 20:29:04 +00:00
|
|
|
Identical Phi Values (byte) main::rst#2 (byte) main::rst#0
|
|
|
|
Identical Phi Values (byte) gfx_init_chunky::y#2 (byte) gfx_init_chunky::y#6
|
|
|
|
Successful SSA optimization Pass2IdenticalPhiElimination
|
2019-11-03 23:39:09 +00:00
|
|
|
Simple Condition (bool~) main::$1 [26] if((byte) main::j#1!=rangelast(0,$f)) goto main::@1
|
2020-04-25 18:10:49 +00:00
|
|
|
Simple Condition (bool~) main::$2 [34] if(*((const nomodify byte*) RASTER)!=(byte) main::rst#0) goto main::@4
|
|
|
|
Simple Condition (bool~) main::$6 [44] if((byte) main::rst#1!=(byte) $f2) goto main::@6
|
2020-02-22 19:45:35 +00:00
|
|
|
Simple Condition (bool~) gfx_init_chunky::$3 [56] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3
|
2020-04-19 09:05:54 +00:00
|
|
|
Simple Condition (bool~) gfx_init_chunky::$6 [64] if((word) gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2
|
|
|
|
Simple Condition (bool~) gfx_init_chunky::$7 [71] if((byte) gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2ConditionalJumpSimplification
|
2018-04-15 21:32:49 +00:00
|
|
|
Constant (const byte) main::j#0 = 0
|
2019-03-08 05:54:45 +00:00
|
|
|
Constant (const byte) main::rst#0 = $42
|
2019-11-03 16:05:55 +00:00
|
|
|
Constant (const byte) gfx_init_chunky::gfxbCpuBank#0 = (byte)CHUNKY/$4000
|
2019-05-30 20:29:04 +00:00
|
|
|
Constant (const byte*) gfx_init_chunky::gfxb#0 = (byte*) 16384
|
2018-04-15 21:32:49 +00:00
|
|
|
Constant (const byte) gfx_init_chunky::y#0 = 0
|
|
|
|
Constant (const word) gfx_init_chunky::x#0 = 0
|
2019-05-30 20:29:04 +00:00
|
|
|
Constant (const byte*) gfx_init_chunky::gfxb#2 = (byte*) 16384
|
2019-06-18 23:23:27 +00:00
|
|
|
Constant (const byte) dtvSetCpuBankSegment1::cpuBankIdx#2 = (byte)$4000/$4000
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2ConstantIdentification
|
2019-11-03 16:05:55 +00:00
|
|
|
Constant (const byte) dtvSetCpuBankSegment1::cpuBankIdx#0 = gfx_init_chunky::gfxbCpuBank#0
|
2019-10-20 15:06:17 +00:00
|
|
|
Successful SSA optimization Pass2ConstantIdentification
|
2020-04-25 18:10:49 +00:00
|
|
|
if() condition always true - replacing block destination [27] if(true) goto main::@3
|
2019-05-30 20:29:04 +00:00
|
|
|
Successful SSA optimization Pass2ConstantIfs
|
2019-11-03 23:39:09 +00:00
|
|
|
Resolved ranged next value [24] main::j#1 ← ++ main::j#2 to ++
|
|
|
|
Resolved ranged comparison value [26] if(main::j#1!=rangelast(0,$f)) goto main::@1 to (number) $10
|
2020-02-22 19:45:35 +00:00
|
|
|
Resolved ranged next value [62] gfx_init_chunky::x#1 ← ++ gfx_init_chunky::x#2 to ++
|
|
|
|
Resolved ranged comparison value [64] if(gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2 to (number) $140
|
|
|
|
Resolved ranged next value [69] gfx_init_chunky::y#1 ← ++ gfx_init_chunky::y#6 to ++
|
|
|
|
Resolved ranged comparison value [71] if(gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1 to (number) $33
|
2020-03-29 19:00:25 +00:00
|
|
|
Simplifying constant evaluating to zero <(const nomodify byte*) CHUNKY in [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← <(const nomodify byte*) CHUNKY
|
|
|
|
Simplifying constant evaluating to zero (byte)(word)(const nomodify byte*) CHUNKY&(word) $3fff/(byte) $40|>(word)(const nomodify byte*) CHUNKY&(word) $3fff/(byte) 4 in [20] *((const nomodify byte*) VIC_MEMORY) ← (byte)(word)(const nomodify byte*) CHUNKY&(word) $3fff/(byte) $40|>(word)(const nomodify byte*) CHUNKY&(word) $3fff/(byte) 4
|
2019-11-03 16:05:55 +00:00
|
|
|
Successful SSA optimization PassNSimplifyConstantZero
|
2020-04-26 21:30:04 +00:00
|
|
|
Simplifying expression containing zero (byte*)CIA2 in [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000
|
|
|
|
Successful SSA optimization PassNSimplifyExpressionWithZero
|
|
|
|
Eliminating unused constant (const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A
|
|
|
|
Successful SSA optimization PassNEliminateUnusedVars
|
2019-05-30 20:29:04 +00:00
|
|
|
Removing unused block main::@return
|
|
|
|
Successful SSA optimization Pass2EliminateUnusedBlocks
|
|
|
|
Adding number conversion cast (unumber) $10 in if((byte) main::j#1!=(number) $10) goto main::@1
|
|
|
|
Adding number conversion cast (unumber) $140 in if((word) gfx_init_chunky::x#1!=(number) $140) goto gfx_init_chunky::@2
|
|
|
|
Adding number conversion cast (unumber) $33 in if((byte) gfx_init_chunky::y#1!=(number) $33) goto gfx_init_chunky::@1
|
|
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
|
|
|
Simplifying constant integer cast $10
|
|
|
|
Simplifying constant integer cast $140
|
|
|
|
Simplifying constant integer cast $33
|
|
|
|
Successful SSA optimization PassNCastSimplification
|
|
|
|
Finalized unsigned number type (byte) $10
|
|
|
|
Finalized unsigned number type (word) $140
|
|
|
|
Finalized unsigned number type (byte) $33
|
|
|
|
Successful SSA optimization PassNFinalizeNumberTypeConversions
|
2019-11-03 23:39:09 +00:00
|
|
|
Constant right-side identified [39] (byte) gfx_init_chunky::gfxbCpuBank#1 ← ++ (const byte) gfx_init_chunky::gfxbCpuBank#0
|
2019-05-30 20:29:04 +00:00
|
|
|
Successful SSA optimization Pass2ConstantRValueConsolidation
|
2019-11-03 16:05:55 +00:00
|
|
|
Constant (const byte) gfx_init_chunky::gfxbCpuBank#1 = ++gfx_init_chunky::gfxbCpuBank#0
|
2019-05-30 20:29:04 +00:00
|
|
|
Successful SSA optimization Pass2ConstantIdentification
|
2019-11-03 23:39:09 +00:00
|
|
|
Rewriting multiplication to use shift [34] (byte~) main::$5 ← (byte) main::rst#1 * (byte) $10
|
2019-04-15 08:20:55 +00:00
|
|
|
Successful SSA optimization Pass2MultiplyToShiftRewriting
|
2018-04-15 21:32:49 +00:00
|
|
|
Inlining constant with var siblings (const byte) dtvSetCpuBankSegment1::cpuBankIdx#2
|
|
|
|
Inlining constant with var siblings (const byte) dtvSetCpuBankSegment1::cpuBankIdx#0
|
|
|
|
Inlining constant with var siblings (const byte) main::j#0
|
|
|
|
Inlining constant with var siblings (const byte) main::rst#0
|
2019-11-03 16:05:55 +00:00
|
|
|
Inlining constant with var siblings (const byte) gfx_init_chunky::gfxbCpuBank#0
|
2018-04-15 21:32:49 +00:00
|
|
|
Inlining constant with var siblings (const byte*) gfx_init_chunky::gfxb#0
|
|
|
|
Inlining constant with var siblings (const byte) gfx_init_chunky::y#0
|
|
|
|
Inlining constant with var siblings (const word) gfx_init_chunky::x#0
|
|
|
|
Inlining constant with var siblings (const byte*) gfx_init_chunky::gfxb#2
|
|
|
|
Inlining constant with var siblings (const byte) gfx_init_chunky::gfxbCpuBank#1
|
2020-03-29 19:00:25 +00:00
|
|
|
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#0 = (byte)(const nomodify byte*) CHUNKY/(word) $4000
|
2019-05-30 20:29:04 +00:00
|
|
|
Constant inlined main::rst#0 = (byte) $42
|
|
|
|
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#2 = (byte)(number) $4000/(number) $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
Constant inlined gfx_init_chunky::gfxbCpuBank#1 = ++(byte)(const nomodify byte*) CHUNKY/(word) $4000
|
2019-05-30 20:29:04 +00:00
|
|
|
Constant inlined gfx_init_chunky::y#0 = (byte) 0
|
2019-11-03 23:39:09 +00:00
|
|
|
Constant inlined main::j#0 = (byte) 0
|
2019-06-02 22:44:46 +00:00
|
|
|
Constant inlined gfx_init_chunky::x#0 = (word) 0
|
2019-05-30 20:29:04 +00:00
|
|
|
Constant inlined gfx_init_chunky::gfxb#2 = (byte*) 16384
|
|
|
|
Constant inlined gfx_init_chunky::gfxb#0 = (byte*) 16384
|
2020-03-29 19:00:25 +00:00
|
|
|
Constant inlined gfx_init_chunky::gfxbCpuBank#0 = (byte)(const nomodify byte*) CHUNKY/(word) $4000
|
2018-08-22 20:23:42 +00:00
|
|
|
Successful SSA optimization Pass2ConstantInlining
|
2020-04-25 18:10:49 +00:00
|
|
|
Added new block during phi lifting main::@8(between main::@1 and main::@1)
|
2018-04-15 21:32:49 +00:00
|
|
|
Added new block during phi lifting gfx_init_chunky::@10(between gfx_init_chunky::@5 and gfx_init_chunky::@1)
|
|
|
|
Added new block during phi lifting gfx_init_chunky::@11(between gfx_init_chunky::@3 and gfx_init_chunky::@2)
|
|
|
|
Added new block during phi lifting gfx_init_chunky::@12(between gfx_init_chunky::@2 and gfx_init_chunky::@3)
|
|
|
|
Adding NOP phi() at start of @begin
|
2020-04-25 18:10:49 +00:00
|
|
|
Adding NOP phi() at start of @1
|
|
|
|
Adding NOP phi() at start of @2
|
2018-04-15 21:32:49 +00:00
|
|
|
Adding NOP phi() at start of @end
|
2020-04-25 18:10:49 +00:00
|
|
|
Adding NOP phi() at start of main::@2
|
2018-04-15 21:32:49 +00:00
|
|
|
Adding NOP phi() at start of gfx_init_chunky
|
2019-05-30 20:29:04 +00:00
|
|
|
Adding NOP phi() at start of gfx_init_chunky::@7
|
2018-04-15 21:32:49 +00:00
|
|
|
Adding NOP phi() at start of gfx_init_chunky::@6
|
2019-05-30 20:29:04 +00:00
|
|
|
Adding NOP phi() at start of gfx_init_chunky::@9
|
2018-04-15 21:32:49 +00:00
|
|
|
CALL GRAPH
|
2019-11-03 16:05:55 +00:00
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Calls in [] to main:2
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Calls in [main] to gfx_init_chunky:8
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Calls in [gfx_init_chunky] to dtvSetCpuBankSegment1:42 dtvSetCpuBankSegment1:51 dtvSetCpuBankSegment1:64
|
2018-04-15 21:32:49 +00:00
|
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|
|
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|
|
Created 10 initial phi equivalence classes
|
2019-11-03 16:05:55 +00:00
|
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Coalesced [40] main::j#3 ← main::j#1
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Coalesced [45] gfx_init_chunky::gfxb#8 ← gfx_init_chunky::gfxb#5
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Coalesced [46] gfx_init_chunky::gfxbCpuBank#11 ← gfx_init_chunky::gfxbCpuBank#7
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Coalesced [50] dtvSetCpuBankSegment1::cpuBankIdx#4 ← dtvSetCpuBankSegment1::cpuBankIdx#1
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Coalesced [53] gfx_init_chunky::gfxbCpuBank#14 ← gfx_init_chunky::gfxbCpuBank#2
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Coalesced [67] gfx_init_chunky::gfxb#7 ← gfx_init_chunky::gfxb#1
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Coalesced [68] gfx_init_chunky::y#8 ← gfx_init_chunky::y#1
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Coalesced [69] gfx_init_chunky::gfxbCpuBank#10 ← gfx_init_chunky::gfxbCpuBank#8
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Coalesced (already) [70] gfx_init_chunky::gfxb#9 ← gfx_init_chunky::gfxb#1
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Coalesced [71] gfx_init_chunky::x#6 ← gfx_init_chunky::x#1
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Coalesced (already) [72] gfx_init_chunky::gfxbCpuBank#12 ← gfx_init_chunky::gfxbCpuBank#8
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Coalesced [73] gfx_init_chunky::gfxb#10 ← gfx_init_chunky::gfxb#3
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Coalesced (already) [74] gfx_init_chunky::gfxbCpuBank#13 ← gfx_init_chunky::gfxbCpuBank#4
|
2018-04-15 21:32:49 +00:00
|
|
|
Coalesced down to 6 phi equivalence classes
|
2020-04-25 18:10:49 +00:00
|
|
|
Culled Empty Block (label) @2
|
|
|
|
Culled Empty Block (label) main::@2
|
|
|
|
Culled Empty Block (label) main::@8
|
2019-05-30 20:29:04 +00:00
|
|
|
Culled Empty Block (label) gfx_init_chunky::@7
|
|
|
|
Culled Empty Block (label) gfx_init_chunky::@9
|
2018-04-15 21:32:49 +00:00
|
|
|
Culled Empty Block (label) gfx_init_chunky::@10
|
|
|
|
Culled Empty Block (label) gfx_init_chunky::@11
|
|
|
|
Culled Empty Block (label) gfx_init_chunky::@12
|
2020-04-25 18:10:49 +00:00
|
|
|
Renumbering block main::@3 to main::@2
|
|
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|
Renumbering block main::@4 to main::@3
|
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|
Renumbering block main::@5 to main::@4
|
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|
Renumbering block main::@6 to main::@5
|
|
|
|
Renumbering block main::@7 to main::@6
|
2019-03-31 15:10:41 +00:00
|
|
|
Renumbering block gfx_init_chunky::@8 to gfx_init_chunky::@7
|
2018-04-15 21:32:49 +00:00
|
|
|
Adding NOP phi() at start of @begin
|
2019-03-31 15:10:41 +00:00
|
|
|
Adding NOP phi() at start of @1
|
2018-04-15 21:32:49 +00:00
|
|
|
Adding NOP phi() at start of @end
|
|
|
|
Adding NOP phi() at start of gfx_init_chunky
|
|
|
|
Adding NOP phi() at start of gfx_init_chunky::@6
|
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|
|
|
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|
|
FINAL CONTROL FLOW GRAPH
|
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|
@begin: scope:[] from
|
2018-11-11 20:51:36 +00:00
|
|
|
[0] phi()
|
2019-03-31 15:10:41 +00:00
|
|
|
to:@1
|
|
|
|
@1: scope:[] from @begin
|
2018-11-11 20:51:36 +00:00
|
|
|
[1] phi()
|
|
|
|
[2] call main
|
2018-04-15 21:32:49 +00:00
|
|
|
to:@end
|
2019-03-31 15:10:41 +00:00
|
|
|
@end: scope:[] from @1
|
2018-11-11 20:51:36 +00:00
|
|
|
[3] phi()
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) main()
|
2019-03-31 15:10:41 +00:00
|
|
|
main: scope:[main] from @1
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { sei }
|
2020-03-29 19:00:25 +00:00
|
|
|
[5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK
|
|
|
|
[6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO
|
2018-11-11 20:51:36 +00:00
|
|
|
[7] call gfx_init_chunky
|
2019-03-31 15:10:41 +00:00
|
|
|
to:main::@6
|
|
|
|
main::@6: scope:[main] from main
|
2020-03-29 19:00:25 +00:00
|
|
|
[8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE
|
|
|
|
[9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF
|
|
|
|
[10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3
|
|
|
|
[11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL
|
|
|
|
[12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0
|
|
|
|
[13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY
|
|
|
|
[14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0
|
|
|
|
[15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8
|
|
|
|
[16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0
|
|
|
|
[17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0
|
2020-04-26 21:30:04 +00:00
|
|
|
[18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3
|
|
|
|
[19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000
|
2020-03-29 19:00:25 +00:00
|
|
|
[20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0
|
2019-03-31 15:57:54 +00:00
|
|
|
to:main::@1
|
|
|
|
main::@1: scope:[main] from main::@1 main::@6
|
2019-05-30 20:29:04 +00:00
|
|
|
[21] (byte) main::j#2 ← phi( main::@1/(byte) main::j#1 main::@6/(byte) 0 )
|
2020-03-29 19:00:25 +00:00
|
|
|
[22] *((const nomodify byte*) DTV_PALETTE + (byte) main::j#2) ← (byte) main::j#2
|
2018-11-11 20:51:36 +00:00
|
|
|
[23] (byte) main::j#1 ← ++ (byte) main::j#2
|
2019-05-30 20:29:04 +00:00
|
|
|
[24] if((byte) main::j#1!=(byte) $10) goto main::@1
|
2019-03-31 15:57:54 +00:00
|
|
|
to:main::@2
|
|
|
|
main::@2: scope:[main] from main::@1 main::@5
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
2020-03-29 19:00:25 +00:00
|
|
|
[26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3
|
|
|
|
[27] *((const nomodify byte*) BORDERCOL) ← (byte) 0
|
2019-03-31 15:10:41 +00:00
|
|
|
to:main::@3
|
2019-03-31 15:57:54 +00:00
|
|
|
main::@3: scope:[main] from main::@2 main::@3
|
2020-03-29 19:00:25 +00:00
|
|
|
[28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3
|
2019-03-31 15:10:41 +00:00
|
|
|
to:main::@4
|
|
|
|
main::@4: scope:[main] from main::@3
|
2019-03-29 23:15:53 +00:00
|
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2019-03-31 15:10:41 +00:00
|
|
|
to:main::@5
|
|
|
|
main::@5: scope:[main] from main::@4 main::@5
|
2020-03-29 19:00:25 +00:00
|
|
|
[30] (byte) main::rst#1 ← *((const nomodify byte*) RASTER)
|
2019-11-03 23:39:09 +00:00
|
|
|
[31] (byte~) main::$3 ← (byte) main::rst#1 & (byte) 7
|
2020-03-29 19:00:25 +00:00
|
|
|
[32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3
|
|
|
|
[33] *((const nomodify byte*) VIC_CONTROL) ← (byte~) main::$4
|
2019-11-03 23:39:09 +00:00
|
|
|
[34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4
|
2020-03-29 19:00:25 +00:00
|
|
|
[35] *((const nomodify byte*) BORDERCOL) ← (byte~) main::$5
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2019-05-30 20:29:04 +00:00
|
|
|
[37] if((byte) main::rst#1!=(byte) $f2) goto main::@5
|
2019-03-31 15:57:54 +00:00
|
|
|
to:main::@2
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) gfx_init_chunky()
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky: scope:[gfx_init_chunky] from main
|
2018-11-11 20:51:36 +00:00
|
|
|
[38] phi()
|
|
|
|
[39] call dtvSetCpuBankSegment1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@1
|
|
|
|
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky gfx_init_chunky::@5
|
2020-03-29 19:00:25 +00:00
|
|
|
[40] (byte) gfx_init_chunky::gfxbCpuBank#7 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky/++(byte)(const nomodify byte*) CHUNKY/(word) $4000 )
|
2019-05-30 20:29:04 +00:00
|
|
|
[40] (byte) gfx_init_chunky::y#6 ← phi( gfx_init_chunky::@5/(byte) gfx_init_chunky::y#1 gfx_init_chunky/(byte) 0 )
|
|
|
|
[40] (byte*) gfx_init_chunky::gfxb#5 ← phi( gfx_init_chunky::@5/(byte*) gfx_init_chunky::gfxb#1 gfx_init_chunky/(byte*) 16384 )
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@2
|
|
|
|
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
|
2018-11-11 20:51:36 +00:00
|
|
|
[41] (byte) gfx_init_chunky::gfxbCpuBank#4 ← phi( gfx_init_chunky::@1/(byte) gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::@3/(byte) gfx_init_chunky::gfxbCpuBank#8 )
|
2019-06-02 22:44:46 +00:00
|
|
|
[41] (word) gfx_init_chunky::x#2 ← phi( gfx_init_chunky::@1/(word) 0 gfx_init_chunky::@3/(word) gfx_init_chunky::x#1 )
|
2018-11-11 20:51:36 +00:00
|
|
|
[41] (byte*) gfx_init_chunky::gfxb#3 ← phi( gfx_init_chunky::@1/(byte*) gfx_init_chunky::gfxb#5 gfx_init_chunky::@3/(byte*) gfx_init_chunky::gfxb#1 )
|
2019-05-30 20:29:04 +00:00
|
|
|
[42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@4
|
|
|
|
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
|
2018-11-11 20:51:36 +00:00
|
|
|
[43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4
|
|
|
|
[44] call dtvSetCpuBankSegment1
|
2019-03-31 15:10:41 +00:00
|
|
|
to:gfx_init_chunky::@7
|
|
|
|
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky::@4
|
2018-11-11 20:51:36 +00:00
|
|
|
[45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@3
|
2019-03-31 15:10:41 +00:00
|
|
|
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@7
|
|
|
|
[46] (byte) gfx_init_chunky::gfxbCpuBank#8 ← phi( gfx_init_chunky::@2/(byte) gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::@7/(byte) gfx_init_chunky::gfxbCpuBank#2 )
|
2019-05-30 20:29:04 +00:00
|
|
|
[46] (byte*) gfx_init_chunky::gfxb#4 ← phi( gfx_init_chunky::@2/(byte*) gfx_init_chunky::gfxb#3 gfx_init_chunky::@7/(byte*) 16384 )
|
2019-11-03 23:39:09 +00:00
|
|
|
[47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6
|
|
|
|
[48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5
|
2018-11-11 20:51:36 +00:00
|
|
|
[49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0
|
|
|
|
[50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4
|
|
|
|
[51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2
|
2019-05-30 20:29:04 +00:00
|
|
|
[52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@5
|
|
|
|
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
|
2018-11-11 20:51:36 +00:00
|
|
|
[53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6
|
2019-05-30 20:29:04 +00:00
|
|
|
[54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@6
|
|
|
|
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
|
2018-11-11 20:51:36 +00:00
|
|
|
[55] phi()
|
|
|
|
[56] call dtvSetCpuBankSegment1
|
2018-04-15 21:32:49 +00:00
|
|
|
to:gfx_init_chunky::@return
|
|
|
|
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@6
|
2018-11-11 20:51:36 +00:00
|
|
|
[57] return
|
2018-04-15 21:32:49 +00:00
|
|
|
to:@return
|
2019-09-18 21:00:30 +00:00
|
|
|
|
|
|
|
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
|
2020-03-29 19:00:25 +00:00
|
|
|
[58] (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 ← phi( gfx_init_chunky/(byte)(const nomodify byte*) CHUNKY/(word) $4000 gfx_init_chunky::@4/(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 gfx_init_chunky::@6/(byte)(number) $4000/(number) $4000 )
|
2019-09-29 20:36:00 +00:00
|
|
|
[59] *((const byte*) dtvSetCpuBankSegment1::cpuBank) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3
|
2018-04-15 21:32:49 +00:00
|
|
|
asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
|
|
to:dtvSetCpuBankSegment1::@return
|
|
|
|
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
|
2018-11-11 20:51:36 +00:00
|
|
|
[61] return
|
2018-04-15 21:32:49 +00:00
|
|
|
to:@return
|
|
|
|
|
|
|
|
|
|
|
|
VARIABLE REGISTER WEIGHTS
|
2020-04-26 21:30:04 +00:00
|
|
|
(byte) MOS6526_CIA::INTERRUPT
|
|
|
|
(byte) MOS6526_CIA::PORT_A
|
|
|
|
(byte) MOS6526_CIA::PORT_A_DDR
|
|
|
|
(byte) MOS6526_CIA::PORT_B
|
|
|
|
(byte) MOS6526_CIA::PORT_B_DDR
|
|
|
|
(byte) MOS6526_CIA::SERIAL_DATA
|
|
|
|
(word) MOS6526_CIA::TIMER_A
|
|
|
|
(byte) MOS6526_CIA::TIMER_A_CONTROL
|
|
|
|
(word) MOS6526_CIA::TIMER_B
|
|
|
|
(byte) MOS6526_CIA::TIMER_B_CONTROL
|
|
|
|
(byte) MOS6526_CIA::TOD_10THS
|
|
|
|
(byte) MOS6526_CIA::TOD_HOURS
|
|
|
|
(byte) MOS6526_CIA::TOD_MIN
|
|
|
|
(byte) MOS6526_CIA::TOD_SEC
|
2020-04-28 20:58:16 +00:00
|
|
|
(byte) MOS6569_VICII::BG_COLOR
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR1
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR2
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR3
|
|
|
|
(byte) MOS6569_VICII::BORDER_COLOR
|
|
|
|
(byte) MOS6569_VICII::CONTROL1
|
|
|
|
(byte) MOS6569_VICII::CONTROL2
|
|
|
|
(byte) MOS6569_VICII::IRQ_ENABLE
|
|
|
|
(byte) MOS6569_VICII::IRQ_STATUS
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_X
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_Y
|
|
|
|
(byte) MOS6569_VICII::MEMORY
|
|
|
|
(byte) MOS6569_VICII::RASTER
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE0_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE1_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE2_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE3_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE4_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE5_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE6_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_COLOR
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_X
|
|
|
|
(byte) MOS6569_VICII::SPRITE7_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITES_BG_COLLISION
|
|
|
|
(byte) MOS6569_VICII::SPRITES_COLLISION
|
|
|
|
(byte) MOS6569_VICII::SPRITES_ENABLE
|
|
|
|
(byte) MOS6569_VICII::SPRITES_EXPAND_X
|
|
|
|
(byte) MOS6569_VICII::SPRITES_EXPAND_Y
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MC
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MCOLOR1
|
|
|
|
(byte) MOS6569_VICII::SPRITES_MCOLOR2
|
|
|
|
(byte) MOS6569_VICII::SPRITES_PRIORITY
|
|
|
|
(byte) MOS6569_VICII::SPRITES_XMSB
|
2020-04-27 22:30:35 +00:00
|
|
|
(byte) MOS6581_SID::CH1_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH1_CONTROL
|
|
|
|
(word) MOS6581_SID::CH1_FREQ
|
|
|
|
(word) MOS6581_SID::CH1_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH1_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::CH2_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH2_CONTROL
|
|
|
|
(word) MOS6581_SID::CH2_FREQ
|
|
|
|
(word) MOS6581_SID::CH2_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH2_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::CH3_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH3_CONTROL
|
|
|
|
(byte) MOS6581_SID::CH3_ENV
|
|
|
|
(word) MOS6581_SID::CH3_FREQ
|
|
|
|
(byte) MOS6581_SID::CH3_OSC
|
|
|
|
(word) MOS6581_SID::CH3_PULSE_WIDTH
|
|
|
|
(byte) MOS6581_SID::CH3_SUSTAIN_RELEASE
|
|
|
|
(byte) MOS6581_SID::FILTER_CUTOFF_HIGH
|
|
|
|
(byte) MOS6581_SID::FILTER_CUTOFF_LOW
|
|
|
|
(byte) MOS6581_SID::FILTER_SETUP
|
|
|
|
(byte) MOS6581_SID::POT_X
|
|
|
|
(byte) MOS6581_SID::POT_Y
|
|
|
|
(byte) MOS6581_SID::VOLUME_FILTER_MODE
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 20002.0
|
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 110002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) gfx_init_chunky()
|
2020-03-22 21:26:39 +00:00
|
|
|
(word~) gfx_init_chunky::$5 10001.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) gfx_init_chunky::c
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::c#0 20002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb#1 4200.6
|
|
|
|
(byte*) gfx_init_chunky::gfxb#3 15502.0
|
|
|
|
(byte*) gfx_init_chunky::gfxb#4 7500.75
|
|
|
|
(byte*) gfx_init_chunky::gfxb#5 2002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#2 20002.0
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#4 10251.25
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#7 2002.0
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#8 3444.8888888888887
|
2018-04-15 21:32:49 +00:00
|
|
|
(word) gfx_init_chunky::x
|
2020-03-22 21:26:39 +00:00
|
|
|
(word) gfx_init_chunky::x#1 15001.5
|
|
|
|
(word) gfx_init_chunky::x#2 3000.3
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) gfx_init_chunky::y
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::y#1 1501.5
|
|
|
|
(byte) gfx_init_chunky::y#6 923.3076923076923
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) main()
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte~) main::$3 2002.0
|
|
|
|
(byte~) main::$4 2002.0
|
|
|
|
(byte~) main::$5 2002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) main::j
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) main::j#1 151.5
|
|
|
|
(byte) main::j#2 202.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) main::rst
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) main::rst#1 572.0
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
Initial phi equivalence classes
|
|
|
|
[ main::j#2 main::j#1 ]
|
|
|
|
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
|
|
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
|
|
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
|
|
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
|
|
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
2019-12-08 15:04:35 +00:00
|
|
|
Added variable main::rst#1 to live range equivalence class [ main::rst#1 ]
|
|
|
|
Added variable main::$3 to live range equivalence class [ main::$3 ]
|
|
|
|
Added variable main::$4 to live range equivalence class [ main::$4 ]
|
|
|
|
Added variable main::$5 to live range equivalence class [ main::$5 ]
|
|
|
|
Added variable gfx_init_chunky::$5 to live range equivalence class [ gfx_init_chunky::$5 ]
|
|
|
|
Added variable gfx_init_chunky::c#0 to live range equivalence class [ gfx_init_chunky::c#0 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
Complete equivalence classes
|
|
|
|
[ main::j#2 main::j#1 ]
|
|
|
|
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
|
|
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
|
|
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
|
|
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
|
|
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
|
|
[ main::rst#1 ]
|
2019-11-03 23:39:09 +00:00
|
|
|
[ main::$3 ]
|
|
|
|
[ main::$4 ]
|
|
|
|
[ main::$5 ]
|
|
|
|
[ gfx_init_chunky::$5 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
[ gfx_init_chunky::c#0 ]
|
2019-10-12 09:40:36 +00:00
|
|
|
Allocated zp[1]:2 [ main::j#2 main::j#1 ]
|
|
|
|
Allocated zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
|
|
Allocated zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
|
|
Allocated zp[1]:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
|
|
Allocated zp[2]:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
|
|
Allocated zp[1]:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
|
|
Allocated zp[1]:10 [ main::rst#1 ]
|
2019-11-03 23:39:09 +00:00
|
|
|
Allocated zp[1]:11 [ main::$3 ]
|
|
|
|
Allocated zp[1]:12 [ main::$4 ]
|
|
|
|
Allocated zp[1]:13 [ main::$5 ]
|
|
|
|
Allocated zp[2]:14 [ gfx_init_chunky::$5 ]
|
2019-10-12 09:40:36 +00:00
|
|
|
Allocated zp[1]:16 [ gfx_init_chunky::c#0 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
INITIAL ASM
|
2019-09-08 00:29:17 +00:00
|
|
|
Target platform is c64basic / MOS6502X
|
2019-07-08 14:43:09 +00:00
|
|
|
// File Comments
|
2019-02-17 23:12:29 +00:00
|
|
|
// C64DTV 8bpp charmode stretcher
|
2019-07-25 15:06:17 +00:00
|
|
|
// Upstart
|
2018-04-15 21:32:49 +00:00
|
|
|
.pc = $801 "Basic"
|
2019-09-29 21:13:37 +00:00
|
|
|
:BasicUpstart(__bbegin)
|
2018-04-15 21:32:49 +00:00
|
|
|
.pc = $80d "Program"
|
2019-07-08 14:43:09 +00:00
|
|
|
// Global Constants & labels
|
2018-04-15 21:32:49 +00:00
|
|
|
.label RASTER = $d012
|
|
|
|
.label BORDERCOL = $d020
|
|
|
|
.label VIC_CONTROL = $d011
|
|
|
|
.const VIC_ECM = $40
|
|
|
|
.const VIC_DEN = $10
|
|
|
|
.const VIC_RSEL = 8
|
|
|
|
.label VIC_CONTROL2 = $d016
|
|
|
|
.const VIC_MCM = $10
|
|
|
|
.const VIC_CSEL = 8
|
|
|
|
.label VIC_MEMORY = $d018
|
2020-04-28 20:58:16 +00:00
|
|
|
// Processor port data direction register
|
|
|
|
.label PROCPORT_DDR = 0
|
|
|
|
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
|
|
|
.const PROCPORT_DDR_MEMORY_MASK = 7
|
|
|
|
// Processor Port Register controlling RAM/ROM configuration and the datasette
|
|
|
|
.label PROCPORT = 1
|
|
|
|
// RAM in 0xA000, 0xE000 I/O in 0xD000
|
|
|
|
.const PROCPORT_RAM_IO = 5
|
2020-04-26 21:30:04 +00:00
|
|
|
// The CIA#2: Serial bus, RS-232, VIC memory bank
|
|
|
|
.label CIA2 = $dd00
|
2019-02-17 23:12:29 +00:00
|
|
|
// Feature enables or disables the extra C64 DTV features
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_FEATURE = $d03f
|
|
|
|
.const DTV_FEATURE_ENABLE = 1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Controls the graphics modes of the C64 DTV
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_CONTROL = $d03c
|
|
|
|
.const DTV_LINEAR = 1
|
|
|
|
.const DTV_HIGHCOLOR = 4
|
|
|
|
.const DTV_COLORRAM_OFF = $10
|
|
|
|
.const DTV_BADLINE_OFF = $20
|
|
|
|
.const DTV_CHUNKY = $40
|
2019-02-17 23:12:29 +00:00
|
|
|
// Defines colors for the 16 first colors ($00-$0f)
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PALETTE = $d200
|
2019-02-17 23:12:29 +00:00
|
|
|
// Linear Graphics Plane B Counter Control
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PLANEB_START_LO = $d049
|
|
|
|
.label DTV_PLANEB_START_MI = $d04a
|
|
|
|
.label DTV_PLANEB_START_HI = $d04b
|
|
|
|
.label DTV_PLANEB_STEP = $d04c
|
|
|
|
.label DTV_PLANEB_MODULO_LO = $d047
|
|
|
|
.label DTV_PLANEB_MODULO_HI = $d048
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane with all pixels
|
2018-04-15 21:32:49 +00:00
|
|
|
.label CHUNKY = $8000
|
2020-04-26 21:30:04 +00:00
|
|
|
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
2019-07-08 14:43:09 +00:00
|
|
|
// @begin
|
2019-09-29 21:13:37 +00:00
|
|
|
__bbegin:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [1] phi from @begin to @1 [phi:@begin->@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___bbegin:
|
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// @1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [2] call main
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr main
|
2019-07-08 14:43:09 +00:00
|
|
|
// [3] phi from @1 to @end [phi:@1->@end]
|
2019-09-29 21:13:37 +00:00
|
|
|
__bend_from___b1:
|
|
|
|
jmp __bend
|
2019-07-08 14:43:09 +00:00
|
|
|
// @end
|
2019-09-29 21:13:37 +00:00
|
|
|
__bend:
|
2019-07-08 14:43:09 +00:00
|
|
|
// main
|
2018-04-15 21:32:49 +00:00
|
|
|
main: {
|
2019-11-03 23:39:09 +00:00
|
|
|
.label __3 = $b
|
|
|
|
.label __4 = $c
|
|
|
|
.label __5 = $d
|
2018-04-15 21:32:49 +00:00
|
|
|
.label j = 2
|
|
|
|
.label rst = $a
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { sei }
|
2018-04-15 21:32:49 +00:00
|
|
|
sei
|
2020-03-29 19:00:25 +00:00
|
|
|
// [5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
|
|
|
|
// Disable kernal & basic
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_DDR_MEMORY_MASK
|
|
|
|
sta PROCPORT_DDR
|
2020-03-29 19:00:25 +00:00
|
|
|
// [6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_RAM_IO
|
|
|
|
sta PROCPORT
|
2019-07-08 14:43:09 +00:00
|
|
|
// [7] call gfx_init_chunky
|
|
|
|
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky_from_main:
|
|
|
|
jsr gfx_init_chunky
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b6
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@6
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Enable DTV extended modes
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_FEATURE_ENABLE
|
|
|
|
sta DTV_FEATURE
|
2020-03-29 19:00:25 +00:00
|
|
|
// [9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// 8BPP Pixel Cell Mode
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
|
|
sta DTV_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_MCM|VIC_CSEL
|
|
|
|
sta VIC_CONTROL2
|
2020-03-29 19:00:25 +00:00
|
|
|
// [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane B: CHUNKY
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta DTV_PLANEB_START_LO
|
2020-03-29 19:00:25 +00:00
|
|
|
// [13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>CHUNKY
|
|
|
|
sta DTV_PLANEB_START_MI
|
2020-03-29 19:00:25 +00:00
|
|
|
// [14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_START_HI
|
2020-03-29 19:00:25 +00:00
|
|
|
// [15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #8
|
|
|
|
sta DTV_PLANEB_STEP
|
2020-03-29 19:00:25 +00:00
|
|
|
// [16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_MODULO_LO
|
2020-03-29 19:00:25 +00:00
|
|
|
// [17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_MODULO_HI
|
2020-04-26 21:30:04 +00:00
|
|
|
// [18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// VIC Graphics Bank
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
|
|
|
// [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank bits to output - all others to input
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3^CHUNKY/$4000
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2
|
2020-03-29 19:00:25 +00:00
|
|
|
// [20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank
|
|
|
|
// VIC memory
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_MEMORY
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z j
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-02-17 23:12:29 +00:00
|
|
|
// DTV Palette - Grey Tones
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [22] *((const nomodify byte*) DTV_PALETTE + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuz1=vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
ldy.z j
|
2018-04-15 21:32:49 +00:00
|
|
|
tya
|
|
|
|
sta DTV_PALETTE,y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuz1=_inc_vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z j
|
2019-07-08 14:43:09 +00:00
|
|
|
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuz1_neq_vbuc1_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$10
|
2019-08-07 19:00:19 +00:00
|
|
|
cmp.z j
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1_from___b1
|
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
2019-02-17 23:12:29 +00:00
|
|
|
// Stabilize Raster
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #$ff
|
|
|
|
rff:
|
|
|
|
cpx RASTER
|
|
|
|
bne rff
|
|
|
|
stabilize:
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
cpx RASTER
|
|
|
|
beq eat+0
|
|
|
|
eat:
|
|
|
|
inx
|
|
|
|
cpx #8
|
|
|
|
bne stabilize
|
2020-03-29 19:00:25 +00:00
|
|
|
// [26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [27] *((const nomodify byte*) BORDERCOL) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta BORDERCOL
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$42
|
|
|
|
cmp RASTER
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3
|
|
|
|
jmp __b4
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@4
|
2019-09-29 21:13:37 +00:00
|
|
|
__b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@5
|
2019-09-29 21:13:37 +00:00
|
|
|
__b5:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [30] (byte) main::rst#1 ← *((const nomodify byte*) RASTER) -- vbuz1=_deref_pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda RASTER
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z rst
|
2019-11-03 23:39:09 +00:00
|
|
|
// [31] (byte~) main::$3 ← (byte) main::rst#1 & (byte) 7 -- vbuz1=vbuz2_band_vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #7
|
2019-08-07 19:00:19 +00:00
|
|
|
and.z rst
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __3
|
2020-03-29 19:00:25 +00:00
|
|
|
// [32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3 -- vbuz1=vbuc1_bor_vbuz2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL
|
2019-11-03 23:39:09 +00:00
|
|
|
ora.z __3
|
|
|
|
sta.z __4
|
2020-03-29 19:00:25 +00:00
|
|
|
// [33] *((const nomodify byte*) VIC_CONTROL) ← (byte~) main::$4 -- _deref_pbuc1=vbuz1
|
2019-11-03 23:39:09 +00:00
|
|
|
lda.z __4
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_CONTROL
|
2019-11-03 23:39:09 +00:00
|
|
|
// [34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4 -- vbuz1=vbuz2_rol_4
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z rst
|
2018-04-15 21:32:49 +00:00
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5
|
2020-03-29 19:00:25 +00:00
|
|
|
// [35] *((const nomodify byte*) BORDERCOL) ← (byte~) main::$5 -- _deref_pbuc1=vbuz1
|
2019-11-03 23:39:09 +00:00
|
|
|
lda.z __5
|
2018-04-15 21:32:49 +00:00
|
|
|
sta BORDERCOL
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-07-08 14:43:09 +00:00
|
|
|
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuz1_neq_vbuc1_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$f2
|
2019-08-07 19:00:19 +00:00
|
|
|
cmp.z rst
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b5
|
|
|
|
jmp __b2
|
2018-04-15 21:32:49 +00:00
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky
|
2019-02-17 23:12:29 +00:00
|
|
|
// Initialize Plane with 8bpp chunky
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky: {
|
2019-11-03 23:39:09 +00:00
|
|
|
.label __5 = $e
|
2018-04-15 21:32:49 +00:00
|
|
|
.label c = $10
|
|
|
|
.label gfxb = 7
|
|
|
|
.label x = 4
|
2019-11-23 22:46:46 +00:00
|
|
|
// 320x200 8bpp pixels for Plane
|
2018-04-15 21:32:49 +00:00
|
|
|
.label gfxbCpuBank = 6
|
|
|
|
.label y = 3
|
2019-07-08 14:43:09 +00:00
|
|
|
// [39] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1_from_gfx_init_chunky:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuz1=vbuc1
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #CHUNKY/$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z dtvSetCpuBankSegment1.cpuBankIdx
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from_gfx_init_chunky:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #($ff&CHUNKY/$4000)+1
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxbCpuBank
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b5:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
|
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
|
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2_from___b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
|
2019-06-02 22:44:46 +00:00
|
|
|
lda #<0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z x
|
2019-06-02 22:44:46 +00:00
|
|
|
lda #>0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z x+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2_from___b3:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
|
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3_from___b2
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3_from___b2
|
|
|
|
jmp __b4
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@4
|
2019-09-29 21:13:37 +00:00
|
|
|
__b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuz1=vbuz2
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxbCpuBank
|
|
|
|
sta.z dtvSetCpuBankSegment1.cpuBankIdx
|
2019-07-08 14:43:09 +00:00
|
|
|
// [44] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
|
2019-09-29 21:13:37 +00:00
|
|
|
dtvSetCpuBankSegment1_from___b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b7
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@7
|
2019-09-29 21:13:37 +00:00
|
|
|
__b7:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuz1=_inc_vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxbCpuBank
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3_from___b7:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3_from___b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2019-11-03 23:39:09 +00:00
|
|
|
// [47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z y
|
2018-04-15 21:32:49 +00:00
|
|
|
clc
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x+1
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5+1
|
|
|
|
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5 -- vbuz1=_byte_vwuz2
|
|
|
|
lda.z __5
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z c
|
2019-07-08 14:43:09 +00:00
|
|
|
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuz2
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z c
|
2018-04-15 21:32:49 +00:00
|
|
|
ldy #0
|
|
|
|
sta (gfxb),y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2_from___b3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2_from___b3
|
|
|
|
jmp __b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@5
|
2019-09-29 21:13:37 +00:00
|
|
|
__b5:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$33
|
2019-08-07 19:00:19 +00:00
|
|
|
cmp.z y
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1_from___b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6_from___b5:
|
|
|
|
jmp __b6
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@6
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [56] call dtvSetCpuBankSegment1
|
2020-03-07 21:38:40 +00:00
|
|
|
// Reset CPU BANK segment to $4000
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
|
2019-09-29 21:13:37 +00:00
|
|
|
dtvSetCpuBankSegment1_from___b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #$4000/$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z dtvSetCpuBankSegment1.cpuBankIdx
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __breturn
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@return
|
2019-09-29 21:13:37 +00:00
|
|
|
__breturn:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [57] return
|
2018-04-15 21:32:49 +00:00
|
|
|
rts
|
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
|
|
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
|
|
|
|
// The actual memory addressed will be $4000*cpuSegmentIdx
|
2019-12-26 08:51:41 +00:00
|
|
|
// dtvSetCpuBankSegment1(byte zp(9) cpuBankIdx)
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1: {
|
2019-02-17 23:12:29 +00:00
|
|
|
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
|
2018-04-15 21:32:49 +00:00
|
|
|
.label cpuBank = $ff
|
|
|
|
.label cpuBankIdx = 9
|
2019-09-29 20:36:00 +00:00
|
|
|
// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z cpuBankIdx
|
2018-04-15 21:32:49 +00:00
|
|
|
sta cpuBank
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
2018-04-15 21:32:49 +00:00
|
|
|
.byte $32, $dd
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z $ff
|
2018-04-15 21:32:49 +00:00
|
|
|
.byte $32, $00
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __breturn
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1::@return
|
2019-09-29 21:13:37 +00:00
|
|
|
__breturn:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [61] return
|
2018-04-15 21:32:49 +00:00
|
|
|
rts
|
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// File Data
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
REGISTER UPLIFT POTENTIAL REGISTERS
|
2020-03-29 19:00:25 +00:00
|
|
|
Statement [5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2020-04-26 21:30:04 +00:00
|
|
|
Statement [18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
|
|
Statement [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2020-03-29 19:00:25 +00:00
|
|
|
Statement [20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2018-04-15 21:32:49 +00:00
|
|
|
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
|
2020-03-29 19:00:25 +00:00
|
|
|
Statement [26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [27] *((const nomodify byte*) BORDERCOL) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3 [ main::rst#1 main::$4 ] ( main:2 [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
|
2019-10-12 09:40:36 +00:00
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|
|
Removing always clobbered register reg byte a as potential for zp[1]:10 [ main::rst#1 ]
|
2020-03-22 23:10:07 +00:00
|
|
|
Statement [34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4 [ main::rst#1 main::$5 ] ( main:2 [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a
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Statement [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a
|
2019-10-12 09:40:36 +00:00
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|
Removing always clobbered register reg byte a as potential for zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
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Removing always clobbered register reg byte a as potential for zp[1]:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
2020-03-22 23:10:07 +00:00
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Statement [47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] { } ) always clobbers reg byte a
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Statement [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] { } ) always clobbers reg byte a
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Statement [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] { } ) always clobbers reg byte y
|
2019-10-12 09:40:36 +00:00
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|
Removing always clobbered register reg byte y as potential for zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
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Removing always clobbered register reg byte y as potential for zp[1]:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
2020-03-22 23:10:07 +00:00
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Statement [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] { } ) always clobbers reg byte a
|
2018-04-15 21:32:49 +00:00
|
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Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
|
2020-03-29 19:00:25 +00:00
|
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|
Statement [5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
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|
Statement [17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2020-04-26 21:30:04 +00:00
|
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|
Statement [18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2020-03-29 19:00:25 +00:00
|
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|
Statement [20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2018-04-15 21:32:49 +00:00
|
|
|
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
|
2020-03-29 19:00:25 +00:00
|
|
|
Statement [26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
|
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|
Statement [27] *((const nomodify byte*) BORDERCOL) ← (byte) 0 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
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Statement [28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3 [ ] ( main:2 [ ] { } ) always clobbers reg byte a
|
2020-03-22 23:10:07 +00:00
|
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Statement [31] (byte~) main::$3 ← (byte) main::rst#1 & (byte) 7 [ main::rst#1 main::$3 ] ( main:2 [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a
|
2020-03-29 19:00:25 +00:00
|
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Statement [32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3 [ main::rst#1 main::$4 ] ( main:2 [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
|
2020-03-22 23:10:07 +00:00
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Statement [34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4 [ main::rst#1 main::$5 ] ( main:2 [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a
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Statement [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a
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Statement [47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] { } ) always clobbers reg byte a
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Statement [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::c#0 ] { } ) always clobbers reg byte a
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Statement [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] { } ) always clobbers reg byte y
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Statement [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( main:2::gfx_init_chunky:7 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] { } ) always clobbers reg byte a
|
2018-04-15 21:32:49 +00:00
|
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|
Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
|
2019-10-12 09:40:36 +00:00
|
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|
Potential registers zp[1]:2 [ main::j#2 main::j#1 ] : zp[1]:2 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ] : zp[1]:3 , reg byte x ,
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Potential registers zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] : zp[2]:4 ,
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Potential registers zp[1]:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] : zp[1]:6 , reg byte x ,
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Potential registers zp[2]:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] : zp[2]:7 ,
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Potential registers zp[1]:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ] : zp[1]:9 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:10 [ main::rst#1 ] : zp[1]:10 , reg byte x , reg byte y ,
|
2019-11-03 23:39:09 +00:00
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Potential registers zp[1]:11 [ main::$3 ] : zp[1]:11 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:12 [ main::$4 ] : zp[1]:12 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:13 [ main::$5 ] : zp[1]:13 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[2]:14 [ gfx_init_chunky::$5 ] : zp[2]:14 ,
|
2019-10-12 09:40:36 +00:00
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Potential registers zp[1]:16 [ gfx_init_chunky::c#0 ] : zp[1]:16 , reg byte a , reg byte x , reg byte y ,
|
2018-04-15 21:32:49 +00:00
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REGISTER UPLIFT SCOPES
|
2020-03-22 21:26:39 +00:00
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Uplift Scope [dtvSetCpuBankSegment1] 130,004: zp[1]:9 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
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Uplift Scope [gfx_init_chunky] 35,700.14: zp[1]:6 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] 29,205.35: zp[2]:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] 20,002: zp[1]:16 [ gfx_init_chunky::c#0 ] 18,001.8: zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] 10,001: zp[2]:14 [ gfx_init_chunky::$5 ] 2,424.81: zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
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Uplift Scope [main] 2,002: zp[1]:11 [ main::$3 ] 2,002: zp[1]:12 [ main::$4 ] 2,002: zp[1]:13 [ main::$5 ] 572: zp[1]:10 [ main::rst#1 ] 353.5: zp[1]:2 [ main::j#2 main::j#1 ]
|
2020-04-26 21:30:04 +00:00
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Uplift Scope [MOS6526_CIA]
|
2020-04-28 20:58:16 +00:00
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Uplift Scope [MOS6569_VICII]
|
2020-04-27 22:30:35 +00:00
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Uplift Scope [MOS6581_SID]
|
2018-04-15 21:32:49 +00:00
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Uplift Scope []
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|
2020-03-22 21:26:39 +00:00
|
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|
Uplifting [dtvSetCpuBankSegment1] best 26171 combination reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
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Uplifting [gfx_init_chunky] best 25141 combination reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] zp[2]:7 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] reg byte a [ gfx_init_chunky::c#0 ] zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] zp[2]:14 [ gfx_init_chunky::$5 ] zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
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Uplifting [main] best 22541 combination reg byte a [ main::$3 ] reg byte a [ main::$4 ] reg byte a [ main::$5 ] reg byte x [ main::rst#1 ] zp[1]:2 [ main::j#2 main::j#1 ]
|
2018-04-15 21:32:49 +00:00
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Limited combination testing to 100 combinations of 768 possible.
|
2020-04-26 21:30:04 +00:00
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Uplifting [MOS6526_CIA] best 22541 combination
|
2020-04-28 20:58:16 +00:00
|
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Uplifting [MOS6569_VICII] best 22541 combination
|
2020-04-27 22:30:35 +00:00
|
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Uplifting [MOS6581_SID] best 22541 combination
|
2018-04-18 21:19:25 +00:00
|
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Uplifting [] best 22541 combination
|
2020-03-22 21:26:39 +00:00
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Attempting to uplift remaining variables inzp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
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Uplifting [gfx_init_chunky] best 22541 combination zp[1]:3 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
2019-10-12 09:40:36 +00:00
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Attempting to uplift remaining variables inzp[1]:2 [ main::j#2 main::j#1 ]
|
2018-04-18 21:19:25 +00:00
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Uplifting [main] best 22421 combination reg byte x [ main::j#2 main::j#1 ]
|
2019-10-12 09:40:36 +00:00
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Allocated (was zp[1]:3) zp[1]:2 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
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Allocated (was zp[2]:4) zp[2]:3 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
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Allocated (was zp[2]:7) zp[2]:5 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
2019-11-03 23:39:09 +00:00
|
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|
Allocated (was zp[2]:14) zp[2]:7 [ gfx_init_chunky::$5 ]
|
2018-04-15 21:32:49 +00:00
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|
ASSEMBLER BEFORE OPTIMIZATION
|
2019-07-08 14:43:09 +00:00
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// File Comments
|
2019-02-17 23:12:29 +00:00
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|
// C64DTV 8bpp charmode stretcher
|
2019-07-25 15:06:17 +00:00
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// Upstart
|
2018-04-15 21:32:49 +00:00
|
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|
.pc = $801 "Basic"
|
2019-09-29 21:13:37 +00:00
|
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|
:BasicUpstart(__bbegin)
|
2018-04-15 21:32:49 +00:00
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|
.pc = $80d "Program"
|
2019-07-08 14:43:09 +00:00
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|
|
// Global Constants & labels
|
2018-04-15 21:32:49 +00:00
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|
.label RASTER = $d012
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|
.label BORDERCOL = $d020
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|
.label VIC_CONTROL = $d011
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|
.const VIC_ECM = $40
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|
.const VIC_DEN = $10
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|
.const VIC_RSEL = 8
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|
.label VIC_CONTROL2 = $d016
|
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|
.const VIC_MCM = $10
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|
.const VIC_CSEL = 8
|
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|
.label VIC_MEMORY = $d018
|
2020-04-28 20:58:16 +00:00
|
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|
// Processor port data direction register
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|
|
|
.label PROCPORT_DDR = 0
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|
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
|
|
|
.const PROCPORT_DDR_MEMORY_MASK = 7
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|
// Processor Port Register controlling RAM/ROM configuration and the datasette
|
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|
.label PROCPORT = 1
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|
// RAM in 0xA000, 0xE000 I/O in 0xD000
|
|
|
|
.const PROCPORT_RAM_IO = 5
|
2020-04-26 21:30:04 +00:00
|
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|
// The CIA#2: Serial bus, RS-232, VIC memory bank
|
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|
.label CIA2 = $dd00
|
2019-02-17 23:12:29 +00:00
|
|
|
// Feature enables or disables the extra C64 DTV features
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_FEATURE = $d03f
|
|
|
|
.const DTV_FEATURE_ENABLE = 1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Controls the graphics modes of the C64 DTV
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_CONTROL = $d03c
|
|
|
|
.const DTV_LINEAR = 1
|
|
|
|
.const DTV_HIGHCOLOR = 4
|
|
|
|
.const DTV_COLORRAM_OFF = $10
|
|
|
|
.const DTV_BADLINE_OFF = $20
|
|
|
|
.const DTV_CHUNKY = $40
|
2019-02-17 23:12:29 +00:00
|
|
|
// Defines colors for the 16 first colors ($00-$0f)
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PALETTE = $d200
|
2019-02-17 23:12:29 +00:00
|
|
|
// Linear Graphics Plane B Counter Control
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PLANEB_START_LO = $d049
|
|
|
|
.label DTV_PLANEB_START_MI = $d04a
|
|
|
|
.label DTV_PLANEB_START_HI = $d04b
|
|
|
|
.label DTV_PLANEB_STEP = $d04c
|
|
|
|
.label DTV_PLANEB_MODULO_LO = $d047
|
|
|
|
.label DTV_PLANEB_MODULO_HI = $d048
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane with all pixels
|
2018-04-15 21:32:49 +00:00
|
|
|
.label CHUNKY = $8000
|
2020-04-26 21:30:04 +00:00
|
|
|
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
2019-07-08 14:43:09 +00:00
|
|
|
// @begin
|
2019-09-29 21:13:37 +00:00
|
|
|
__bbegin:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [1] phi from @begin to @1 [phi:@begin->@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___bbegin:
|
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// @1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [2] call main
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr main
|
2019-07-08 14:43:09 +00:00
|
|
|
// [3] phi from @1 to @end [phi:@1->@end]
|
2019-09-29 21:13:37 +00:00
|
|
|
__bend_from___b1:
|
|
|
|
jmp __bend
|
2019-07-08 14:43:09 +00:00
|
|
|
// @end
|
2019-09-29 21:13:37 +00:00
|
|
|
__bend:
|
2019-07-08 14:43:09 +00:00
|
|
|
// main
|
2018-04-15 21:32:49 +00:00
|
|
|
main: {
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { sei }
|
2018-04-15 21:32:49 +00:00
|
|
|
sei
|
2020-03-29 19:00:25 +00:00
|
|
|
// [5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
|
|
|
|
// Disable kernal & basic
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_DDR_MEMORY_MASK
|
|
|
|
sta PROCPORT_DDR
|
2020-03-29 19:00:25 +00:00
|
|
|
// [6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_RAM_IO
|
|
|
|
sta PROCPORT
|
2019-07-08 14:43:09 +00:00
|
|
|
// [7] call gfx_init_chunky
|
|
|
|
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky_from_main:
|
|
|
|
jsr gfx_init_chunky
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b6
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@6
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Enable DTV extended modes
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_FEATURE_ENABLE
|
|
|
|
sta DTV_FEATURE
|
2020-03-29 19:00:25 +00:00
|
|
|
// [9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// 8BPP Pixel Cell Mode
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
|
|
sta DTV_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_MCM|VIC_CSEL
|
|
|
|
sta VIC_CONTROL2
|
2020-03-29 19:00:25 +00:00
|
|
|
// [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane B: CHUNKY
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta DTV_PLANEB_START_LO
|
2020-03-29 19:00:25 +00:00
|
|
|
// [13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>CHUNKY
|
|
|
|
sta DTV_PLANEB_START_MI
|
2020-03-29 19:00:25 +00:00
|
|
|
// [14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_START_HI
|
2020-03-29 19:00:25 +00:00
|
|
|
// [15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #8
|
|
|
|
sta DTV_PLANEB_STEP
|
2020-03-29 19:00:25 +00:00
|
|
|
// [16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_MODULO_LO
|
2020-03-29 19:00:25 +00:00
|
|
|
// [17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_MODULO_HI
|
2020-04-26 21:30:04 +00:00
|
|
|
// [18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// VIC Graphics Bank
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
|
|
|
// [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank bits to output - all others to input
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3^CHUNKY/$4000
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2
|
2020-03-29 19:00:25 +00:00
|
|
|
// [20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank
|
|
|
|
// VIC memory
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_MEMORY
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #0
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-02-17 23:12:29 +00:00
|
|
|
// DTV Palette - Grey Tones
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [22] *((const nomodify byte*) DTV_PALETTE + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
sta DTV_PALETTE,x
|
2019-07-08 14:43:09 +00:00
|
|
|
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuxx=_inc_vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
inx
|
2019-07-08 14:43:09 +00:00
|
|
|
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
|
2018-04-15 21:32:49 +00:00
|
|
|
cpx #$10
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1_from___b1
|
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
2019-02-17 23:12:29 +00:00
|
|
|
// Stabilize Raster
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #$ff
|
|
|
|
rff:
|
|
|
|
cpx RASTER
|
|
|
|
bne rff
|
|
|
|
stabilize:
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
cpx RASTER
|
|
|
|
beq eat+0
|
|
|
|
eat:
|
|
|
|
inx
|
|
|
|
cpx #8
|
|
|
|
bne stabilize
|
2020-03-29 19:00:25 +00:00
|
|
|
// [26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [27] *((const nomodify byte*) BORDERCOL) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta BORDERCOL
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$42
|
|
|
|
cmp RASTER
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3
|
|
|
|
jmp __b4
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@4
|
2019-09-29 21:13:37 +00:00
|
|
|
__b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@5
|
2019-09-29 21:13:37 +00:00
|
|
|
__b5:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [30] (byte) main::rst#1 ← *((const nomodify byte*) RASTER) -- vbuxx=_deref_pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx RASTER
|
2019-11-03 23:39:09 +00:00
|
|
|
// [31] (byte~) main::$3 ← (byte) main::rst#1 & (byte) 7 -- vbuaa=vbuxx_band_vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
and #7
|
2020-03-29 19:00:25 +00:00
|
|
|
// [32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3 -- vbuaa=vbuc1_bor_vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
ora #VIC_DEN|VIC_ECM|VIC_RSEL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [33] *((const nomodify byte*) VIC_CONTROL) ← (byte~) main::$4 -- _deref_pbuc1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_CONTROL
|
2019-11-03 23:39:09 +00:00
|
|
|
// [34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4 -- vbuaa=vbuxx_rol_4
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
2020-03-29 19:00:25 +00:00
|
|
|
// [35] *((const nomodify byte*) BORDERCOL) ← (byte~) main::$5 -- _deref_pbuc1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
sta BORDERCOL
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-07-08 14:43:09 +00:00
|
|
|
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
|
2018-04-15 21:32:49 +00:00
|
|
|
cpx #$f2
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b5
|
|
|
|
jmp __b2
|
2018-04-15 21:32:49 +00:00
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky
|
2019-02-17 23:12:29 +00:00
|
|
|
// Initialize Plane with 8bpp chunky
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky: {
|
2019-11-03 23:39:09 +00:00
|
|
|
.label __5 = 7
|
2018-04-15 21:32:49 +00:00
|
|
|
.label gfxb = 5
|
|
|
|
.label x = 3
|
|
|
|
.label y = 2
|
2019-07-08 14:43:09 +00:00
|
|
|
// [39] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1_from_gfx_init_chunky:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #CHUNKY/$4000
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from_gfx_init_chunky:
|
2020-03-29 19:00:25 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #($ff&CHUNKY/$4000)+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1_from___b5:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
|
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
|
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2_from___b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
|
2019-06-02 22:44:46 +00:00
|
|
|
lda #<0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z x
|
2019-06-02 22:44:46 +00:00
|
|
|
lda #>0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z x+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2_from___b3:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
|
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3_from___b2
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3_from___b2
|
|
|
|
jmp __b4
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@4
|
2019-09-29 21:13:37 +00:00
|
|
|
__b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
2019-07-08 14:43:09 +00:00
|
|
|
// [44] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
|
2019-09-29 21:13:37 +00:00
|
|
|
dtvSetCpuBankSegment1_from___b4:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b7
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@7
|
2019-09-29 21:13:37 +00:00
|
|
|
__b7:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
inx
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3_from___b7:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3_from___b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2019-11-03 23:39:09 +00:00
|
|
|
// [47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z y
|
2018-04-15 21:32:49 +00:00
|
|
|
clc
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x+1
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5+1
|
|
|
|
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5 -- vbuaa=_byte_vwuz1
|
|
|
|
lda.z __5
|
2019-07-08 14:43:09 +00:00
|
|
|
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
ldy #0
|
|
|
|
sta (gfxb),y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2_from___b3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2_from___b3
|
|
|
|
jmp __b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@5
|
2019-09-29 21:13:37 +00:00
|
|
|
__b5:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$33
|
2019-08-07 19:00:19 +00:00
|
|
|
cmp.z y
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1_from___b5
|
2019-07-08 14:43:09 +00:00
|
|
|
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6_from___b5:
|
|
|
|
jmp __b6
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@6
|
2019-09-29 21:13:37 +00:00
|
|
|
__b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [56] call dtvSetCpuBankSegment1
|
2020-03-07 21:38:40 +00:00
|
|
|
// Reset CPU BANK segment to $4000
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
|
2019-09-29 21:13:37 +00:00
|
|
|
dtvSetCpuBankSegment1_from___b6:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #$4000/$4000
|
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __breturn
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@return
|
2019-09-29 21:13:37 +00:00
|
|
|
__breturn:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [57] return
|
2018-04-15 21:32:49 +00:00
|
|
|
rts
|
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
|
|
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
|
|
|
|
// The actual memory addressed will be $4000*cpuSegmentIdx
|
2019-02-19 19:51:48 +00:00
|
|
|
// dtvSetCpuBankSegment1(byte register(A) cpuBankIdx)
|
2018-04-15 21:32:49 +00:00
|
|
|
dtvSetCpuBankSegment1: {
|
2019-02-17 23:12:29 +00:00
|
|
|
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
|
2018-04-15 21:32:49 +00:00
|
|
|
.label cpuBank = $ff
|
2019-09-29 20:36:00 +00:00
|
|
|
// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
sta cpuBank
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
2018-04-15 21:32:49 +00:00
|
|
|
.byte $32, $dd
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z $ff
|
2018-04-15 21:32:49 +00:00
|
|
|
.byte $32, $00
|
2019-09-29 21:13:37 +00:00
|
|
|
jmp __breturn
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1::@return
|
2019-09-29 21:13:37 +00:00
|
|
|
__breturn:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [61] return
|
2018-04-15 21:32:49 +00:00
|
|
|
rts
|
|
|
|
}
|
2019-07-08 14:43:09 +00:00
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|
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// File Data
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2018-04-15 21:32:49 +00:00
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ASSEMBLER OPTIMIZATIONS
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2019-09-29 21:13:37 +00:00
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Removing instruction jmp __b1
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Removing instruction jmp __bend
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Removing instruction jmp __b6
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Removing instruction jmp __b1
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Removing instruction jmp __b2
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Removing instruction jmp __b3
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Removing instruction jmp __b4
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Removing instruction jmp __b5
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Removing instruction jmp __b1
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Removing instruction jmp __b2
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Removing instruction jmp __b4
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Removing instruction jmp __b7
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Removing instruction jmp __b3
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Removing instruction jmp __b5
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Removing instruction jmp __b6
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Removing instruction jmp __breturn
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Removing instruction jmp __breturn
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2018-04-15 21:32:49 +00:00
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Succesful ASM optimization Pass5NextJumpElimination
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Removing instruction lda #0
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2019-06-02 22:44:46 +00:00
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Removing instruction lda #>0
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2018-04-15 21:32:49 +00:00
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Succesful ASM optimization Pass5UnnecesaryLoadElimination
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2019-09-29 21:13:37 +00:00
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Replacing label __b1_from___b1 with __b1
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Replacing label __b3_from___b2 with __b3
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Replacing label __b3_from___b2 with __b3
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Replacing label __b2_from___b3 with __b2
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Replacing label __b2_from___b3 with __b2
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|
Replacing label __b1_from___b5 with __b1
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Removing instruction __b1_from___bbegin:
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2020-03-03 07:58:31 +00:00
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Removing instruction __b1:
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2019-09-29 21:13:37 +00:00
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Removing instruction __bend_from___b1:
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Removing instruction __b1_from___b1:
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Removing instruction __b1_from___b5:
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Removing instruction __b2_from___b1:
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Removing instruction __b2_from___b3:
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Removing instruction __b3_from___b2:
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Removing instruction __b6_from___b5:
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2018-04-15 21:32:49 +00:00
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|
Succesful ASM optimization Pass5RedundantLabelElimination
|
2019-09-29 21:13:37 +00:00
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|
Removing instruction __bend:
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2018-04-15 21:32:49 +00:00
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Removing instruction gfx_init_chunky_from_main:
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2019-09-29 21:13:37 +00:00
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Removing instruction __b6:
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Removing instruction __b1_from___b6:
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Removing instruction __b4:
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2018-04-15 21:32:49 +00:00
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Removing instruction dtvSetCpuBankSegment1_from_gfx_init_chunky:
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2019-09-29 21:13:37 +00:00
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Removing instruction __b1_from_gfx_init_chunky:
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Removing instruction __b4:
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Removing instruction dtvSetCpuBankSegment1_from___b4:
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Removing instruction __b7:
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Removing instruction __b3_from___b7:
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Removing instruction __b5:
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Removing instruction __b6:
|
2020-03-07 21:38:40 +00:00
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|
|
Removing instruction dtvSetCpuBankSegment1_from___b6:
|
2019-09-29 21:13:37 +00:00
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Removing instruction __breturn:
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Removing instruction __breturn:
|
2018-04-15 21:32:49 +00:00
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|
|
Succesful ASM optimization Pass5UnusedLabelElimination
|
2018-12-25 16:04:50 +00:00
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Updating BasicUpstart to call main directly
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|
Removing instruction jsr main
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Succesful ASM optimization Pass5SkipBegin
|
2019-09-29 21:13:37 +00:00
|
|
|
Removing instruction jmp __b1
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Removing instruction jmp __b1
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|
|
|
Removing instruction jmp __b2
|
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|
|
Removing instruction jmp __b3
|
2018-04-15 21:32:49 +00:00
|
|
|
Succesful ASM optimization Pass5NextJumpElimination
|
2019-05-30 20:29:04 +00:00
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|
|
Replacing instruction ldx #0 with TAX
|
2020-03-03 07:58:31 +00:00
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|
|
Removing instruction __bbegin:
|
2018-12-25 16:04:50 +00:00
|
|
|
Succesful ASM optimization Pass5UnusedLabelElimination
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
FINAL SYMBOL TABLE
|
2019-03-31 15:10:41 +00:00
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(label) @1
|
2018-04-15 21:32:49 +00:00
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(label) @begin
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(label) @end
|
2020-03-29 19:00:25 +00:00
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|
(const nomodify byte*) BORDERCOL = (byte*) 53280
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(const nomodify byte*) CHUNKY = (byte*) 32768
|
2020-04-26 21:30:04 +00:00
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|
(const nomodify struct MOS6526_CIA*) CIA2 = (struct MOS6526_CIA*) 56576
|
2020-03-29 19:00:25 +00:00
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(const nomodify byte) DTV_BADLINE_OFF = (byte) $20
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(const nomodify byte) DTV_CHUNKY = (byte) $40
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(const nomodify byte) DTV_COLORRAM_OFF = (byte) $10
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(const nomodify byte*) DTV_CONTROL = (byte*) 53308
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(const nomodify byte*) DTV_FEATURE = (byte*) 53311
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(const nomodify byte) DTV_FEATURE_ENABLE = (byte) 1
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(const nomodify byte) DTV_HIGHCOLOR = (byte) 4
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(const nomodify byte) DTV_LINEAR = (byte) 1
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(const nomodify byte*) DTV_PALETTE = (byte*) 53760
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(const nomodify byte*) DTV_PLANEB_MODULO_HI = (byte*) 53320
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(const nomodify byte*) DTV_PLANEB_MODULO_LO = (byte*) 53319
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(const nomodify byte*) DTV_PLANEB_START_HI = (byte*) 53323
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(const nomodify byte*) DTV_PLANEB_START_LO = (byte*) 53321
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|
(const nomodify byte*) DTV_PLANEB_START_MI = (byte*) 53322
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|
(const nomodify byte*) DTV_PLANEB_STEP = (byte*) 53324
|
2020-04-26 21:30:04 +00:00
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|
|
(byte) MOS6526_CIA::INTERRUPT
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(byte) MOS6526_CIA::PORT_A
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(byte) MOS6526_CIA::PORT_A_DDR
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(byte) MOS6526_CIA::PORT_B
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|
(byte) MOS6526_CIA::PORT_B_DDR
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|
(byte) MOS6526_CIA::SERIAL_DATA
|
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|
(word) MOS6526_CIA::TIMER_A
|
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|
(byte) MOS6526_CIA::TIMER_A_CONTROL
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|
(word) MOS6526_CIA::TIMER_B
|
|
|
|
(byte) MOS6526_CIA::TIMER_B_CONTROL
|
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|
|
(byte) MOS6526_CIA::TOD_10THS
|
|
|
|
(byte) MOS6526_CIA::TOD_HOURS
|
|
|
|
(byte) MOS6526_CIA::TOD_MIN
|
|
|
|
(byte) MOS6526_CIA::TOD_SEC
|
2020-04-28 20:58:16 +00:00
|
|
|
(byte) MOS6569_VICII::BG_COLOR
|
|
|
|
(byte) MOS6569_VICII::BG_COLOR1
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|
(byte) MOS6569_VICII::BG_COLOR2
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|
(byte) MOS6569_VICII::BG_COLOR3
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|
|
(byte) MOS6569_VICII::BORDER_COLOR
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|
|
(byte) MOS6569_VICII::CONTROL1
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|
|
(byte) MOS6569_VICII::CONTROL2
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|
|
(byte) MOS6569_VICII::IRQ_ENABLE
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|
|
(byte) MOS6569_VICII::IRQ_STATUS
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_X
|
|
|
|
(byte) MOS6569_VICII::LIGHTPEN_Y
|
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|
|
(byte) MOS6569_VICII::MEMORY
|
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|
|
(byte) MOS6569_VICII::RASTER
|
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|
|
(byte) MOS6569_VICII::SPRITE0_COLOR
|
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|
|
(byte) MOS6569_VICII::SPRITE0_X
|
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|
(byte) MOS6569_VICII::SPRITE0_Y
|
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|
|
(byte) MOS6569_VICII::SPRITE1_COLOR
|
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|
(byte) MOS6569_VICII::SPRITE1_X
|
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|
(byte) MOS6569_VICII::SPRITE1_Y
|
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|
(byte) MOS6569_VICII::SPRITE2_COLOR
|
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|
(byte) MOS6569_VICII::SPRITE2_X
|
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|
(byte) MOS6569_VICII::SPRITE2_Y
|
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|
(byte) MOS6569_VICII::SPRITE3_COLOR
|
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|
(byte) MOS6569_VICII::SPRITE3_X
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|
(byte) MOS6569_VICII::SPRITE3_Y
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(byte) MOS6569_VICII::SPRITE4_COLOR
|
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|
(byte) MOS6569_VICII::SPRITE4_X
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(byte) MOS6569_VICII::SPRITE4_Y
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(byte) MOS6569_VICII::SPRITE5_COLOR
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(byte) MOS6569_VICII::SPRITE5_X
|
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(byte) MOS6569_VICII::SPRITE5_Y
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|
(byte) MOS6569_VICII::SPRITE6_COLOR
|
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(byte) MOS6569_VICII::SPRITE6_X
|
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|
(byte) MOS6569_VICII::SPRITE6_Y
|
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|
|
(byte) MOS6569_VICII::SPRITE7_COLOR
|
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|
(byte) MOS6569_VICII::SPRITE7_X
|
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|
(byte) MOS6569_VICII::SPRITE7_Y
|
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|
|
(byte) MOS6569_VICII::SPRITES_BG_COLLISION
|
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|
|
(byte) MOS6569_VICII::SPRITES_COLLISION
|
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|
(byte) MOS6569_VICII::SPRITES_ENABLE
|
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(byte) MOS6569_VICII::SPRITES_EXPAND_X
|
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|
(byte) MOS6569_VICII::SPRITES_EXPAND_Y
|
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|
(byte) MOS6569_VICII::SPRITES_MC
|
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(byte) MOS6569_VICII::SPRITES_MCOLOR1
|
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(byte) MOS6569_VICII::SPRITES_MCOLOR2
|
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|
|
(byte) MOS6569_VICII::SPRITES_PRIORITY
|
|
|
|
(byte) MOS6569_VICII::SPRITES_XMSB
|
2020-04-27 22:30:35 +00:00
|
|
|
(byte) MOS6581_SID::CH1_ATTACK_DECAY
|
|
|
|
(byte) MOS6581_SID::CH1_CONTROL
|
|
|
|
(word) MOS6581_SID::CH1_FREQ
|
|
|
|
(word) MOS6581_SID::CH1_PULSE_WIDTH
|
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|
|
(byte) MOS6581_SID::CH1_SUSTAIN_RELEASE
|
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|
(byte) MOS6581_SID::CH2_ATTACK_DECAY
|
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|
|
(byte) MOS6581_SID::CH2_CONTROL
|
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|
(word) MOS6581_SID::CH2_FREQ
|
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(word) MOS6581_SID::CH2_PULSE_WIDTH
|
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|
|
(byte) MOS6581_SID::CH2_SUSTAIN_RELEASE
|
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|
|
(byte) MOS6581_SID::CH3_ATTACK_DECAY
|
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|
|
(byte) MOS6581_SID::CH3_CONTROL
|
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|
|
(byte) MOS6581_SID::CH3_ENV
|
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|
|
(word) MOS6581_SID::CH3_FREQ
|
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|
|
(byte) MOS6581_SID::CH3_OSC
|
|
|
|
(word) MOS6581_SID::CH3_PULSE_WIDTH
|
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|
|
(byte) MOS6581_SID::CH3_SUSTAIN_RELEASE
|
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|
|
(byte) MOS6581_SID::FILTER_CUTOFF_HIGH
|
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|
|
(byte) MOS6581_SID::FILTER_CUTOFF_LOW
|
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|
(byte) MOS6581_SID::FILTER_SETUP
|
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(byte) MOS6581_SID::POT_X
|
|
|
|
(byte) MOS6581_SID::POT_Y
|
|
|
|
(byte) MOS6581_SID::VOLUME_FILTER_MODE
|
2020-04-26 21:30:04 +00:00
|
|
|
(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = (byte) 2
|
2020-03-29 19:00:25 +00:00
|
|
|
(const nomodify byte*) PROCPORT = (byte*) 1
|
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|
(const nomodify byte*) PROCPORT_DDR = (byte*) 0
|
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|
(const nomodify byte) PROCPORT_DDR_MEMORY_MASK = (byte) 7
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(const nomodify byte) PROCPORT_RAM_IO = (byte) 5
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|
(const nomodify byte*) RASTER = (byte*) 53266
|
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|
(const nomodify byte*) VIC_CONTROL = (byte*) 53265
|
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|
(const nomodify byte*) VIC_CONTROL2 = (byte*) 53270
|
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(const nomodify byte) VIC_CSEL = (byte) 8
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(const nomodify byte) VIC_DEN = (byte) $10
|
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|
(const nomodify byte) VIC_ECM = (byte) $40
|
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|
(const nomodify byte) VIC_MCM = (byte) $10
|
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|
(const nomodify byte*) VIC_MEMORY = (byte*) 53272
|
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|
|
(const nomodify byte) VIC_RSEL = (byte) 8
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) dtvSetCpuBankSegment1((byte) dtvSetCpuBankSegment1::cpuBankIdx)
|
|
|
|
(label) dtvSetCpuBankSegment1::@return
|
2019-10-13 22:51:15 +00:00
|
|
|
(const byte*) dtvSetCpuBankSegment1::cpuBank = (byte*) 255
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#1 reg byte a 20002.0
|
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|
(byte) dtvSetCpuBankSegment1::cpuBankIdx#3 reg byte a 110002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) gfx_init_chunky()
|
2020-03-22 21:26:39 +00:00
|
|
|
(word~) gfx_init_chunky::$5 zp[2]:7 10001.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) gfx_init_chunky::@1
|
|
|
|
(label) gfx_init_chunky::@2
|
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|
|
(label) gfx_init_chunky::@3
|
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|
|
(label) gfx_init_chunky::@4
|
|
|
|
(label) gfx_init_chunky::@5
|
|
|
|
(label) gfx_init_chunky::@6
|
2019-03-31 15:10:41 +00:00
|
|
|
(label) gfx_init_chunky::@7
|
2018-04-15 21:32:49 +00:00
|
|
|
(label) gfx_init_chunky::@return
|
|
|
|
(byte) gfx_init_chunky::c
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::c#0 reg byte a 20002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte*) gfx_init_chunky::gfxb#1 gfxb zp[2]:5 4200.6
|
|
|
|
(byte*) gfx_init_chunky::gfxb#3 gfxb zp[2]:5 15502.0
|
|
|
|
(byte*) gfx_init_chunky::gfxb#4 gfxb zp[2]:5 7500.75
|
|
|
|
(byte*) gfx_init_chunky::gfxb#5 gfxb zp[2]:5 2002.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#2 reg byte x 20002.0
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#4 reg byte x 10251.25
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#7 reg byte x 2002.0
|
|
|
|
(byte) gfx_init_chunky::gfxbCpuBank#8 reg byte x 3444.8888888888887
|
2018-04-15 21:32:49 +00:00
|
|
|
(word) gfx_init_chunky::x
|
2020-03-22 21:26:39 +00:00
|
|
|
(word) gfx_init_chunky::x#1 x zp[2]:3 15001.5
|
|
|
|
(word) gfx_init_chunky::x#2 x zp[2]:3 3000.3
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) gfx_init_chunky::y
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) gfx_init_chunky::y#1 y zp[1]:2 1501.5
|
|
|
|
(byte) gfx_init_chunky::y#6 y zp[1]:2 923.3076923076923
|
2018-04-15 21:32:49 +00:00
|
|
|
(void()) main()
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte~) main::$3 reg byte a 2002.0
|
|
|
|
(byte~) main::$4 reg byte a 2002.0
|
|
|
|
(byte~) main::$5 reg byte a 2002.0
|
2019-03-31 15:10:41 +00:00
|
|
|
(label) main::@1
|
2019-03-29 23:15:53 +00:00
|
|
|
(label) main::@2
|
2019-03-31 15:10:41 +00:00
|
|
|
(label) main::@3
|
|
|
|
(label) main::@4
|
|
|
|
(label) main::@5
|
2019-03-29 23:15:53 +00:00
|
|
|
(label) main::@6
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) main::j
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) main::j#1 reg byte x 151.5
|
|
|
|
(byte) main::j#2 reg byte x 202.0
|
2018-04-15 21:32:49 +00:00
|
|
|
(byte) main::rst
|
2020-03-22 21:26:39 +00:00
|
|
|
(byte) main::rst#1 reg byte x 572.0
|
2018-04-15 21:32:49 +00:00
|
|
|
|
|
|
|
reg byte x [ main::j#2 main::j#1 ]
|
2019-10-12 09:40:36 +00:00
|
|
|
zp[1]:2 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
|
|
zp[2]:3 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
2019-10-12 09:40:36 +00:00
|
|
|
zp[2]:5 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
|
|
reg byte x [ main::rst#1 ]
|
2019-11-03 23:39:09 +00:00
|
|
|
reg byte a [ main::$3 ]
|
|
|
|
reg byte a [ main::$4 ]
|
|
|
|
reg byte a [ main::$5 ]
|
|
|
|
zp[2]:7 [ gfx_init_chunky::$5 ]
|
2018-04-15 21:32:49 +00:00
|
|
|
reg byte a [ gfx_init_chunky::c#0 ]
|
|
|
|
|
|
|
|
|
|
|
|
FINAL ASSEMBLER
|
2018-12-25 16:04:50 +00:00
|
|
|
Score: 19882
|
2018-04-15 21:32:49 +00:00
|
|
|
|
2019-07-08 14:43:09 +00:00
|
|
|
// File Comments
|
2019-02-17 23:12:29 +00:00
|
|
|
// C64DTV 8bpp charmode stretcher
|
2019-07-25 15:06:17 +00:00
|
|
|
// Upstart
|
2018-04-15 21:32:49 +00:00
|
|
|
.pc = $801 "Basic"
|
|
|
|
:BasicUpstart(main)
|
|
|
|
.pc = $80d "Program"
|
2019-07-08 14:43:09 +00:00
|
|
|
// Global Constants & labels
|
2018-04-15 21:32:49 +00:00
|
|
|
.label RASTER = $d012
|
|
|
|
.label BORDERCOL = $d020
|
|
|
|
.label VIC_CONTROL = $d011
|
|
|
|
.const VIC_ECM = $40
|
|
|
|
.const VIC_DEN = $10
|
|
|
|
.const VIC_RSEL = 8
|
|
|
|
.label VIC_CONTROL2 = $d016
|
|
|
|
.const VIC_MCM = $10
|
|
|
|
.const VIC_CSEL = 8
|
|
|
|
.label VIC_MEMORY = $d018
|
2020-04-28 20:58:16 +00:00
|
|
|
// Processor port data direction register
|
|
|
|
.label PROCPORT_DDR = 0
|
|
|
|
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
|
|
|
.const PROCPORT_DDR_MEMORY_MASK = 7
|
|
|
|
// Processor Port Register controlling RAM/ROM configuration and the datasette
|
|
|
|
.label PROCPORT = 1
|
|
|
|
// RAM in 0xA000, 0xE000 I/O in 0xD000
|
|
|
|
.const PROCPORT_RAM_IO = 5
|
2020-04-26 21:30:04 +00:00
|
|
|
// The CIA#2: Serial bus, RS-232, VIC memory bank
|
|
|
|
.label CIA2 = $dd00
|
2019-02-17 23:12:29 +00:00
|
|
|
// Feature enables or disables the extra C64 DTV features
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_FEATURE = $d03f
|
|
|
|
.const DTV_FEATURE_ENABLE = 1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Controls the graphics modes of the C64 DTV
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_CONTROL = $d03c
|
|
|
|
.const DTV_LINEAR = 1
|
|
|
|
.const DTV_HIGHCOLOR = 4
|
|
|
|
.const DTV_COLORRAM_OFF = $10
|
|
|
|
.const DTV_BADLINE_OFF = $20
|
|
|
|
.const DTV_CHUNKY = $40
|
2019-02-17 23:12:29 +00:00
|
|
|
// Defines colors for the 16 first colors ($00-$0f)
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PALETTE = $d200
|
2019-02-17 23:12:29 +00:00
|
|
|
// Linear Graphics Plane B Counter Control
|
2018-04-15 21:32:49 +00:00
|
|
|
.label DTV_PLANEB_START_LO = $d049
|
|
|
|
.label DTV_PLANEB_START_MI = $d04a
|
|
|
|
.label DTV_PLANEB_START_HI = $d04b
|
|
|
|
.label DTV_PLANEB_STEP = $d04c
|
|
|
|
.label DTV_PLANEB_MODULO_LO = $d047
|
|
|
|
.label DTV_PLANEB_MODULO_HI = $d048
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane with all pixels
|
2018-04-15 21:32:49 +00:00
|
|
|
.label CHUNKY = $8000
|
2020-04-26 21:30:04 +00:00
|
|
|
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
2019-07-08 14:43:09 +00:00
|
|
|
// @begin
|
|
|
|
// [1] phi from @begin to @1 [phi:@begin->@1]
|
|
|
|
// @1
|
|
|
|
// [2] call main
|
|
|
|
// [3] phi from @1 to @end [phi:@1->@end]
|
|
|
|
// @end
|
|
|
|
// main
|
2018-04-15 21:32:49 +00:00
|
|
|
main: {
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm
|
|
|
|
// asm { sei }
|
2018-04-15 21:32:49 +00:00
|
|
|
sei
|
2019-07-08 14:43:09 +00:00
|
|
|
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
2020-03-29 19:00:25 +00:00
|
|
|
// [5] *((const nomodify byte*) PROCPORT_DDR) ← (const nomodify byte) PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
|
|
|
|
// Disable kernal & basic
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_DDR_MEMORY_MASK
|
|
|
|
sta PROCPORT_DDR
|
2019-07-08 14:43:09 +00:00
|
|
|
// *PROCPORT = PROCPORT_RAM_IO
|
2020-03-29 19:00:25 +00:00
|
|
|
// [6] *((const nomodify byte*) PROCPORT) ← (const nomodify byte) PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #PROCPORT_RAM_IO
|
|
|
|
sta PROCPORT
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky()
|
|
|
|
// [7] call gfx_init_chunky
|
|
|
|
// [38] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr gfx_init_chunky
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@6
|
|
|
|
// *DTV_FEATURE = DTV_FEATURE_ENABLE
|
2020-03-29 19:00:25 +00:00
|
|
|
// [8] *((const nomodify byte*) DTV_FEATURE) ← (const nomodify byte) DTV_FEATURE_ENABLE -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Enable DTV extended modes
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_FEATURE_ENABLE
|
|
|
|
sta DTV_FEATURE
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_COLORRAM_OFF | DTV_CHUNKY | DTV_BADLINE_OFF
|
2020-03-29 19:00:25 +00:00
|
|
|
// [9] *((const nomodify byte*) DTV_CONTROL) ← (const nomodify byte) DTV_HIGHCOLOR|(const nomodify byte) DTV_LINEAR|(const nomodify byte) DTV_COLORRAM_OFF|(const nomodify byte) DTV_CHUNKY|(const nomodify byte) DTV_BADLINE_OFF -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// 8BPP Pixel Cell Mode
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
|
|
sta DTV_CONTROL
|
2019-07-08 14:43:09 +00:00
|
|
|
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3
|
2020-03-29 19:00:25 +00:00
|
|
|
// [10] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2019-07-08 14:43:09 +00:00
|
|
|
// *VIC_CONTROL2 = VIC_MCM | VIC_CSEL
|
2020-03-29 19:00:25 +00:00
|
|
|
// [11] *((const nomodify byte*) VIC_CONTROL2) ← (const nomodify byte) VIC_MCM|(const nomodify byte) VIC_CSEL -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_MCM|VIC_CSEL
|
|
|
|
sta VIC_CONTROL2
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_START_LO = < CHUNKY
|
2020-03-29 19:00:25 +00:00
|
|
|
// [12] *((const nomodify byte*) DTV_PLANEB_START_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Plane B: CHUNKY
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta DTV_PLANEB_START_LO
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_START_MI = > CHUNKY
|
2020-03-29 19:00:25 +00:00
|
|
|
// [13] *((const nomodify byte*) DTV_PLANEB_START_MI) ← >(const nomodify byte*) CHUNKY -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>CHUNKY
|
|
|
|
sta DTV_PLANEB_START_MI
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_START_HI = 0
|
2020-03-29 19:00:25 +00:00
|
|
|
// [14] *((const nomodify byte*) DTV_PLANEB_START_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_START_HI
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_STEP = 8
|
2020-03-29 19:00:25 +00:00
|
|
|
// [15] *((const nomodify byte*) DTV_PLANEB_STEP) ← (byte) 8 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #8
|
|
|
|
sta DTV_PLANEB_STEP
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_MODULO_LO = 0
|
2020-03-29 19:00:25 +00:00
|
|
|
// [16] *((const nomodify byte*) DTV_PLANEB_MODULO_LO) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta DTV_PLANEB_MODULO_LO
|
2019-07-08 14:43:09 +00:00
|
|
|
// *DTV_PLANEB_MODULO_HI = 0
|
2020-03-29 19:00:25 +00:00
|
|
|
// [17] *((const nomodify byte*) DTV_PLANEB_MODULO_HI) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
sta DTV_PLANEB_MODULO_HI
|
2020-04-26 21:30:04 +00:00
|
|
|
// CIA2->PORT_A_DDR = %00000011
|
|
|
|
// [18] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2+(const byte) OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) ← (byte) 3 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// VIC Graphics Bank
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
|
|
|
// CIA2->PORT_A = %00000011 ^ (byte)((word)CHUNKY/$4000)
|
|
|
|
// [19] *((byte*)(const nomodify struct MOS6526_CIA*) CIA2) ← (byte) 3^(byte)(word)(const nomodify byte*) CHUNKY/(word) $4000 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank bits to output - all others to input
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #3^CHUNKY/$4000
|
2020-04-26 21:30:04 +00:00
|
|
|
sta CIA2
|
2019-07-08 14:43:09 +00:00
|
|
|
// *VIC_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4)
|
2020-03-29 19:00:25 +00:00
|
|
|
// [20] *((const nomodify byte*) VIC_MEMORY) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set VIC Bank
|
|
|
|
// VIC memory
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #0
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_MEMORY
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
|
|
|
|
// [21] phi (byte) main::j#2 = (byte) 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
|
2019-05-30 20:29:04 +00:00
|
|
|
tax
|
2019-02-17 23:12:29 +00:00
|
|
|
// DTV Palette - Grey Tones
|
2019-07-08 14:43:09 +00:00
|
|
|
// [21] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
|
|
|
|
// [21] phi (byte) main::j#2 = (byte) main::j#1 [phi:main::@1->main::@1#0] -- register_copy
|
|
|
|
// main::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// DTV_PALETTE[j] = j
|
2020-03-29 19:00:25 +00:00
|
|
|
// [22] *((const nomodify byte*) DTV_PALETTE + (byte) main::j#2) ← (byte) main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
sta DTV_PALETTE,x
|
2019-07-08 14:43:09 +00:00
|
|
|
// for(byte j : 0..$f)
|
|
|
|
// [23] (byte) main::j#1 ← ++ (byte) main::j#2 -- vbuxx=_inc_vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
inx
|
2019-07-08 14:43:09 +00:00
|
|
|
// [24] if((byte) main::j#1!=(byte) $10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
|
2018-04-15 21:32:49 +00:00
|
|
|
cpx #$10
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm
|
|
|
|
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
2019-02-17 23:12:29 +00:00
|
|
|
// Stabilize Raster
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #$ff
|
|
|
|
rff:
|
|
|
|
cpx RASTER
|
|
|
|
bne rff
|
|
|
|
stabilize:
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
cpx RASTER
|
|
|
|
beq eat+0
|
|
|
|
eat:
|
|
|
|
inx
|
|
|
|
cpx #8
|
|
|
|
bne stabilize
|
2019-07-08 14:43:09 +00:00
|
|
|
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3
|
2020-03-29 19:00:25 +00:00
|
|
|
// [26] *((const nomodify byte*) VIC_CONTROL) ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL|(byte) 3 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #VIC_DEN|VIC_ECM|VIC_RSEL|3
|
|
|
|
sta VIC_CONTROL
|
2019-07-08 14:43:09 +00:00
|
|
|
// *BORDERCOL = 0
|
2020-03-29 19:00:25 +00:00
|
|
|
// [27] *((const nomodify byte*) BORDERCOL) ← (byte) 0 -- _deref_pbuc1=vbuc2
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
|
|
|
sta BORDERCOL
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2019-07-08 14:43:09 +00:00
|
|
|
// while(*RASTER!=rst)
|
2020-03-29 19:00:25 +00:00
|
|
|
// [28] if(*((const nomodify byte*) RASTER)!=(byte) $42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$42
|
|
|
|
cmp RASTER
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@4
|
|
|
|
// asm
|
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-07-08 14:43:09 +00:00
|
|
|
// main::@5
|
2019-09-29 21:13:37 +00:00
|
|
|
__b5:
|
2019-07-08 14:43:09 +00:00
|
|
|
// rst = *RASTER
|
2020-03-29 19:00:25 +00:00
|
|
|
// [30] (byte) main::rst#1 ← *((const nomodify byte*) RASTER) -- vbuxx=_deref_pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx RASTER
|
2019-07-08 14:43:09 +00:00
|
|
|
// rst&7
|
2019-11-03 23:39:09 +00:00
|
|
|
// [31] (byte~) main::$3 ← (byte) main::rst#1 & (byte) 7 -- vbuaa=vbuxx_band_vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
and #7
|
2019-07-08 14:43:09 +00:00
|
|
|
// VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7)
|
2020-03-29 19:00:25 +00:00
|
|
|
// [32] (byte~) main::$4 ← (const nomodify byte) VIC_DEN|(const nomodify byte) VIC_ECM|(const nomodify byte) VIC_RSEL | (byte~) main::$3 -- vbuaa=vbuc1_bor_vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
ora #VIC_DEN|VIC_ECM|VIC_RSEL
|
2019-07-08 14:43:09 +00:00
|
|
|
// *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7)
|
2020-03-29 19:00:25 +00:00
|
|
|
// [33] *((const nomodify byte*) VIC_CONTROL) ← (byte~) main::$4 -- _deref_pbuc1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
sta VIC_CONTROL
|
2019-07-08 14:43:09 +00:00
|
|
|
// rst*$10
|
2019-11-03 23:39:09 +00:00
|
|
|
// [34] (byte~) main::$5 ← (byte) main::rst#1 << (byte) 4 -- vbuaa=vbuxx_rol_4
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
|
|
|
asl
|
2019-07-08 14:43:09 +00:00
|
|
|
// *BORDERCOL = rst*$10
|
2020-03-29 19:00:25 +00:00
|
|
|
// [35] *((const nomodify byte*) BORDERCOL) ← (byte~) main::$5 -- _deref_pbuc1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
sta BORDERCOL
|
2019-07-08 14:43:09 +00:00
|
|
|
// asm
|
|
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
2018-04-15 21:32:49 +00:00
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
|
|
|
nop
|
2019-07-08 14:43:09 +00:00
|
|
|
// while (rst!=$f2)
|
|
|
|
// [37] if((byte) main::rst#1!=(byte) $f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
|
2018-04-15 21:32:49 +00:00
|
|
|
cpx #$f2
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b5
|
|
|
|
jmp __b2
|
2018-04-15 21:32:49 +00:00
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky
|
2019-02-17 23:12:29 +00:00
|
|
|
// Initialize Plane with 8bpp chunky
|
2018-04-15 21:32:49 +00:00
|
|
|
gfx_init_chunky: {
|
2019-11-03 23:39:09 +00:00
|
|
|
.label __5 = 7
|
2018-04-15 21:32:49 +00:00
|
|
|
.label gfxb = 5
|
|
|
|
.label x = 3
|
|
|
|
.label y = 2
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++)
|
|
|
|
// [39] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
|
2020-03-29 19:00:25 +00:00
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
2019-05-30 20:29:04 +00:00
|
|
|
lda #CHUNKY/$4000
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
|
2020-03-29 19:00:25 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = ++(byte)(const nomodify byte*) CHUNKY/(word) $4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
ldx #($ff&CHUNKY/$4000)+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [40] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
|
|
|
|
// [40] phi (byte) gfx_init_chunky::gfxbCpuBank#7 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
|
|
|
|
// [40] phi (byte) gfx_init_chunky::y#6 = (byte) gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
|
|
|
|
// [40] phi (byte*) gfx_init_chunky::gfxb#5 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
|
|
|
|
// gfx_init_chunky::@1
|
2019-09-29 21:13:37 +00:00
|
|
|
__b1:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
|
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
|
2019-06-02 22:44:46 +00:00
|
|
|
lda #<0
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z x
|
|
|
|
sta.z x+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
|
|
|
|
// [41] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
|
|
|
|
// [41] phi (byte) gfx_init_chunky::gfxbCpuBank#4 = (byte) gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
|
|
|
|
// [41] phi (word) gfx_init_chunky::x#2 = (word) gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
|
|
|
|
// [41] phi (byte*) gfx_init_chunky::gfxb#3 = (byte*) gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
|
|
|
|
// gfx_init_chunky::@2
|
2019-09-29 21:13:37 +00:00
|
|
|
__b2:
|
2019-07-08 14:43:09 +00:00
|
|
|
// if(gfxb==$8000)
|
|
|
|
// [42] if((byte*) gfx_init_chunky::gfxb#3!=(word) $8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$8000
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b3
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@4
|
|
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++)
|
|
|
|
// [43] (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 ← (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
txa
|
2019-07-08 14:43:09 +00:00
|
|
|
// [44] call dtvSetCpuBankSegment1
|
|
|
|
// [58] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
|
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte) dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
|
2018-04-15 21:32:49 +00:00
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@7
|
|
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++);
|
|
|
|
// [45] (byte) gfx_init_chunky::gfxbCpuBank#2 ← ++ (byte) gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
|
2018-04-15 21:32:49 +00:00
|
|
|
inx
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
|
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #<$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #>$4000
|
2019-08-07 19:00:19 +00:00
|
|
|
sta.z gfxb+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [46] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
|
|
|
|
// [46] phi (byte) gfx_init_chunky::gfxbCpuBank#8 = (byte) gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
|
|
|
|
// [46] phi (byte*) gfx_init_chunky::gfxb#4 = (byte*) gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
|
|
|
|
// gfx_init_chunky::@3
|
2019-09-29 21:13:37 +00:00
|
|
|
__b3:
|
2019-07-08 14:43:09 +00:00
|
|
|
// x+y
|
2019-11-03 23:39:09 +00:00
|
|
|
// [47] (word~) gfx_init_chunky::$5 ← (word) gfx_init_chunky::x#2 + (byte) gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z y
|
2018-04-15 21:32:49 +00:00
|
|
|
clc
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #0
|
2019-08-07 19:00:19 +00:00
|
|
|
adc.z x+1
|
2019-11-03 23:39:09 +00:00
|
|
|
sta.z __5+1
|
2019-07-08 14:43:09 +00:00
|
|
|
// c = (byte)(x+y)
|
2019-11-03 23:39:09 +00:00
|
|
|
// [48] (byte) gfx_init_chunky::c#0 ← (byte)(word~) gfx_init_chunky::$5 -- vbuaa=_byte_vwuz1
|
|
|
|
lda.z __5
|
2019-07-08 14:43:09 +00:00
|
|
|
// *gfxb++ = c
|
|
|
|
// [49] *((byte*) gfx_init_chunky::gfxb#4) ← (byte) gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
|
2018-04-15 21:32:49 +00:00
|
|
|
ldy #0
|
|
|
|
sta (gfxb),y
|
2019-07-08 14:43:09 +00:00
|
|
|
// *gfxb++ = c;
|
|
|
|
// [50] (byte*) gfx_init_chunky::gfxb#1 ← ++ (byte*) gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z gfxb+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// for (word x : 0..319)
|
|
|
|
// [51] (word) gfx_init_chunky::x#1 ← ++ (word) gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
bne !+
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
!:
|
2019-07-08 14:43:09 +00:00
|
|
|
// [52] if((word) gfx_init_chunky::x#1!=(word) $140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x+1
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #>$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2
|
2019-08-07 19:00:19 +00:00
|
|
|
lda.z x
|
2018-04-15 21:32:49 +00:00
|
|
|
cmp #<$140
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b2
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@5
|
|
|
|
// for(byte y : 0..50)
|
|
|
|
// [53] (byte) gfx_init_chunky::y#1 ← ++ (byte) gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
|
2019-08-07 19:00:19 +00:00
|
|
|
inc.z y
|
2019-07-08 14:43:09 +00:00
|
|
|
// [54] if((byte) gfx_init_chunky::y#1!=(byte) $33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
|
2019-03-26 22:49:44 +00:00
|
|
|
lda #$33
|
2019-08-07 19:00:19 +00:00
|
|
|
cmp.z y
|
2019-09-29 21:13:37 +00:00
|
|
|
bne __b1
|
2019-07-08 14:43:09 +00:00
|
|
|
// [55] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
|
|
|
|
// gfx_init_chunky::@6
|
|
|
|
// dtvSetCpuBankSegment1((byte)($4000/$4000))
|
|
|
|
// [56] call dtvSetCpuBankSegment1
|
2020-03-07 21:38:40 +00:00
|
|
|
// Reset CPU BANK segment to $4000
|
2019-07-08 14:43:09 +00:00
|
|
|
// [58] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
|
|
|
|
// [58] phi (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 = (byte)(number) $4000/(number) $4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
2018-04-15 21:32:49 +00:00
|
|
|
lda #$4000/$4000
|
|
|
|
jsr dtvSetCpuBankSegment1
|
2019-07-08 14:43:09 +00:00
|
|
|
// gfx_init_chunky::@return
|
|
|
|
// }
|
|
|
|
// [57] return
|
2018-04-15 21:32:49 +00:00
|
|
|
rts
|
|
|
|
}
|
2019-07-08 14:43:09 +00:00
|
|
|
// dtvSetCpuBankSegment1
|
2019-02-17 23:12:29 +00:00
|
|
|
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
|
|
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
|
|
|
|
// The actual memory addressed will be $4000*cpuSegmentIdx
|
2019-02-19 19:51:48 +00:00
|
|
|
// dtvSetCpuBankSegment1(byte register(A) cpuBankIdx)
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2018-04-15 21:32:49 +00:00
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dtvSetCpuBankSegment1: {
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2019-02-17 23:12:29 +00:00
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// Move CPU BANK 1 SEGMENT ($4000-$7fff)
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2018-04-15 21:32:49 +00:00
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.label cpuBank = $ff
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2019-07-08 14:43:09 +00:00
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// *cpuBank = cpuBankIdx
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2019-09-29 20:36:00 +00:00
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// [59] *((const byte*) dtvSetCpuBankSegment1::cpuBank) ← (byte) dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
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2018-04-15 21:32:49 +00:00
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sta cpuBank
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2019-07-08 14:43:09 +00:00
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// asm
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// asm { .byte$32,$dd lda$ff .byte$32,$00 }
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2018-04-15 21:32:49 +00:00
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.byte $32, $dd
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2019-08-07 19:00:19 +00:00
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lda.z $ff
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2018-04-15 21:32:49 +00:00
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.byte $32, $00
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2019-07-08 14:43:09 +00:00
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// dtvSetCpuBankSegment1::@return
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// }
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// [61] return
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2018-04-15 21:32:49 +00:00
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rts
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}
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2019-07-08 14:43:09 +00:00
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// File Data
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2018-04-15 21:32:49 +00:00
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