mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-06-10 10:29:36 +00:00
Added Z-register optimizations for mega65gs02 CPU. Thanks @Majikeyric. Closes #718
This commit is contained in:
jespergravgaard
parent
ecf476c6a6
commit
049bceeaf5
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@ -1,4 +1,4 @@
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//KICKC FRAGMENT CACHE a359b420f a359b6324
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//KICKC FRAGMENT CACHE d183e4015 d183e6153
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//FRAGMENT vbuzz=vbuc1
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ldz #{c1}
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//FRAGMENT vbuzz_lt_vbuc1_then_la1
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@ -1,7 +1,90 @@
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//KICKC FRAGMENT CACHE a359b420f a359b6324
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//KICKC FRAGMENT CACHE d183e4015 d183e6153
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//FRAGMENT vbuz1=vbuc1
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ldz #{c1}
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stz {z1}
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//FRAGMENT 0_neq_pbuc1_derefidx_vbuz1_then_la1
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ldy {z1}
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lda {c1},y
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cmp #0
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bne {la1}
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//FRAGMENT pbuc1_derefidx_vbuz1=pbuc2_derefidx_vbuz1
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ldy {z1}
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lda {c2},y
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuz1=vbuz1
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ldy {z1}
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tya
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sta {c1},y
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//FRAGMENT vbuz1=_inc_vbuz1
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inc {z1}
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//FRAGMENT 0_neq_pbuc1_derefidx_vbuaa_then_la1
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tay
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lda {c1},y
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cmp #0
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bne {la1}
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//FRAGMENT 0_neq_pbuc1_derefidx_vbuxx_then_la1
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lda {c1},x
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cmp #0
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bne {la1}
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//FRAGMENT 0_neq_pbuc1_derefidx_vbuyy_then_la1
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lda {c1},y
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cmp #0
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bne {la1}
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//FRAGMENT 0_neq_pbuc1_derefidx_vbuzz_then_la1
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tza
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tay
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lda {c1},y
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cmp #0
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bne {la1}
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//FRAGMENT pbuc1_derefidx_vbuxx=pbuc2_derefidx_vbuxx
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lda {c2},x
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuyy=pbuc2_derefidx_vbuyy
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lda {c2},y
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=pbuc2_derefidx_vbuzz
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tza
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tay
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lda {c2},y
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuxx
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txa
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuyy=vbuyy
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tya
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=vbuzz
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tza
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tax
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sta {c1},x
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//FRAGMENT vbuxx=vbuc1
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ldx #{c1}
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//FRAGMENT vbuxx=_inc_vbuxx
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inx
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//FRAGMENT vbuyy=vbuc1
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ldy #{c1}
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//FRAGMENT vbuyy=_inc_vbuyy
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iny
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//FRAGMENT vbuzz=vbuc1
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ldz #{c1}
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//FRAGMENT vbuzz=_inc_vbuzz
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inz
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//FRAGMENT vduz1=vduc1
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lda #<{c1}
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sta {z1}
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lda #>{c1}
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sta {z1}+1
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lda #<{c1}>>$10
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sta {z1}+2
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lda #>{c1}>>$10
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sta {z1}+3
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//FRAGMENT vduz1=vwuc1
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NO_SYNTHESIS
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//FRAGMENT vduz1=vwsc1
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NO_SYNTHESIS
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//FRAGMENT _deref_pbuc1=vbuc2
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lda #{c2}
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sta {c1}
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ldz #{c2}
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stz {c1}
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//FRAGMENT _deref_pbuc1=_deref_pbuc1_bor_vbuc2
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lda #{c2}
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ora {c1}
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@ -33,22 +116,17 @@ inw {z1}
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lda #{c1}
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ldy #0
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sta ({z1}),y
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//FRAGMENT vbuz1=vbuc1
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lda #{c1}
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sta {z1}
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//FRAGMENT isr_hardware_all_entry
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pha @clob_a
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phx @clob_x
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phy @clob_y
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phz @clob_z
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//FRAGMENT vbuz1=_inc_vbuz1
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inc {z1}
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//FRAGMENT vbuz1=vbuz2
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lda {z2}
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sta {z1}
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//FRAGMENT vbuz1_neq_vbuc1_then_la1
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lda #{c1}
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cmp {z1}
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ldz #{c1}
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cpz {z1}
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bne {la1}
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//FRAGMENT call__deref_pprc1
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jsr {c1}
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@ -85,10 +163,6 @@ ply @clob_y
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plx @clob_x
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pla @clob_a
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rti
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//FRAGMENT pbuc1_derefidx_vbuz1=pbuc2_derefidx_vbuz1
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ldy {z1}
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lda {c2},y
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sta {c1},y
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//FRAGMENT vbuz1=pbuc1_derefidx_vbuz2_band_vbuc2
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lda #{c2}
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ldy {z2}
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@ -132,8 +206,8 @@ lda {c2},y
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ldy {z1}
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sta {c1},y
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//FRAGMENT vbuz1_eq_vbuc1_then_la1
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lda #{c1}
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cmp {z1}
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ldz #{c1}
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cpz {z1}
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beq {la1}
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//FRAGMENT vbuz1=vbuz2_plus_1
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lda {z2}
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@ -313,17 +387,6 @@ sta {c1}
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tay
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lda {c2},y
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuxx=pbuc2_derefidx_vbuxx
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lda {c2},x
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuyy=pbuc2_derefidx_vbuyy
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lda {c2},y
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=pbuc2_derefidx_vbuzz
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tza
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tay
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lda {c2},y
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sta {c1},y
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//FRAGMENT vbuaa=pbuc1_derefidx_vbuz1_band_vbuc2
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lda #{c2}
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ldy {z1}
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@ -1039,11 +1102,6 @@ sta {c1}
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//FRAGMENT _deref_pbuc1=pbuc2_derefidx_vbuyy
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lda {c2},y
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sta {c1}
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//FRAGMENT _deref_pbuc1=pbuc2_derefidx_vbuzz
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tza
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tay
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lda {c2},y
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sta {c1}
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//FRAGMENT vbuxx_neq_0_then_la1
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cpx #0
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bne {la1}
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@ -1056,30 +1114,6 @@ bcc {la1}
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//FRAGMENT vbuxx_eq_vbuc1_then_la1
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cpx #{c1}
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beq {la1}
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//FRAGMENT vbuxx=vbuc1
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ldx #{c1}
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//FRAGMENT vbuxx=_inc_vbuxx
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inx
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//FRAGMENT vbuyy=vbuc1
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ldy #{c1}
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//FRAGMENT vbuyy_lt_vbuc1_then_la1
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cpy #{c1}
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bcc {la1}
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//FRAGMENT vbuyy=_inc_vbuyy
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iny
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//FRAGMENT vbuzz=vbuc1
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ldz #{c1}
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//FRAGMENT vbuzz_lt_vbuc1_then_la1
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cpz #{c1}
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bcc {la1}
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//FRAGMENT vbuzz=_inc_vbuzz
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inz
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//FRAGMENT vbuyy_neq_0_then_la1
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cpy #0
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bne {la1}
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//FRAGMENT vbuzz_neq_0_then_la1
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cpz #0
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bne {la1}
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//FRAGMENT vbuaa=_dec_vbuaa
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sec
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sbc #1
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@ -1091,14 +1125,52 @@ dex
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dey
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//FRAGMENT vbuzz=_dec_vbuzz
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dez
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuaa
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuyy
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tya
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuzz
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tza
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuyy=vbuaa
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuyy=vbuxx
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txa
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuyy=vbuzz
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tza
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=vbuaa
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tax
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tza
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tay
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txa
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=vbuxx
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tza
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tay
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txa
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sta {c1},y
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//FRAGMENT pbuc1_derefidx_vbuzz=vbuyy
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tza
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tax
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tya
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sta {c1},x
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//FRAGMENT vbuaa=vbuc1
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lda #{c1}
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//FRAGMENT vbuyy_lt_vbuc1_then_la1
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cpy #{c1}
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bcc {la1}
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//FRAGMENT vbuzz_lt_vbuc1_then_la1
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cpz #{c1}
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bcc {la1}
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//FRAGMENT vbuyy_neq_0_then_la1
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cpy #0
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bne {la1}
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//FRAGMENT vbuzz_neq_0_then_la1
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cpz #0
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bne {la1}
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//FRAGMENT vbuxx_eq__deref_pbuc1_then_la1
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cpx {c1}
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beq {la1}
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@ -1115,8 +1187,6 @@ cpz {c1}
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beq {la1}
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//FRAGMENT vbuyy=vbuz1
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ldy {z1}
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//FRAGMENT vbuzz=vbuz1
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ldz {z1}
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//FRAGMENT vbuyy_neq_vbuc1_then_la1
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cpy #{c1}
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bne {la1}
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@ -1129,46 +1199,284 @@ sta {z1}
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//FRAGMENT vbuyy_eq_vbuc1_then_la1
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cpy #{c1}
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beq {la1}
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//FRAGMENT vbuz1=pbuc1_derefidx_vbuzz
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tza
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tay
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lda {c1},y
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sta {z1}
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//FRAGMENT vbuzz_eq_vbuc1_then_la1
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cpz #{c1}
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beq {la1}
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuaa
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sta {c1},x
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//FRAGMENT pbuc1_derefidx_vbuxx=vbuyy
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tya
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sta {c1},x
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//FRAGMENT vbuyy=vbuz1_plus_1
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ldy {z1}
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iny
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//FRAGMENT _deref_pbuc1=vbuyy
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sty {c1}
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//FRAGMENT vbuaa=pbuc1_derefidx_vbuzz
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tza
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tay
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lda {c1},y
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//FRAGMENT vbuyy=pbuc1_derefidx_vbuzz
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tza
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tax
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ldy {c1},x
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//FRAGMENT vbuzz=vbuz1_plus_1
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lda {z1}
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inc
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taz
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//FRAGMENT _deref_pbuc1=vbuzz
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stz {c1}
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//FRAGMENT vbuzz=vbuz1
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ldz {z1}
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//FRAGMENT vbuaa=vbuaa_plus_1
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inc
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//FRAGMENT vbuaa=vbuyy_plus_1
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tya
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inc
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//FRAGMENT vbuaa=vbuzz_plus_1
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tza
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inc
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//FRAGMENT _deref_pbuc1=vbuxx
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stx {c1}
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//FRAGMENT _deref_pbuc1=vbuzz
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stz {c1}
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//FRAGMENT vbuz1=_deref_pbuc1_plus_1
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lda {c1}
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inc
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sta {z1}
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//FRAGMENT vbuz1=_stackidxbyte_vbuc1
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tsx
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lda STACK_BASE+{c1},x
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sta {z1}
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//FRAGMENT pbuz1_derefidx_vbuz2=vbuz3
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lda {z3}
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ldz {z2}
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sta ({z1}),z
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//FRAGMENT pbuz1_derefidx_vbuz2=vbuc1
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lda #{c1}
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ldz {z2}
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sta ({z1}),z
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//FRAGMENT vwuz1=_word_vbuz2
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lda {z2}
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sta {z1}
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lda #0
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sta {z1}+1
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//FRAGMENT vwuz1=vwuz2_rol_2
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lda {z2}
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asl
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sta {z1}
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lda {z2}+1
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rol
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sta {z1}+1
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asl {z1}
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rol {z1}+1
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//FRAGMENT vwuz1=vwuz2_plus_vwuz3
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lda {z2}
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clc
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adc {z3}
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sta {z1}
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lda {z2}+1
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adc {z3}+1
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sta {z1}+1
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//FRAGMENT vwuz1=vwuz2_rol_4
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lda {z2}
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asl
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sta {z1}
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lda {z2}+1
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rol
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sta {z1}+1
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asl {z1}
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rol {z1}+1
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asl {z1}
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rol {z1}+1
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asl {z1}
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rol {z1}+1
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//FRAGMENT pbuz1=pbuc1_plus_vwuz2
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lda {z2}
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clc
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adc #<{c1}
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sta {z1}
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lda {z2}+1
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adc #>{c1}
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sta {z1}+1
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//FRAGMENT pbuz1=pbuz2
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lda {z2}
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sta {z1}
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lda {z2}+1
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sta {z1}+1
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//FRAGMENT pbuz1=pbuz1_plus_vbuc1
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lda #{c1}
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clc
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adc {z1}
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sta {z1}
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bcc !+
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inc {z1}+1
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!:
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//FRAGMENT 0_neq_vbuz1_then_la1
|
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lda {z1}
|
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bne {la1}
|
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//FRAGMENT _stackpushbyte_=vbuz1
|
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lda {z1}
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pha
|
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//FRAGMENT call_vprc1
|
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jsr {c1}
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//FRAGMENT _stackpullbyte_1
|
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pla
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//FRAGMENT pvoz1=pvoc1
|
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lda #<{c1}
|
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sta {z1}
|
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lda #>{c1}
|
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sta {z1}+1
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//FRAGMENT pbuz1=pbuz1_minus_vbuc1
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sec
|
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lda {z1}
|
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sbc #{c1}
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sta {z1}
|
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lda {z1}+1
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sbc #0
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sta {z1}+1
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//FRAGMENT pbuz1=pbuz2_plus_vwuc1
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lda {z2}
|
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clc
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adc #<{c1}
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sta {z1}
|
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lda {z2}+1
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adc #>{c1}
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sta {z1}+1
|
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//FRAGMENT pbuz1_neq_pbuz2_then_la1
|
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lda {z1}+1
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cmp {z2}+1
|
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bne {la1}
|
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lda {z1}
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cmp {z2}
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bne {la1}
|
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//FRAGMENT _deref_pbuz1=_deref_pbuz2
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ldy #0
|
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lda ({z2}),y
|
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ldy #0
|
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sta ({z1}),y
|
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//FRAGMENT pbuz1=pbuz2_plus_vbuc1
|
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lda #{c1}
|
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clc
|
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adc {z2}
|
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sta {z1}
|
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lda #0
|
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adc {z2}+1
|
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sta {z1}+1
|
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//FRAGMENT _deref_pbuz1=vbuz2
|
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lda {z2}
|
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ldy #0
|
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sta ({z1}),y
|
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//FRAGMENT vbuaa=_deref_pbuc1_plus_1
|
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lda {c1}
|
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inc
|
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//FRAGMENT vbuxx=_deref_pbuc1_plus_1
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ldx {c1}
|
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inx
|
||||
//FRAGMENT vbuaa=_stackidxbyte_vbuc1
|
||||
tsx
|
||||
lda STACK_BASE+{c1},x
|
||||
//FRAGMENT vbuxx=_stackidxbyte_vbuc1
|
||||
tsx
|
||||
lda STACK_BASE+{c1},x
|
||||
tax
|
||||
//FRAGMENT vbuyy=_stackidxbyte_vbuc1
|
||||
tsx
|
||||
lda STACK_BASE+{c1},x
|
||||
tay
|
||||
//FRAGMENT vbuzz=_stackidxbyte_vbuc1
|
||||
tsx
|
||||
lda STACK_BASE+{c1},x
|
||||
taz
|
||||
//FRAGMENT pbuz1_derefidx_vbuz2=vbuaa
|
||||
ldz {z2}
|
||||
sta ({z1}),z
|
||||
//FRAGMENT pbuz1_derefidx_vbuz2=vbuxx
|
||||
txa
|
||||
ldz {z2}
|
||||
sta ({z1}),z
|
||||
//FRAGMENT pbuz1_derefidx_vbuz2=vbuyy
|
||||
tya
|
||||
ldz {z2}
|
||||
sta ({z1}),z
|
||||
//FRAGMENT pbuz1_derefidx_vbuz2=vbuzz
|
||||
tza
|
||||
ldz {z2}
|
||||
sta ({z1}),z
|
||||
//FRAGMENT vbuz1=vbuaa
|
||||
sta {z1}
|
||||
//FRAGMENT vwuz1=_word_vbuaa
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=_word_vbuxx
|
||||
txa
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=_word_vbuyy
|
||||
tya
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT 0_neq_vbuaa_then_la1
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT _stackpushbyte_=vbuaa
|
||||
pha
|
||||
//FRAGMENT _deref_pbuz1=vbuxx
|
||||
txa
|
||||
ldy #0
|
||||
sta ({z1}),y
|
||||
//FRAGMENT _deref_pbuz1=vbuyy
|
||||
tya
|
||||
ldy #0
|
||||
sta ({z1}),y
|
||||
//FRAGMENT _deref_pbuz1=vbuzz
|
||||
tza
|
||||
ldy #0
|
||||
sta ({z1}),y
|
||||
//FRAGMENT vbuzz_eq_vbuc1_then_la1
|
||||
cpz #{c1}
|
||||
beq {la1}
|
||||
//FRAGMENT 0_neq_vbuxx_then_la1
|
||||
cpx #0
|
||||
bne {la1}
|
||||
//FRAGMENT _stackpushbyte_=vbuxx
|
||||
txa
|
||||
pha
|
||||
//FRAGMENT 0_neq_vbuyy_then_la1
|
||||
cpy #0
|
||||
bne {la1}
|
||||
//FRAGMENT _stackpushbyte_=vbuyy
|
||||
tya
|
||||
pha
|
||||
//FRAGMENT 0_neq_vbuzz_then_la1
|
||||
cpz #0
|
||||
bne {la1}
|
||||
//FRAGMENT _stackpushbyte_=vbuzz
|
||||
tza
|
||||
pha
|
||||
//FRAGMENT vbuz1=vbuxx
|
||||
stx {z1}
|
||||
//FRAGMENT vbuz1=vbuyy
|
||||
sty {z1}
|
||||
//FRAGMENT vbuaa=vbuxx
|
||||
txa
|
||||
//FRAGMENT vbuyy=_deref_pbuc1_plus_1
|
||||
ldy {c1}
|
||||
iny
|
||||
//FRAGMENT vbuaa=vbuyy
|
||||
tya
|
||||
//FRAGMENT vbuzz=_deref_pbuc1_plus_1
|
||||
lda {c1}
|
||||
inc
|
||||
taz
|
||||
//FRAGMENT vbuaa=vbuzz
|
||||
tza
|
||||
//FRAGMENT vwuz1=vwuz2_plus_vwuz1
|
||||
clc
|
||||
lda {z1}
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
lda {z1}+1
|
||||
adc {z2}+1
|
||||
sta {z1}+1
|
||||
//FRAGMENT pbuz1=pbuc1_plus_vwuz1
|
||||
lda {z1}
|
||||
clc
|
||||
adc #<{c1}
|
||||
sta {z1}
|
||||
lda {z1}+1
|
||||
adc #>{c1}
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=vwuz1_rol_4
|
||||
asw {z1}
|
||||
asw {z1}
|
||||
asw {z1}
|
||||
asw {z1}
|
||||
//FRAGMENT vwuz1=vwuc1
|
||||
lda #<{c1}
|
||||
sta {z1}
|
||||
|
|
@ -1187,23 +1495,10 @@ sta {z1}
|
|||
lda {z1}+1
|
||||
adc #>{c1}
|
||||
sta {z1}+1
|
||||
//FRAGMENT pbuz1=pbuz1_plus_vbuc1
|
||||
lda #{c1}
|
||||
clc
|
||||
adc {z1}
|
||||
sta {z1}
|
||||
bcc !+
|
||||
inc {z1}+1
|
||||
!:
|
||||
//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuz2
|
||||
ldy {z2}
|
||||
lda ({z3}),y
|
||||
sta ({z1}),y
|
||||
//FRAGMENT vwuz1=_word_vbuz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT pwuz1=pwuz1_plus_vbuc1
|
||||
lda #{c1}
|
||||
clc
|
||||
|
|
@ -1273,20 +1568,6 @@ tza
|
|||
tay
|
||||
lda ({z2}),y
|
||||
sta ({z1}),y
|
||||
//FRAGMENT vwuz1=_word_vbuaa
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=_word_vbuxx
|
||||
txa
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=_word_vbuyy
|
||||
tya
|
||||
sta {z1}
|
||||
lda #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=_word_vbuzz
|
||||
tza
|
||||
sta {z1}
|
||||
|
|
@ -1526,15 +1807,6 @@ beq {la1}
|
|||
//FRAGMENT _deref_pbuc1_eq_vbuzz_then_la1
|
||||
cpz {c1}
|
||||
beq {la1}
|
||||
//FRAGMENT vduz1=vduc1
|
||||
lda #<{c1}
|
||||
sta {z1}
|
||||
lda #>{c1}
|
||||
sta {z1}+1
|
||||
lda #<{c1}>>$10
|
||||
sta {z1}+2
|
||||
lda #>{c1}>>$10
|
||||
sta {z1}+3
|
||||
//FRAGMENT vduz1=vbuc1
|
||||
lda #{c1}
|
||||
sta {z1}
|
||||
|
|
@ -2170,38 +2442,11 @@ taz
|
|||
lda {z1}+1
|
||||
//FRAGMENT vbuxx=_byte1_vduz1
|
||||
ldx {z1}+1
|
||||
//FRAGMENT vbuz1=vbuaa
|
||||
sta {z1}
|
||||
//FRAGMENT vbuyy=_byte1_vduz1
|
||||
ldy {z1}+1
|
||||
//FRAGMENT vbuzz=_byte1_vduz1
|
||||
lda {z1}+1
|
||||
taz
|
||||
//FRAGMENT vbuz1=vbuxx
|
||||
stx {z1}
|
||||
//FRAGMENT vbuz1=vbuyy
|
||||
sty {z1}
|
||||
//FRAGMENT pbuc1_derefidx_vbuyy=vbuaa
|
||||
sta {c1},y
|
||||
//FRAGMENT pbuc1_derefidx_vbuzz=vbuaa
|
||||
tax
|
||||
tza
|
||||
tay
|
||||
txa
|
||||
sta {c1},y
|
||||
//FRAGMENT pbuc1_derefidx_vbuyy=vbuxx
|
||||
txa
|
||||
sta {c1},y
|
||||
//FRAGMENT pbuc1_derefidx_vbuzz=vbuxx
|
||||
tza
|
||||
tay
|
||||
txa
|
||||
sta {c1},y
|
||||
//FRAGMENT pbuc1_derefidx_vbuzz=vbuyy
|
||||
tza
|
||||
tax
|
||||
tya
|
||||
sta {c1},x
|
||||
//FRAGMENT vbuz1=vbuzz
|
||||
stz {z1}
|
||||
//FRAGMENT vbuxx=vbuaa
|
||||
|
|
@ -2210,44 +2455,6 @@ tax
|
|||
tay
|
||||
//FRAGMENT vbuzz=vbuaa
|
||||
taz
|
||||
//FRAGMENT 0_neq_pbuc1_derefidx_vbuz1_then_la1
|
||||
ldy {z1}
|
||||
lda {c1},y
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT pbuc1_derefidx_vbuz1=vbuz1
|
||||
ldy {z1}
|
||||
tya
|
||||
sta {c1},y
|
||||
//FRAGMENT 0_neq_pbuc1_derefidx_vbuaa_then_la1
|
||||
tay
|
||||
lda {c1},y
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT 0_neq_pbuc1_derefidx_vbuxx_then_la1
|
||||
lda {c1},x
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT 0_neq_pbuc1_derefidx_vbuyy_then_la1
|
||||
lda {c1},y
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT 0_neq_pbuc1_derefidx_vbuzz_then_la1
|
||||
tza
|
||||
tay
|
||||
lda {c1},y
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT pbuc1_derefidx_vbuxx=vbuxx
|
||||
txa
|
||||
sta {c1},x
|
||||
//FRAGMENT pbuc1_derefidx_vbuyy=vbuyy
|
||||
tya
|
||||
sta {c1},y
|
||||
//FRAGMENT pbuc1_derefidx_vbuzz=vbuzz
|
||||
tza
|
||||
tax
|
||||
sta {c1},x
|
||||
//FRAGMENT _deref_pduc1=vduz1
|
||||
ldq {z1}
|
||||
stq {c1}
|
||||
|
|
@ -2270,7 +2477,3 @@ sta {z1}+2
|
|||
lda {z1}+3
|
||||
adc #0
|
||||
sta {z1}+3
|
||||
//FRAGMENT vduz1=vwuc1
|
||||
NO_SYNTHESIS
|
||||
//FRAGMENT vduz1=vwsc1
|
||||
NO_SYNTHESIS
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
//KICKC FRAGMENT CACHE a359b420f a359b6324
|
||||
//KICKC FRAGMENT CACHE d183e4015 d183e6153
|
||||
//FRAGMENT vbuz1=vbuc1
|
||||
lda #{c1}
|
||||
sta {z1}
|
||||
|
|
|
|||
710
src/main/fragment/cache/fragment-cache-mos6502x.asm
vendored
710
src/main/fragment/cache/fragment-cache-mos6502x.asm
vendored
|
|
@ -1,4 +1,4 @@
|
|||
//KICKC FRAGMENT CACHE a359b420f a359b6324
|
||||
//KICKC FRAGMENT CACHE d183e4015 d183e6153
|
||||
//FRAGMENT vbuz1=vbuc1
|
||||
lda #{c1}
|
||||
sta {z1}
|
||||
|
|
@ -6399,6 +6399,14 @@ sta {z1}
|
|||
bcc !+
|
||||
inc {z1}+1
|
||||
!:
|
||||
//FRAGMENT pbuz1=pbuz1_minus_vbuc1
|
||||
sec
|
||||
lda {z1}
|
||||
sbc #{c1}
|
||||
sta {z1}
|
||||
lda {z1}+1
|
||||
sbc #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=vbuz2_word_vbuz3
|
||||
lda {z2}
|
||||
sta {z1}+1
|
||||
|
|
@ -6665,6 +6673,44 @@ sta {z1}
|
|||
bcc !+
|
||||
inc {z1}+1
|
||||
!:
|
||||
//FRAGMENT vbuz1=vbuz2_plus_2
|
||||
lda {z2}
|
||||
clc
|
||||
adc #2
|
||||
sta {z1}
|
||||
//FRAGMENT vbuz1=vbuaa_plus_2
|
||||
clc
|
||||
adc #2
|
||||
sta {z1}
|
||||
//FRAGMENT vbuz1=vbuxx_plus_2
|
||||
inx
|
||||
inx
|
||||
stx {z1}
|
||||
//FRAGMENT vbuxx_le_vbuc1_then_la1
|
||||
cpx #{c1}
|
||||
bcc {la1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbuyy_le_vbuc1_then_la1
|
||||
cpy #{c1}
|
||||
bcc {la1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbuxx=vbuz1_plus_2
|
||||
ldx {z1}
|
||||
inx
|
||||
inx
|
||||
//FRAGMENT vbuyy=vbuz1_plus_2
|
||||
ldy {z1}
|
||||
iny
|
||||
iny
|
||||
//FRAGMENT vbuxx=vbuaa_plus_2
|
||||
tax
|
||||
inx
|
||||
inx
|
||||
//FRAGMENT vbuxx=vbuyy_plus_2
|
||||
tya
|
||||
clc
|
||||
adc #2
|
||||
tax
|
||||
//FRAGMENT vbsz1_lt_vbsc1_then_la1
|
||||
lda {z1}
|
||||
sec
|
||||
|
|
@ -7165,6 +7211,75 @@ sta {z1}+1
|
|||
//FRAGMENT vbuyy=pbuc1_derefidx_vbuyy
|
||||
lda {c1},y
|
||||
tay
|
||||
//FRAGMENT vbsz1=_sbyte_vwuz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsc1_minus_vbsz2
|
||||
lda #{c1}
|
||||
sec
|
||||
sbc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT 0_neq_vbsz1_then_la1
|
||||
lda {z1}
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbsaa=_sbyte_vwuz1
|
||||
lda {z1}
|
||||
//FRAGMENT vbsxx=_sbyte_vwuz1
|
||||
ldx {z1}
|
||||
//FRAGMENT vbsz1=vbsc1_minus_vbsaa
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsc1_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsc1_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsyy=_sbyte_vwuz1
|
||||
ldy {z1}
|
||||
//FRAGMENT vbsz1_neq_0_then_la1
|
||||
lda {z1}
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vwsz1=vbsz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
and #$80
|
||||
beq !+
|
||||
lda #$ff
|
||||
!:
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuz2
|
||||
ldy {z2}
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuaa
|
||||
tay
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuxx
|
||||
lda {c1},x
|
||||
sta {z1}
|
||||
lda {c1}+1,x
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuyy
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vduz1=_makelong4_(vbuz2)_(vbuz3)_(vbuz4)_(vbuz5)
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
|
|
@ -8555,6 +8670,13 @@ tax
|
|||
lda {c1}
|
||||
eor #$ff
|
||||
tay
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuc1
|
||||
ldy #{c1}
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT _deref_pwsc1=vwsc2
|
||||
lda #<{c2}
|
||||
sta {c1}
|
||||
|
|
@ -8780,15 +8902,6 @@ tax
|
|||
//FRAGMENT vboyy=vboxx
|
||||
txa
|
||||
tay
|
||||
//FRAGMENT vwuz1_le_vwuz2_then_la1
|
||||
lda {z1}+1
|
||||
cmp {z2}+1
|
||||
bne !+
|
||||
lda {z1}
|
||||
cmp {z2}
|
||||
beq {la1}
|
||||
!:
|
||||
bcc {la1}
|
||||
//FRAGMENT pwuz1=pwuc1
|
||||
lda #<{c1}
|
||||
sta {z1}
|
||||
|
|
@ -8801,110 +8914,15 @@ sta {z1}
|
|||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbsz1=_sbyte_vwuz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsz3
|
||||
lda {z2}
|
||||
sec
|
||||
sbc {z3}
|
||||
sta {z1}
|
||||
//FRAGMENT 0_neq_vbsz1_then_la1
|
||||
//FRAGMENT vbuz1_ge_vbuz2_then_la1
|
||||
lda {z1}
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuaa
|
||||
tay
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuxx
|
||||
txa
|
||||
tay
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuyy
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbsaa=_sbyte_vwuz1
|
||||
lda {z1}
|
||||
//FRAGMENT vbsxx=_sbyte_vwuz1
|
||||
ldx {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsaa
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsz2
|
||||
txa
|
||||
sec
|
||||
sbc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsaa
|
||||
sta $ff
|
||||
txa
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsxx
|
||||
lda #0
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsyy
|
||||
txa
|
||||
sty $ff
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsz2
|
||||
tya
|
||||
sec
|
||||
sbc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsaa
|
||||
sta $ff
|
||||
tya
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsxx
|
||||
tya
|
||||
stx $ff
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsyy
|
||||
lda #0
|
||||
sta {z1}
|
||||
//FRAGMENT vbuxx_le_vbuc1_then_la1
|
||||
cpx #{c1}
|
||||
bcc {la1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbuyy_le_vbuc1_then_la1
|
||||
cpy #{c1}
|
||||
bcc {la1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbsyy=_sbyte_vwuz1
|
||||
ldy {z1}
|
||||
cmp {z2}
|
||||
bcs {la1}
|
||||
//FRAGMENT vduz1=pduc1_derefidx_vbuz2
|
||||
ldy {z2}
|
||||
lda {c1},y
|
||||
|
|
@ -8955,6 +8973,87 @@ sta {z1}+2
|
|||
lda {z1}+3
|
||||
sbc {z2}+3
|
||||
sta {z1}+3
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuaa
|
||||
tay
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuxx
|
||||
txa
|
||||
tay
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuz2_derefidx_vbuyy
|
||||
lda ({z2}),y
|
||||
sta {z1}
|
||||
iny
|
||||
lda ({z2}),y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsz2
|
||||
txa
|
||||
sec
|
||||
sbc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsz2
|
||||
tya
|
||||
sec
|
||||
sbc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsaa
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsaa
|
||||
sta $ff
|
||||
txa
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsaa
|
||||
sta $ff
|
||||
tya
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsxx
|
||||
lda #0
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsxx
|
||||
tya
|
||||
stx $ff
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsz2_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
sec
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsxx_minus_vbsyy
|
||||
txa
|
||||
sty $ff
|
||||
sec
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1=vbsyy_minus_vbsyy
|
||||
lda #0
|
||||
sta {z1}
|
||||
//FRAGMENT vbuaa_ge_vbuz1_then_la1
|
||||
cmp {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vduz1=pduc1_derefidx_vbuaa
|
||||
tay
|
||||
lda {c1},y
|
||||
|
|
@ -8983,6 +9082,35 @@ lda {c1}+2,y
|
|||
sta {z1}+2
|
||||
lda {c1}+3,y
|
||||
sta {z1}+3
|
||||
//FRAGMENT vbuxx_ge_vbuz1_then_la1
|
||||
cpx {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuz1_ge_vbuxx_then_la1
|
||||
lda {z1}
|
||||
stx $ff
|
||||
cmp $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuz1_ge_vbuyy_then_la1
|
||||
lda {z1}
|
||||
sty $ff
|
||||
cmp $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuxx_ge_vbuyy_then_la1
|
||||
sty $ff
|
||||
cpx $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuyy_ge_vbuz1_then_la1
|
||||
cpy {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vwuz1_le_vwuz2_then_la1
|
||||
lda {z1}+1
|
||||
cmp {z2}+1
|
||||
bne !+
|
||||
lda {z1}
|
||||
cmp {z2}
|
||||
beq {la1}
|
||||
!:
|
||||
bcc {la1}
|
||||
//FRAGMENT vbuxx_lt_vbuaa_then_la1
|
||||
sta $ff
|
||||
cpx $ff
|
||||
|
|
@ -9141,12 +9269,6 @@ adc #1
|
|||
//FRAGMENT vbuxx=pbuc1_derefidx_vbuyy_plus_1
|
||||
ldx {c1},y
|
||||
inx
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuz2
|
||||
ldy {z2}
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1_eq_vwuz2_then_la1
|
||||
lda {z1}
|
||||
cmp {z2}
|
||||
|
|
@ -9164,22 +9286,6 @@ lda {z1}
|
|||
cmp {z2}
|
||||
bcc {la1}
|
||||
!:
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuaa
|
||||
tay
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuxx
|
||||
lda {c1},x
|
||||
sta {z1}
|
||||
lda {c1}+1,x
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuyy
|
||||
lda {c1},y
|
||||
sta {z1}
|
||||
lda {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vduz1=vwuz2_dword_vwuz3
|
||||
lda {z2}
|
||||
sta {z1}+2
|
||||
|
|
@ -9601,10 +9707,6 @@ eor #$ff
|
|||
clc
|
||||
adc #$01
|
||||
sta {z1}
|
||||
//FRAGMENT vbsz1_neq_0_then_la1
|
||||
lda {z1}
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbuz1=vbuc1_minus_vbuz1
|
||||
lda #{c1}
|
||||
sec
|
||||
|
|
@ -11872,10 +11974,6 @@ lda {z2}
|
|||
sec
|
||||
sbc {z3}
|
||||
sta {z1}
|
||||
//FRAGMENT vbuz1_ge_vbuz2_then_la1
|
||||
lda {z1}
|
||||
cmp {z2}
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuaa=_deref_pbuc1_plus_1
|
||||
lda {c1}
|
||||
clc
|
||||
|
|
@ -12153,20 +12251,6 @@ lda #0
|
|||
//FRAGMENT vbuxx=vbuyy_minus_vbuyy
|
||||
lda #0
|
||||
tax
|
||||
//FRAGMENT vbuaa_ge_vbuz1_then_la1
|
||||
cmp {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuxx_ge_vbuz1_then_la1
|
||||
cpx {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuyy_ge_vbuz1_then_la1
|
||||
cpy {z1}
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuz1_ge_vbuxx_then_la1
|
||||
lda {z1}
|
||||
stx $ff
|
||||
cmp $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuaa_ge_vbuxx_then_la1
|
||||
stx $ff
|
||||
cmp $ff
|
||||
|
|
@ -12175,19 +12259,10 @@ bcs {la1}
|
|||
stx $ff
|
||||
cpy $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuz1_ge_vbuyy_then_la1
|
||||
lda {z1}
|
||||
sty $ff
|
||||
cmp $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuaa_ge_vbuyy_then_la1
|
||||
sty $ff
|
||||
cmp $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuxx_ge_vbuyy_then_la1
|
||||
sty $ff
|
||||
cpx $ff
|
||||
bcs {la1}
|
||||
//FRAGMENT vbuxx=_deref_pbuc1_plus_1
|
||||
ldx {c1}
|
||||
inx
|
||||
|
|
@ -12282,14 +12357,6 @@ lda {z1}
|
|||
cmp #<{c1}
|
||||
bcs {la1}
|
||||
!:
|
||||
//FRAGMENT pbuz1=pbuz1_minus_vbuc1
|
||||
sec
|
||||
lda {z1}
|
||||
sbc #{c1}
|
||||
sta {z1}
|
||||
lda {z1}+1
|
||||
sbc #0
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbuz1=_neg_vbuz2
|
||||
lda {z2}
|
||||
eor #$ff
|
||||
|
|
@ -13294,6 +13361,66 @@ bne {la1}
|
|||
lda {z2}
|
||||
ldy #0
|
||||
sta ({z1}),y
|
||||
//FRAGMENT vbsaa=vbsc1_minus_vbsz1
|
||||
lda #{c1}
|
||||
sec
|
||||
sbc {z1}
|
||||
//FRAGMENT vbsaa=vbsc1_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
//FRAGMENT vbsaa=vbsc1_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
//FRAGMENT vbsxx=vbsc1_minus_vbsz1
|
||||
lda #{c1}
|
||||
sec
|
||||
sbc {z1}
|
||||
tax
|
||||
//FRAGMENT vbsxx=vbsc1_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
tax
|
||||
axs #-{c1}-1
|
||||
//FRAGMENT vbsxx=vbsc1_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
tax
|
||||
axs #-{c1}-1
|
||||
//FRAGMENT vbsyy=vbsc1_minus_vbsz1
|
||||
lda #{c1}
|
||||
sec
|
||||
sbc {z1}
|
||||
tay
|
||||
//FRAGMENT vbsyy=vbsc1_minus_vbsxx
|
||||
txa
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
tay
|
||||
//FRAGMENT vbsyy=vbsc1_minus_vbsyy
|
||||
tya
|
||||
eor #$ff
|
||||
sec
|
||||
adc #{c1}
|
||||
tay
|
||||
//FRAGMENT 0_neq_vbsaa_then_la1
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbsaa=vbsc1
|
||||
lda #{c1}
|
||||
//FRAGMENT 0_neq_vbsxx_then_la1
|
||||
cpx #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbsyy_ge_0_then_la1
|
||||
cpy #0
|
||||
bpl {la1}
|
||||
//FRAGMENT 0_neq_vbsyy_then_la1
|
||||
cpy #0
|
||||
bne {la1}
|
||||
//FRAGMENT _deref_pbuc1=_byte_pprz1
|
||||
lda {z1}
|
||||
sta {c1}
|
||||
|
|
@ -15151,11 +15278,6 @@ sta ({z1}),y
|
|||
tya
|
||||
iny
|
||||
sta ({z1}),y
|
||||
//FRAGMENT vbuz1=vbuz2_plus_2
|
||||
lda {z2}
|
||||
clc
|
||||
adc #2
|
||||
sta {z1}
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuz2_plus_pwuc1_derefidx_vbuz3
|
||||
ldx {z2}
|
||||
ldy {z3}
|
||||
|
|
@ -15170,10 +15292,6 @@ sta {z1}+1
|
|||
lda {z1}
|
||||
clc
|
||||
adc #2
|
||||
//FRAGMENT vbuxx=vbuz1_plus_2
|
||||
ldx {z1}
|
||||
inx
|
||||
inx
|
||||
//FRAGMENT vwuz1=pwuc1_derefidx_vbuxx_plus_pwuc1_derefidx_vbuz2
|
||||
ldy {z2}
|
||||
clc
|
||||
|
|
@ -15274,10 +15392,6 @@ sta {z1}
|
|||
lda {c1}+1,x
|
||||
adc {c1}+1,y
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbuz1=vbuxx_plus_2
|
||||
inx
|
||||
inx
|
||||
stx {z1}
|
||||
//FRAGMENT vbuz1=vbuyy_plus_2
|
||||
iny
|
||||
iny
|
||||
|
|
@ -15659,11 +15773,6 @@ cmp {z1}
|
|||
beq !+
|
||||
bcs {la1}
|
||||
!:
|
||||
//FRAGMENT vbuxx=vbuyy_plus_2
|
||||
tya
|
||||
clc
|
||||
adc #2
|
||||
tax
|
||||
//FRAGMENT vbum1=vbuz2_rol_1
|
||||
lda {z2}
|
||||
asl
|
||||
|
|
@ -15928,20 +16037,227 @@ lda #<{c2}
|
|||
sta {c1}
|
||||
lda #>{c2}
|
||||
sta {c1}+1
|
||||
//FRAGMENT 0_neq_vbsaa_then_la1
|
||||
cmp #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbsaa=vbsc1
|
||||
//FRAGMENT vbsz1=vwsz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
//FRAGMENT _deref_pbuz1_eq__deref_pbuz2_then_la1
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
ldy #0
|
||||
cmp ({z2}),y
|
||||
beq {la1}
|
||||
//FRAGMENT vbuz1=_deref_pbuz2_minus__deref_pbuz3
|
||||
ldy #0
|
||||
lda ({z2}),y
|
||||
sec
|
||||
ldy #0
|
||||
sbc ({z3}),y
|
||||
sta {z1}
|
||||
//FRAGMENT vwsz1=_sword_vbsz2
|
||||
lda {z2}
|
||||
sta {z1}
|
||||
// sign-extend the byte
|
||||
ora #$7f
|
||||
bmi !+
|
||||
lda #0
|
||||
!:
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbsz1_eq_vbsc1_then_la1
|
||||
lda #{c1}
|
||||
cmp {z1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbsz1_eq_0_then_la1
|
||||
lda {z1}
|
||||
cmp #0
|
||||
beq {la1}
|
||||
//FRAGMENT vboz1=vbsz2_gt_vbsc1
|
||||
lda {z2}
|
||||
sec
|
||||
sbc #{c1}
|
||||
beq !a+
|
||||
bvs !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
!a:
|
||||
sta {z1}
|
||||
//FRAGMENT vboz1=vbsz2_eq_vbsc1
|
||||
lda {z2}
|
||||
eor #{c1}
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta {z1}
|
||||
//FRAGMENT vboz1=vbsz2_lt_vbsc1
|
||||
lda {z2}
|
||||
sec
|
||||
sbc #{c1}
|
||||
bvc !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
sta {z1}
|
||||
//FRAGMENT _deref_pbuz1_eq_0_then_la1
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
cmp #0
|
||||
beq {la1}
|
||||
//FRAGMENT vbuaa=_deref_pbuz1_minus__deref_pbuz2
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sec
|
||||
ldy #0
|
||||
sbc ({z2}),y
|
||||
//FRAGMENT vbuxx=_deref_pbuz1_minus__deref_pbuz2
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sec
|
||||
ldy #0
|
||||
sbc ({z2}),y
|
||||
tax
|
||||
//FRAGMENT vbuyy=_deref_pbuz1_minus__deref_pbuz2
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sec
|
||||
ldy #0
|
||||
sbc ({z2}),y
|
||||
tay
|
||||
//FRAGMENT vwsz1=_sword_vbsaa
|
||||
sta {z1}
|
||||
// sign-extend the byte
|
||||
ora #$7f
|
||||
bmi !+
|
||||
lda #0
|
||||
!:
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwsz1=_sword_vbsxx
|
||||
txa
|
||||
sta {z1}
|
||||
// sign-extend the byte
|
||||
ora #$7f
|
||||
bmi !+
|
||||
lda #0
|
||||
!:
|
||||
sta {z1}+1
|
||||
//FRAGMENT vwsz1=_sword_vbsyy
|
||||
tya
|
||||
sta {z1}
|
||||
// sign-extend the byte
|
||||
ora #$7f
|
||||
bmi !+
|
||||
lda #0
|
||||
!:
|
||||
sta {z1}+1
|
||||
//FRAGMENT vbsaa_eq_vbsc1_then_la1
|
||||
cmp #{c1}
|
||||
beq {la1}
|
||||
//FRAGMENT vbsaa_eq_0_then_la1
|
||||
cmp #0
|
||||
beq {la1}
|
||||
//FRAGMENT vboaa=vbsz1_gt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
beq !a+
|
||||
bvs !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
!a:
|
||||
//FRAGMENT vboxx=vbsz1_gt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
beq !a+
|
||||
bvs !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
!a:
|
||||
tax
|
||||
//FRAGMENT vboyy=vbsz1_gt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
beq !a+
|
||||
bvs !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
!a:
|
||||
tay
|
||||
//FRAGMENT vboaa=vbsz1_eq_vbsc1
|
||||
lda {z1}
|
||||
eor #{c1}
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
//FRAGMENT vboxx=vbsz1_eq_vbsc1
|
||||
lda {z1}
|
||||
eor #{c1}
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
tax
|
||||
//FRAGMENT vboyy=vbsz1_eq_vbsc1
|
||||
lda {z1}
|
||||
eor #{c1}
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
tay
|
||||
//FRAGMENT vboaa=vbsz1_lt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
bvc !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
//FRAGMENT vboxx=vbsz1_lt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
bvc !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
tax
|
||||
//FRAGMENT vboyy=vbsz1_lt_vbsc1
|
||||
lda {z1}
|
||||
sec
|
||||
sbc #{c1}
|
||||
bvc !+
|
||||
eor #$80
|
||||
!:
|
||||
asl
|
||||
lda #0
|
||||
rol
|
||||
tay
|
||||
//FRAGMENT vbsyy_lt_0_then_la1
|
||||
cpy #0
|
||||
bmi {la1}
|
||||
//FRAGMENT vbsaa=_inc_vbsaa
|
||||
clc
|
||||
adc #1
|
||||
//FRAGMENT 0_neq_vbsxx_then_la1
|
||||
cpx #0
|
||||
bne {la1}
|
||||
//FRAGMENT 0_neq_vbsyy_then_la1
|
||||
cpy #0
|
||||
bne {la1}
|
||||
//FRAGMENT vbum1=vbum1_plus_vbuc1
|
||||
lax {m1}
|
||||
axs #-[{c1}]
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
//KICKC FRAGMENT CACHE a359b420f a359b6324
|
||||
//KICKC FRAGMENT CACHE d183e4015 d183e6153
|
||||
//FRAGMENT _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc {c1}
|
||||
//FRAGMENT isr_hardware_all_entry
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
//KICKC FRAGMENT CACHE a359b420f a359b6324
|
||||
//KICKC FRAGMENT CACHE d183e4015 d183e6153
|
||||
//FRAGMENT vbuz1=_deref_pbuc1
|
||||
lda {c1}
|
||||
sta {z1}
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
sta ({z1}),z
|
||||
|
|
@ -104,17 +104,21 @@ public class AsmProgramStaticRegisterValues {
|
|||
current.setY(null);
|
||||
current.setyMem(null);
|
||||
}
|
||||
if(cpuClobber.isRegisterZ()) {
|
||||
current.setZ(null);
|
||||
current.setzMem(null);
|
||||
}
|
||||
if(cpuClobber.isFlagC()) {
|
||||
current.setC(null);
|
||||
current.setFlagC(null);
|
||||
}
|
||||
if(cpuClobber.isFlagN()) {
|
||||
current.setN(null);
|
||||
current.setFlagN(null);
|
||||
}
|
||||
if(cpuClobber.isFlagV()) {
|
||||
current.setV(null);
|
||||
current.setFlagV(null);
|
||||
}
|
||||
if(cpuClobber.isFlagZ()) {
|
||||
current.setZ(null);
|
||||
current.setFlagZ(null);
|
||||
}
|
||||
String mnemnonic = cpuOpcode.getMnemonic();
|
||||
CpuAddressingMode addressingMode = cpuOpcode.getAddressingMode();
|
||||
|
|
@ -129,14 +133,17 @@ public class AsmProgramStaticRegisterValues {
|
|||
if(current.getyMem() != null && current.getyMem().equals(modParam)) {
|
||||
current.setyMem(null);
|
||||
}
|
||||
if(current.getzMem() != null && current.getzMem().equals(modParam)) {
|
||||
current.setzMem(null);
|
||||
}
|
||||
}
|
||||
if(mnemnonic.equals("lda") && addressingMode.equals(CpuAddressingMode.IMM)) {
|
||||
current.setA(instruction.getOperand1());
|
||||
current.setaMem(null);
|
||||
Integer immValue = getImmValue(instruction.getOperand1());
|
||||
if(immValue != null) {
|
||||
current.setZ(immValue == 0);
|
||||
current.setN(immValue > 127);
|
||||
current.setFlagZ(immValue == 0);
|
||||
current.setFlagN(immValue > 127);
|
||||
}
|
||||
}
|
||||
if(mnemnonic.equals("lda") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
|
|
@ -147,14 +154,15 @@ public class AsmProgramStaticRegisterValues {
|
|||
current.setaMem(instruction.getOperand1());
|
||||
if(instruction.getOperand1().equals(current.getyMem())) current.setyMem(null);
|
||||
if(instruction.getOperand1().equals(current.getxMem())) current.setxMem(null);
|
||||
if(instruction.getOperand1().equals(current.getzMem())) current.setzMem(null);
|
||||
}
|
||||
if(mnemnonic.equals("ldx") && addressingMode.equals(CpuAddressingMode.IMM)) {
|
||||
current.setX(instruction.getOperand1());
|
||||
current.setxMem(null);
|
||||
Integer immValue = getImmValue(instruction.getOperand1());
|
||||
if(immValue != null) {
|
||||
current.setZ(immValue == 0);
|
||||
current.setN(immValue > 127);
|
||||
current.setFlagZ(immValue == 0);
|
||||
current.setFlagN(immValue > 127);
|
||||
}
|
||||
}
|
||||
if(mnemnonic.equals("ldx") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
|
|
@ -163,16 +171,17 @@ public class AsmProgramStaticRegisterValues {
|
|||
}
|
||||
if(mnemnonic.equals("stx") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
current.setxMem(instruction.getOperand1());
|
||||
if(instruction.getOperand1().equals(current.getyMem())) current.setyMem(null);
|
||||
if(instruction.getOperand1().equals(current.getaMem())) current.setaMem(null);
|
||||
if(instruction.getOperand1().equals(current.getyMem())) current.setyMem(null);
|
||||
if(instruction.getOperand1().equals(current.getzMem())) current.setzMem(null);
|
||||
}
|
||||
if(mnemnonic.equals("ldy") && addressingMode.equals(CpuAddressingMode.IMM)) {
|
||||
current.setY(instruction.getOperand1());
|
||||
current.setyMem(null);
|
||||
Integer immValue = getImmValue(instruction.getOperand1());
|
||||
if(immValue != null) {
|
||||
current.setZ(immValue == 0);
|
||||
current.setN(immValue > 127);
|
||||
current.setFlagZ(immValue == 0);
|
||||
current.setFlagN(immValue > 127);
|
||||
}
|
||||
}
|
||||
if(mnemnonic.equals("ldy") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
|
|
@ -180,8 +189,27 @@ public class AsmProgramStaticRegisterValues {
|
|||
}
|
||||
if(mnemnonic.equals("sty") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
current.setyMem(instruction.getOperand1());
|
||||
if(instruction.getOperand1().equals(current.getxMem())) current.setxMem(null);
|
||||
if(instruction.getOperand1().equals(current.getaMem())) current.setaMem(null);
|
||||
if(instruction.getOperand1().equals(current.getxMem())) current.setxMem(null);
|
||||
if(instruction.getOperand1().equals(current.getzMem())) current.setzMem(null);
|
||||
}
|
||||
if(mnemnonic.equals("ldz") && addressingMode.equals(CpuAddressingMode.IMM)) {
|
||||
current.setZ(instruction.getOperand1());
|
||||
current.setzMem(null);
|
||||
Integer immValue = getImmValue(instruction.getOperand1());
|
||||
if(immValue != null) {
|
||||
current.setFlagZ(immValue == 0);
|
||||
current.setFlagN(immValue > 127);
|
||||
}
|
||||
}
|
||||
if(mnemnonic.equals("ldz") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
current.setzMem(instruction.getOperand1());
|
||||
}
|
||||
if(mnemnonic.equals("stz") && (addressingMode.equals(CpuAddressingMode.ZP) || addressingMode.equals(CpuAddressingMode.ABS))) {
|
||||
current.setzMem(instruction.getOperand1());
|
||||
if(instruction.getOperand1().equals(current.getaMem())) current.setaMem(null);
|
||||
if(instruction.getOperand1().equals(current.getxMem())) current.setxMem(null);
|
||||
if(instruction.getOperand1().equals(current.getyMem())) current.setyMem(null);
|
||||
}
|
||||
if(mnemnonic.equals("txa")) {
|
||||
current.setA(current.getX());
|
||||
|
|
@ -199,11 +227,19 @@ public class AsmProgramStaticRegisterValues {
|
|||
current.setY(current.getA());
|
||||
current.setyMem(current.getaMem());
|
||||
}
|
||||
if(mnemnonic.equals("tza")) {
|
||||
current.setA(current.getZ());
|
||||
current.setaMem(current.getzMem());
|
||||
}
|
||||
if(mnemnonic.equals("taz")) {
|
||||
current.setZ(current.getA());
|
||||
current.setzMem(current.getaMem());
|
||||
}
|
||||
if(mnemnonic.equals("sec")) {
|
||||
current.setC(Boolean.TRUE);
|
||||
current.setFlagC(Boolean.TRUE);
|
||||
}
|
||||
if(mnemnonic.equals("clc")) {
|
||||
current.setC(Boolean.FALSE);
|
||||
current.setFlagC(Boolean.FALSE);
|
||||
}
|
||||
}
|
||||
return current;
|
||||
|
|
@ -213,16 +249,18 @@ public class AsmProgramStaticRegisterValues {
|
|||
* Known values of registers/flags at an instruction. null where value is unknown.
|
||||
*/
|
||||
public static class AsmRegisterValues {
|
||||
private Boolean flagC;
|
||||
private Boolean flagV;
|
||||
private Boolean flagN;
|
||||
private Boolean flagZ;
|
||||
private String a;
|
||||
private String x;
|
||||
private String y;
|
||||
private Boolean c;
|
||||
private Boolean v;
|
||||
private Boolean n;
|
||||
private Boolean z;
|
||||
private String z;
|
||||
private String aMem;
|
||||
private String xMem;
|
||||
private String yMem;
|
||||
private String zMem;
|
||||
|
||||
public AsmRegisterValues() {
|
||||
}
|
||||
|
|
@ -231,13 +269,15 @@ public class AsmProgramStaticRegisterValues {
|
|||
this.a = original.getA();
|
||||
this.x = original.getX();
|
||||
this.y = original.getY();
|
||||
this.c = original.getC();
|
||||
this.v = original.getV();
|
||||
this.n = original.getN();
|
||||
this.z = original.getZ();
|
||||
this.flagZ = original.getFlagZ();
|
||||
this.flagC = original.getFlagC();
|
||||
this.flagV = original.getFlagV();
|
||||
this.flagN = original.getFlagN();
|
||||
this.aMem = original.getaMem();
|
||||
this.xMem = original.getxMem();
|
||||
this.yMem = original.getyMem();
|
||||
this.zMem = original.getzMem();
|
||||
}
|
||||
|
||||
public String getA() {
|
||||
|
|
@ -272,38 +312,46 @@ public class AsmProgramStaticRegisterValues {
|
|||
this.y = y;
|
||||
}
|
||||
|
||||
public Boolean getC() {
|
||||
return c;
|
||||
}
|
||||
|
||||
public void setC(Boolean c) {
|
||||
this.c = c;
|
||||
}
|
||||
|
||||
public Boolean getV() {
|
||||
return v;
|
||||
}
|
||||
|
||||
public void setV(Boolean v) {
|
||||
this.v = v;
|
||||
}
|
||||
|
||||
public Boolean getN() {
|
||||
return n;
|
||||
}
|
||||
|
||||
public void setN(Boolean n) {
|
||||
this.n = n;
|
||||
}
|
||||
|
||||
public Boolean getZ() {
|
||||
public String getZ() {
|
||||
return z;
|
||||
}
|
||||
|
||||
public void setZ(Boolean z) {
|
||||
public void setZ(String z) {
|
||||
this.z = z;
|
||||
}
|
||||
|
||||
public Boolean getFlagC() {
|
||||
return flagC;
|
||||
}
|
||||
|
||||
public void setFlagC(Boolean flagC) {
|
||||
this.flagC = flagC;
|
||||
}
|
||||
|
||||
public Boolean getFlagV() {
|
||||
return flagV;
|
||||
}
|
||||
|
||||
public void setFlagV(Boolean flagV) {
|
||||
this.flagV = flagV;
|
||||
}
|
||||
|
||||
public Boolean getFlagN() {
|
||||
return flagN;
|
||||
}
|
||||
|
||||
public void setFlagN(Boolean flagN) {
|
||||
this.flagN = flagN;
|
||||
}
|
||||
|
||||
public Boolean getFlagZ() {
|
||||
return flagZ;
|
||||
}
|
||||
|
||||
public void setFlagZ(Boolean flagZ) {
|
||||
this.flagZ = flagZ;
|
||||
}
|
||||
|
||||
public String getxMem() {
|
||||
return xMem;
|
||||
}
|
||||
|
|
@ -320,6 +368,14 @@ public class AsmProgramStaticRegisterValues {
|
|||
this.yMem = yMem;
|
||||
}
|
||||
|
||||
public String getzMem() {
|
||||
return zMem;
|
||||
}
|
||||
|
||||
public void setzMem(String zMem) {
|
||||
this.zMem = zMem;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -9,8 +9,10 @@ import java.util.regex.Pattern;
|
|||
/** AsmFragment synthesis mechanism based on matching fragment signature and reusing another fragment with added prefix/postfix and some bind-mappings */
|
||||
class AsmFragmentTemplateSynthesisRule {
|
||||
|
||||
/** Regular expression that matches the signature of fragments that the synthesis rule can handle.
|
||||
* Contains matching groups (parenthesis) that are used in sigReplace to build the signature of the sub-fragment to synthesize from. */
|
||||
/**
|
||||
* Regular expression that matches the signature of fragments that the synthesis rule can handle.
|
||||
* Contains matching groups (parenthesis) that are used in sigReplace to build the signature of the sub-fragment to synthesize from.
|
||||
*/
|
||||
final String sigMatch;
|
||||
|
||||
/** Compiled regex for sigMatch */
|
||||
|
|
@ -34,7 +36,7 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
/** Bindings for mapping replacing parameter names in the signature & ASM of the sub-fragment. */
|
||||
final private Map<String, String> bindMappings;
|
||||
|
||||
/** Indicates whether to map parameters in the signature. If false only the parameters in the ASM are mapped.*/
|
||||
/** Indicates whether to map parameters in the signature. If false only the parameters in the ASM are mapped. */
|
||||
final private boolean mapSignature;
|
||||
|
||||
/** Names of registers ("aa", "xx", "yy") that the sub-fragment is not allowed to clobber. Limits which sub-fragments the rule can use for creating the synthesis. */
|
||||
|
|
@ -70,14 +72,14 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
* @return true if the rule matches the signature
|
||||
*/
|
||||
public boolean matches(String signature) {
|
||||
if (sigMatchPattern == null)
|
||||
if(sigMatchPattern == null)
|
||||
sigMatchPattern = Pattern.compile(sigMatch);
|
||||
Matcher m = sigMatchPattern.matcher(signature);
|
||||
if (m.matches()) {
|
||||
if (sigAvoid == null)
|
||||
if(m.matches()) {
|
||||
if(sigAvoid == null)
|
||||
return true;
|
||||
else {
|
||||
if (sigAvoidPattern == null)
|
||||
if(sigAvoidPattern == null)
|
||||
sigAvoidPattern = Pattern.compile(sigAvoid);
|
||||
Matcher ma = sigAvoidPattern.matcher(signature);
|
||||
return !ma.matches();
|
||||
|
|
@ -114,7 +116,7 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
// if(!subTemplate.getSignature().equals(getSubSignature(signature))) {
|
||||
// throw new RuntimeException("Synthesis error! Attempting to synthesize on non-matching sub template sub-signature:"+subTemplate.getSignature()+" expecting:"+getSubSignature(signature));
|
||||
// }
|
||||
if(subDontClobber!=null) {
|
||||
if(subDontClobber != null) {
|
||||
if(subDontClobber.contains("aa") && subTemplate.getClobber().isClobberA()) return null;
|
||||
if(subDontClobber.contains("xx") && subTemplate.getClobber().isClobberX()) return null;
|
||||
if(subDontClobber.contains("yy") && subTemplate.getClobber().isClobberY()) return null;
|
||||
|
|
@ -143,13 +145,13 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
}
|
||||
newFragment.append(subFragment);
|
||||
if(asmPostfix != null) {
|
||||
if(newFragment.length()>0 && !newFragment.substring(newFragment.length()-1).equals("\n")) {
|
||||
if(newFragment.length() > 0 && !newFragment.substring(newFragment.length() - 1).equals("\n")) {
|
||||
newFragment.append("\n");
|
||||
}
|
||||
newFragment.append(asmPostfix);
|
||||
}
|
||||
if(newFragment.length()>0 && newFragment.charAt(newFragment.length()-1)=='\n') {
|
||||
newFragment = new StringBuilder(newFragment.substring(0, newFragment.length()-1));
|
||||
if(newFragment.length() > 0 && newFragment.charAt(newFragment.length() - 1) == '\n') {
|
||||
newFragment = new StringBuilder(newFragment.substring(0, newFragment.length() - 1));
|
||||
}
|
||||
return new AsmFragmentTemplate(signature, newFragment.toString(), this, subTemplate);
|
||||
}
|
||||
|
|
@ -414,9 +416,9 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
String rvalAa = ".*=.*aa.*|.*_.*aa.*|...aa_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalXx = ".*=.*xx.*|.*_.*xx.*|...xx_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalYy = ".*=.*yy.*|.*_.*yy.*|...yy_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalZz = ".*=.*zz.*|.*_.*zz.*|...zz_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalYy2 = ".*=.*yy.*";
|
||||
String rvalXx2 = ".*=.*xx.*";
|
||||
String rvalZz = ".*=.*zz.*|.*_.*zz.*|...zz_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalZ1 = ".*=.*z1.*|.*_.*z1.*|...z1_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String rvalZ2 = ".*=.*z2.*|.*_.*z2.*|...z2_(lt|gt|le|ge|eq|neq)_.*";
|
||||
String lvalC1 = ".*c1.*=.*";
|
||||
|
|
@ -473,55 +475,55 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
// NEW STYLE REWRITES - Utilizes that all combinations are tried
|
||||
|
||||
// Replace first AA with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*)", lvalAa+"|"+rvalXx, "tax", "$1xx$2", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*)", lvalAa + "|" + rvalXx, "tax", "$1xx$2", null, null));
|
||||
// Replace two AAs with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*vb.)aa(.*)", lvalAa+"|"+rvalXx, "tax", "$1xx$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*vb.)aa(.*)", lvalAa + "|" + rvalXx, "tax", "$1xx$2xx$3", null, null));
|
||||
// Replace second (not first) AA with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)aa(.*vb.)aa(.*)", lvalAa+"|"+rvalXx, "tax", "$1aa$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)aa(.*vb.)aa(.*)", lvalAa + "|" + rvalXx, "tax", "$1aa$2xx$3", null, null));
|
||||
// Replace AA with XX (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)vb(.)aa(.*)", rvalXx, "tax", "$1=$2vb$3xx$4", null, null));
|
||||
// Replace two AAs with XX (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*vb.)aa(.*vb.)aa(.*)", rvalXx, "tax", "$1=$2xx$3xx$4", null, null));
|
||||
|
||||
// Replace first AA with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*)", lvalAa+"|"+rvalYy, "tay", "$1yy$2", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*)", lvalAa + "|" + rvalYy, "tay", "$1yy$2", null, null));
|
||||
// Replace second (not first) AA with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)aa(.*vb.)aa(.*)", lvalAa+"|"+rvalYy, "tay", "$1aa$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)aa(.*vb.)aa(.*)", lvalAa + "|" + rvalYy, "tay", "$1aa$2yy$3", null, null));
|
||||
// Replace two AAs with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*vb.)aa(.*)", lvalAa+"|"+rvalYy, "tay", "$1yy$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)aa(.*vb.)aa(.*)", lvalAa + "|" + rvalYy, "tay", "$1yy$2yy$3", null, null));
|
||||
// Replace AA with YY (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)vb(.)aa(.*)", rvalYy, "tay", "$1=$2vb$3yy$4", null, null));
|
||||
// Replace two AAs with YY (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*vb.)aa(.*vb.)aa(.*)", rvalYy, "tay", "$1=$2yy$3yy$4", null, null));
|
||||
|
||||
// Replace first XX with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)xx(.*)", lvalXx+"|"+rvalAa, "txa", "$1aa$2", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)xx(.*)", lvalXx + "|" + rvalAa, "txa", "$1aa$2", null, null));
|
||||
// Replace two XXs with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)xx(.*vb.)xx(.*)", lvalXx+"|"+rvalAa, "txa", "$1aa$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)xx(.*vb.)xx(.*)", lvalXx + "|" + rvalAa, "txa", "$1aa$2aa$3", null, null));
|
||||
// Replace second (not first) XX with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)xx(.*vb.)xx(.*)", lvalXx+"|"+rvalAa, "txa", "$1xx$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)xx(.*vb.)xx(.*)", lvalXx + "|" + rvalAa, "txa", "$1xx$2aa$3", null, null));
|
||||
// Replace XX with AA (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)vb(.)xx(.*)", rvalAa, "txa", "$1=$2vb$3aa$4", null, null));
|
||||
// Replace two XXs with AA (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*vb.)xx(.*vb.)xx(.*)", rvalAa, "txa", "$1=$2aa$3aa$4", null, null));
|
||||
|
||||
// Replace first YY with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)yy(.*)", lvalYy+"|"+rvalAa, "tya", "$1aa$2", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)yy(.*)", lvalYy + "|" + rvalAa, "tya", "$1aa$2", null, null));
|
||||
// Replace two YYs with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)yy(.*vb.)yy(.*)", lvalYy+"|"+rvalAa, "tya", "$1aa$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)yy(.*vb.)yy(.*)", lvalYy + "|" + rvalAa, "tya", "$1aa$2aa$3", null, null));
|
||||
// Replace second (not first) YY with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)yy(.*vb.)yy(.*)", lvalYy+"|"+rvalAa, "tya", "$1yy$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)yy(.*vb.)yy(.*)", lvalYy + "|" + rvalAa, "tya", "$1yy$2aa$3", null, null));
|
||||
// Replace YY with AA (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)vb(.)yy(.*)", rvalAa, "tya", "$1=$2vb$3aa$4", null, null));
|
||||
// Replace two YYs with AA (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*vb.)yy(.*vb.)yy(.*)", rvalAa, "tya", "$1=$2aa$3aa$4", null, null));
|
||||
|
||||
// Replace first ZZ with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)zz(.*)", lvalZz+"|"+rvalAa, "tza", "$1aa$2", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)zz(.*)", lvalZz + "|" + rvalAa, "tza", "$1aa$2", null, null));
|
||||
// Replace two ZZs with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)zz(.*vb.)zz(.*)", lvalZz+"|"+rvalAa, "tza", "$1aa$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)zz(.*vb.)zz(.*)", lvalZz + "|" + rvalAa, "tza", "$1aa$2aa$3", null, null));
|
||||
// Replace second (not first) ZZ with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)zz(.*vb.)zz(.*)", lvalZz+"|"+rvalAa, "tza", "$1zz$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)zz(.*vb.)zz(.*)", lvalZz + "|" + rvalAa, "tza", "$1zz$2aa$3", null, null));
|
||||
// Replace ZZ with AA (not assigned)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)vb(.)zz(.*)", rvalAa, "tza", "$1=$2vb$3aa$4", null, null));
|
||||
// Replace two ZZs with AA (not assigned)
|
||||
|
|
@ -568,195 +570,195 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)z4(.*)z4(.*)z4(.*)", fourZM4, null, "$1m4$2m4$3m4$4", null, mapZ4M4));
|
||||
|
||||
// Replace M1 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1+"|"+rvalAa+"|"+ twoZM1, "lda {m1}", "$1aa$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1 + "|" + rvalAa + "|" + twoZM1, "lda {m1}", "$1aa$2", null, mapZM1));
|
||||
// Replace two M1s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalAa+"|"+ threeZM1, "lda {m1}", "$1aa$2aa$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalAa + "|" + threeZM1, "lda {m1}", "$1aa$2aa$3", null, mapZM1));
|
||||
// Replace three M1s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalAa+"|"+ fourZM1, "lda {m1}", "$1aa$2aa$3aa$4", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalAa + "|" + fourZM1, "lda {m1}", "$1aa$2aa$3aa$4", null, mapZM1));
|
||||
// Replace first (not second) M1 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1+"|"+rvalAa, "lda {m1}", "$1aa$2m1$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1 + "|" + rvalAa, "lda {m1}", "$1aa$2m1$3", null, null));
|
||||
// Replace second (not first) M1 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalAa, "lda {m1}", "$1m1$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalAa, "lda {m1}", "$1m1$2aa$3", null, null));
|
||||
// Replace non-assigned M1 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...aa)=(.*vb.)m1(.*)", rvalAa+"|"+ twoZM1, "lda {m1}", "$1=$2aa$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...aa)=(.*vb.)m1(.*)", rvalAa + "|" + twoZM1, "lda {m1}", "$1=$2aa$3", null, mapZM1));
|
||||
// Replace assigned M1 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*)", twoZM1, null, "$1aa=$2", "sta {m1}", mapZM1));
|
||||
// Replace assigned M1 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*m1.*)", null, null, "$1aa=$2", "sta {m1}", null));
|
||||
|
||||
// Replace M2 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2+"|"+rvalAa+"|"+twoZM2, "lda {m2}", "$1aa$2", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2 + "|" + rvalAa + "|" + twoZM2, "lda {m2}", "$1aa$2", null, mapZM2));
|
||||
// Replace two M2s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalAa+"|"+threeZM2, "lda {m2}", "$1aa$2aa$3", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalAa + "|" + threeZM2, "lda {m2}", "$1aa$2aa$3", null, mapZM2));
|
||||
// Replace three M2s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalAa+"|"+fourZM2, "lda {m2}", "$1aa$2aa$3aa$4", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalAa + "|" + fourZM2, "lda {m2}", "$1aa$2aa$3aa$4", null, mapZM2));
|
||||
// Replace first (of 2) M2 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2+"|"+rvalAa, "lda {m2}", "$1aa$2m2$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2 + "|" + rvalAa, "lda {m2}", "$1aa$2m2$3", null, null));
|
||||
// Replace second (of 2) M2 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalAa, "lda {m2}", "$1m2$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalAa, "lda {m2}", "$1m2$2aa$3", null, null));
|
||||
|
||||
// Replace M3 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3+"|"+rvalAa+"|"+twoZM3, "lda {m3}", "$1aa$2", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3 + "|" + rvalAa + "|" + twoZM3, "lda {m3}", "$1aa$2", null, mapZM3));
|
||||
// Replace two M3s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalAa+"|"+threeZM3, "lda {m3}", "$1aa$2aa$3", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalAa + "|" + threeZM3, "lda {m3}", "$1aa$2aa$3", null, mapZM3));
|
||||
// Replace three M3s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalAa+"|"+fourZM3, "lda {m3}", "$1aa$2aa$3aa$4", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalAa + "|" + fourZM3, "lda {m3}", "$1aa$2aa$3aa$4", null, mapZM3));
|
||||
// Replace first (of 2) M3 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3+"|"+rvalAa, "lda {m3}", "$1aa$2m3$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3 + "|" + rvalAa, "lda {m3}", "$1aa$2m3$3", null, null));
|
||||
// Replace second (of 2) M3 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalAa, "lda {m3}", "$1m3$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalAa, "lda {m3}", "$1m3$2aa$3", null, null));
|
||||
|
||||
// Replace M4 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4+"|"+rvalAa+"|"+twoZM4, "lda {m4}", "$1aa$2", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4 + "|" + rvalAa + "|" + twoZM4, "lda {m4}", "$1aa$2", null, mapZM4));
|
||||
// Replace two M4s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalAa+"|"+threeZM4, "lda {m4}", "$1aa$2aa$3", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalAa + "|" + threeZM4, "lda {m4}", "$1aa$2aa$3", null, mapZM4));
|
||||
// Replace three M4s with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalAa+"|"+fourZM4, "lda {m4}", "$1aa$2aa$3aa$4", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalAa + "|" + fourZM4, "lda {m4}", "$1aa$2aa$3aa$4", null, mapZM4));
|
||||
// Replace first (of 2) M4 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4+"|"+rvalAa, "lda {m4}", "$1aa$2m4$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4 + "|" + rvalAa, "lda {m4}", "$1aa$2m4$3", null, null));
|
||||
// Replace second (of 2) M4 with AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalAa, "lda {m4}", "$1m4$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalAa, "lda {m4}", "$1m4$2aa$3", null, null));
|
||||
|
||||
// Replace M1 with YY (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1+"|"+rvalYy+"|"+ twoZM1, "ldy {m1}", "$1yy$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1 + "|" + rvalYy + "|" + twoZM1, "ldy {m1}", "$1yy$2", null, mapZM1));
|
||||
// Replace two M1s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalYy+"|"+ threeZM1, "ldy {m1}", "$1yy$2yy$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalYy + "|" + threeZM1, "ldy {m1}", "$1yy$2yy$3", null, mapZM1));
|
||||
// Replace three M1s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalYy+"|"+ fourZM1, "ldy {m1}", "$1yy$2yy$3yy$4", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalYy + "|" + fourZM1, "ldy {m1}", "$1yy$2yy$3yy$4", null, mapZM1));
|
||||
// Replace first (not second) M1 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1+"|"+rvalYy, "ldy {m1}", "$1yy$2m1$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1 + "|" + rvalYy, "ldy {m1}", "$1yy$2m1$3", null, null));
|
||||
// Replace second (not first) M1 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalYy, "ldy {m1}", "$1m1$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalYy, "ldy {m1}", "$1m1$2yy$3", null, null));
|
||||
// Replace non-assigned M1 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...yy)=(.*vb.)m1(.*)", rvalYy+"|"+ twoZM1, "ldy {m1}", "$1=$2yy$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...yy)=(.*vb.)m1(.*)", rvalYy + "|" + twoZM1, "ldy {m1}", "$1=$2yy$3", null, mapZM1));
|
||||
// Replace assigned M1 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*)", twoZM1, null, "$1yy=$2", "sty {m1}", mapZM1));
|
||||
// Replace assigned M1 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*m1.*)", null, null, "$1yy=$2", "sty {m1}", null));
|
||||
|
||||
// Replace M2 with YY (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2+"|"+rvalYy+"|"+twoZM2, "ldy {m2}", "$1yy$2", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2 + "|" + rvalYy + "|" + twoZM2, "ldy {m2}", "$1yy$2", null, mapZM2));
|
||||
// Replace two M2s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalYy+"|"+threeZM2, "ldy {m2}", "$1yy$2yy$3", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalYy + "|" + threeZM2, "ldy {m2}", "$1yy$2yy$3", null, mapZM2));
|
||||
// Replace three M2s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalYy+"|"+fourZM2, "ldy {m2}", "$1yy$2yy$3yy$4", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalYy + "|" + fourZM2, "ldy {m2}", "$1yy$2yy$3yy$4", null, mapZM2));
|
||||
// Replace first (of 2) M2 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2+"|"+rvalYy, "ldy {m2}", "$1yy$2m2$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2 + "|" + rvalYy, "ldy {m2}", "$1yy$2m2$3", null, null));
|
||||
// Replace second (of 2) M2 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalYy, "ldy {m2}", "$1m2$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalYy, "ldy {m2}", "$1m2$2yy$3", null, null));
|
||||
|
||||
// Replace M3 with YY (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3+"|"+rvalYy+"|"+twoZM3, "ldy {m3}", "$1yy$2", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3 + "|" + rvalYy + "|" + twoZM3, "ldy {m3}", "$1yy$2", null, mapZM3));
|
||||
// Replace two M3s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalYy+"|"+threeZM3, "ldy {m3}", "$1yy$2yy$3", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalYy + "|" + threeZM3, "ldy {m3}", "$1yy$2yy$3", null, mapZM3));
|
||||
// Replace three M3s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalYy+"|"+fourZM3, "ldy {m3}", "$1yy$2yy$3yy$4", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalYy + "|" + fourZM3, "ldy {m3}", "$1yy$2yy$3yy$4", null, mapZM3));
|
||||
// Replace first (of 2) M3 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3+"|"+rvalYy, "ldy {m3}", "$1yy$2m3$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3 + "|" + rvalYy, "ldy {m3}", "$1yy$2m3$3", null, null));
|
||||
// Replace second (of 2) M3 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalYy, "ldy {m3}", "$1m3$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalYy, "ldy {m3}", "$1m3$2yy$3", null, null));
|
||||
|
||||
// Replace M4 with YY (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4+"|"+rvalYy+"|"+twoZM4, "ldy {m4}", "$1yy$2", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4 + "|" + rvalYy + "|" + twoZM4, "ldy {m4}", "$1yy$2", null, mapZM4));
|
||||
// Replace two M4s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalYy+"|"+threeZM4, "ldy {m4}", "$1yy$2yy$3", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalYy + "|" + threeZM4, "ldy {m4}", "$1yy$2yy$3", null, mapZM4));
|
||||
// Replace three M4s with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalYy+"|"+fourZM4, "ldy {m4}", "$1yy$2yy$3yy$4", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalYy + "|" + fourZM4, "ldy {m4}", "$1yy$2yy$3yy$4", null, mapZM4));
|
||||
// Replace first (of 2) M4 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4+"|"+rvalYy, "ldy {m4}", "$1yy$2m4$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4 + "|" + rvalYy, "ldy {m4}", "$1yy$2m4$3", null, null));
|
||||
// Replace second (of 2) M4 with YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalYy, "ldy {m4}", "$1m4$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalYy, "ldy {m4}", "$1m4$2yy$3", null, null));
|
||||
|
||||
// Replace M1 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1+"|"+rvalXx+"|"+ twoZM1, "ldx {m1}", "$1xx$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)", lvalZM1 + "|" + rvalXx + "|" + twoZM1, "ldx {m1}", "$1xx$2", null, mapZM1));
|
||||
// Replace two M1s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalXx+"|"+ threeZM1, "ldx {m1}", "$1xx$2xx$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalXx + "|" + threeZM1, "ldx {m1}", "$1xx$2xx$3", null, mapZM1));
|
||||
// Replace three M1s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalXx+"|"+ fourZM1, "ldx {m1}", "$1xx$2xx$3xx$4", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*vb.)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalXx + "|" + fourZM1, "ldx {m1}", "$1xx$2xx$3xx$4", null, mapZM1));
|
||||
// Replace first (not second) M1 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1+"|"+rvalXx, "ldx {m1}", "$1xx$2m1$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m1(.*)m1(.*)", lvalZM1 + "|" + rvalXx, "ldx {m1}", "$1xx$2m1$3", null, null));
|
||||
// Replace second (not first) M1 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1+"|"+rvalXx, "ldx {m1}", "$1m1$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m1(.*vb.)m1(.*)", lvalZM1 + "|" + rvalXx, "ldx {m1}", "$1m1$2xx$3", null, null));
|
||||
// Replace non-assigned M1 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...xx)=(.*vb.)m1(.*)", rvalXx+"|"+ twoZM1, "ldx {m1}", "$1=$2xx$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(...xx)=(.*vb.)m1(.*)", rvalXx + "|" + twoZM1, "ldx {m1}", "$1=$2xx$3", null, mapZM1));
|
||||
// Replace assigned M1 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*)", twoZM1, null, "$1xx=$2", "stx {m1}", mapZM1));
|
||||
// Replace assigned M1 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(vb.)m1=(.*m1.*)", null, null, "$1xx=$2", "stx {m1}", null));
|
||||
|
||||
// Replace M2 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2+"|"+rvalXx+"|"+twoZM2, "ldx {m2}", "$1xx$2", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)", lvalZM2 + "|" + rvalXx + "|" + twoZM2, "ldx {m2}", "$1xx$2", null, mapZM2));
|
||||
// Replace two M2s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalXx+"|"+threeZM2, "ldx {m2}", "$1xx$2xx$3", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalXx + "|" + threeZM2, "ldx {m2}", "$1xx$2xx$3", null, mapZM2));
|
||||
// Replace three M2s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalXx+"|"+fourZM2, "ldx {m2}", "$1xx$2xx$3xx$4", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*vb.)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalXx + "|" + fourZM2, "ldx {m2}", "$1xx$2xx$3xx$4", null, mapZM2));
|
||||
// Replace first (of 2) M2 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2+"|"+rvalXx, "ldx {m2}", "$1xx$2m2$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m2(.*)m2(.*)", lvalZM2 + "|" + rvalXx, "ldx {m2}", "$1xx$2m2$3", null, null));
|
||||
// Replace second (of 2) M2 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2+"|"+rvalXx, "ldx {m2}", "$1m2$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*vb.)m2(.*)", lvalZM2 + "|" + rvalXx, "ldx {m2}", "$1m2$2xx$3", null, null));
|
||||
|
||||
// Replace M3 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3+"|"+rvalXx+"|"+twoZM3, "ldx {m3}", "$1xx$2", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)", lvalZM3 + "|" + rvalXx + "|" + twoZM3, "ldx {m3}", "$1xx$2", null, mapZM3));
|
||||
// Replace two M3s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalXx+"|"+threeZM3, "ldx {m3}", "$1xx$2xx$3", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalXx + "|" + threeZM3, "ldx {m3}", "$1xx$2xx$3", null, mapZM3));
|
||||
// Replace three M3s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalXx+"|"+fourZM3, "ldx {m3}", "$1xx$2xx$3xx$4", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*vb.)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalXx + "|" + fourZM3, "ldx {m3}", "$1xx$2xx$3xx$4", null, mapZM3));
|
||||
// Replace first (of 2) M3 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3+"|"+rvalXx, "ldx {m3}", "$1xx$2m3$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m3(.*)m3(.*)", lvalZM3 + "|" + rvalXx, "ldx {m3}", "$1xx$2m3$3", null, null));
|
||||
// Replace second (of 2) M3 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3+"|"+rvalXx, "ldx {m3}", "$1m3$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*vb.)m3(.*)", lvalZM3 + "|" + rvalXx, "ldx {m3}", "$1m3$2xx$3", null, null));
|
||||
|
||||
// Replace M4 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4+"|"+rvalXx+"|"+twoZM4, "ldx {m4}", "$1xx$2", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)", lvalZM4 + "|" + rvalXx + "|" + twoZM4, "ldx {m4}", "$1xx$2", null, mapZM4));
|
||||
// Replace two M4s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalXx+"|"+threeZM4, "ldx {m4}", "$1xx$2xx$3", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalXx + "|" + threeZM4, "ldx {m4}", "$1xx$2xx$3", null, mapZM4));
|
||||
// Replace three M4s with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalXx+"|"+fourZM4, "ldx {m4}", "$1xx$2xx$3xx$4", null, mapZM4));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*vb.)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalXx + "|" + fourZM4, "ldx {m4}", "$1xx$2xx$3xx$4", null, mapZM4));
|
||||
// Replace first (of 2) M4 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4+"|"+rvalXx, "ldx {m4}", "$1xx$2m4$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*vb.)m4(.*)m4(.*)", lvalZM4 + "|" + rvalXx, "ldx {m4}", "$1xx$2m4$3", null, null));
|
||||
// Replace second (of 2) M4 with XX
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4+"|"+rvalXx, "ldx {m4}", "$1m4$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*vb.)m4(.*)", lvalZM4 + "|" + rvalXx, "ldx {m4}", "$1m4$2xx$3", null, null));
|
||||
|
||||
// Replace _deref_P..C. with V..M.
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)", anyZM1+"|"+twoC1, null, "$1v$2m1$3", null, mapC1M1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)", anyZM1 + "|" + twoC1, null, "$1v$2m1$3", null, mapC1M1));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c1(.*)", anyZM2+"|"+twoC1, null, "$1v$2m2$3", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]1.*)", anyZM2+"|"+twoC1, null, "$1v$2m2$3", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c1(.*)", anyZM2 + "|" + twoC1, null, "$1v$2m2$3", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]1.*)", anyZM2 + "|" + twoC1, null, "$1v$2m2$3", null, mapC1M2));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c1(.*)", anyZM3+"|"+twoC1, null, "$1v$2m3$3", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]2.*)", anyZM3+"|"+twoC1, null, "$1v$2m3$3", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c1(.*)", anyZM3 + "|" + twoC1, null, "$1v$2m3$3", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]2.*)", anyZM3 + "|" + twoC1, null, "$1v$2m3$3", null, mapC1M3));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*)", anyZM1+"|"+twoC2, null, "$1v$2m1$3", null, mapC2M1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*)", anyZM1 + "|" + twoC2, null, "$1v$2m1$3", null, mapC2M1));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c2(.*)", anyZM2+"|"+twoC2, null, "$1v$2m2$3", null, mapC2M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*[zm]1.*)", anyZM2+"|"+twoC2, null, "$1v$2m2$3", null, mapC2M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c2(.*)", anyZM2 + "|" + twoC2, null, "$1v$2m2$3", null, mapC2M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*[zm]1.*)", anyZM2 + "|" + twoC2, null, "$1v$2m2$3", null, mapC2M2));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c2(.*)", anyZM3 + "|" + twoC2, null, "$1v$2m3$3", null, mapC2M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*[zm]2.*)", anyZM3 + "|" + twoC2, null, "$1v$2m3$3", null, mapC2M3));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c2(.*)", anyZM3+"|"+twoC2, null, "$1v$2m3$3", null, mapC2M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c2(.*[zm]2.*)", anyZM3+"|"+twoC2, null, "$1v$2m3$3", null, mapC2M3));
|
||||
|
||||
// Replace two _deref_P..C. with V..M.
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM1+"|"+threeC1, null, "$1v$2m1$3v$4m1$5", null, mapC1M1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM1 + "|" + threeC1, null, "$1v$2m1$3v$4m1$5", null, mapC1M1));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM2+"|"+threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]1.*)_deref_p(..)c1(.*)", anyZM2+"|"+threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*[zm]1.*)", anyZM2+"|"+threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]1.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM2 + "|" + threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]1.*)_deref_p(..)c1(.*)", anyZM2 + "|" + threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*[zm]1.*)", anyZM2 + "|" + threeC1, null, "$1v$2m2$3v$4m2$5", null, mapC1M2));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM3+"|"+threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]2.*)_deref_p(..)c1(.*)", anyZM3+"|"+threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*[zm]2.*)", anyZM3+"|"+threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*[zm]2.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*)", anyZM3 + "|" + threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*[zm]2.*)_deref_p(..)c1(.*)", anyZM3 + "|" + threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_p(..)c1(.*)_deref_p(..)c1(.*[zm]2.*)", anyZM3 + "|" + threeC1, null, "$1v$2m3$3v$4m3$5", null, mapC1M3));
|
||||
|
||||
// Correct wrong ordered Z2/Z1
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)z2(.*)z1(.*)", twoZM1+"|"+twoZM2, null, "$1z1$2z2$3", null, mapZM2Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)z2(.*)z1(.*)", twoZM1 + "|" + twoZM2, null, "$1z1$2z2$3", null, mapZM2Swap, false));
|
||||
// Correct wrong ordered Z2/Z1
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*)m1(.*)", twoZM1+"|"+twoZM2, null, "$1m1$2m2$3", null, mapZM2Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*)m1(.*)", twoZM1 + "|" + twoZM2, null, "$1m1$2m2$3", null, mapZM2Swap, false));
|
||||
// Correct wrong ordered Z3/Z2
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*)m2(.*)", twoZM2+"|"+twoZM3, null, "$1m2$2m3$3", null, mapZM3Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m3(.*)m2(.*)", twoZM2 + "|" + twoZM3, null, "$1m2$2m3$3", null, mapZM3Swap, false));
|
||||
// Correct wrong ordered Z4/Z3
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*)m3(.*)", twoZM3+"|"+twoZM4, null, "$1m3$2m4$3", null, mapZM4Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m4(.*)m3(.*)", twoZM3 + "|" + twoZM4, null, "$1m3$2m4$3", null, mapZM4Swap, false));
|
||||
// Correct wrong ordered Z2/Z1
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*)m2(.*)m1(.*)", twoZM1+"|"+threeZM2, null, "$1m1$2m1$3m2$4", null, mapZM2Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)m2(.*)m2(.*)m1(.*)", twoZM1 + "|" + threeZM2, null, "$1m1$2m1$3m2$4", null, mapZM2Swap, false));
|
||||
// Correct wrong ordered C2/C1
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)c2(.*)c1(.*)", twoC1+"|"+twoC2, null, "$1c1$2c2$3", null, mapC2Swap, false));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)c2(.*)c1(.*)", twoC1 + "|" + twoC2, null, "$1c1$2c2$3", null, mapC2Swap, false));
|
||||
|
||||
// Rewrite comparisons < to >
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_gt_(.*)_then_(.*)", null, null, "$2_lt_$1_then_$3", null, null));
|
||||
|
|
@ -799,103 +801,103 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("_deref_pb(.)z1=(.*z1.*)", null, null, "vb$1aa=$2", "ldy #0\n" + "sta ({z1}),y", null));
|
||||
|
||||
// Rewrite _deref_pb.z1_ to _vb.aa_ (if no other Z1s)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z1(.*)", twoZM1+"|"+rvalAa+"|"+rvalYy+"|"+ lvalDerefZM1, "ldy #0\n"+"lda ({z1}),y", "$1vb$2aa$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z1(.*)", twoZM1 + "|" + rvalAa + "|" + rvalYy + "|" + lvalDerefZM1, "ldy #0\n" + "lda ({z1}),y", "$1vb$2aa$3", null, mapZM1));
|
||||
// Rewrite _deref_pb.z1_ to _vb.aa_ (if other Z1)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z1.*)_deref_pb(.)z1(.*)", rvalAa+"|"+rvalYy+"|"+lvalDerefZM1, "ldy #0\n"+"lda ({z1}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z1.*)_deref_pb(.)z1(.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM1, "ldy #0\n" + "lda ({z1}),y", "$1vb$2aa$3", null, null));
|
||||
// Rewrite _deref_pb.z1_ to _vb.aa_ (if other Z1)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z1(.*[zm]1.*)", rvalAa+"|"+rvalYy+"|"+ lvalDerefZM1, "ldy #0\n"+"lda ({z1}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z1(.*[zm]1.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM1, "ldy #0\n" + "lda ({z1}),y", "$1vb$2aa$3", null, null));
|
||||
// Rewrite _deref_pb.z2_ to _vb.aa_ (if no other Z2s)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z2(.*)", twoZM2+"|"+rvalAa+"|"+rvalYy+"|"+ lvalDerefZM2, "ldy #0\n"+"lda ({z2}),y", "$1vb$2aa$3", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z2(.*)", twoZM2 + "|" + rvalAa + "|" + rvalYy + "|" + lvalDerefZM2, "ldy #0\n" + "lda ({z2}),y", "$1vb$2aa$3", null, mapZM2));
|
||||
// Rewrite _deref_pb.z2_ to _vb.aa_ (if other Z2)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z2.*)_deref_pb(.)z2(.*)", rvalAa+"|"+rvalYy+"|"+lvalDerefZM2, "ldy #0\n"+"lda ({z2}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z2.*)_deref_pb(.)z2(.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM2, "ldy #0\n" + "lda ({z2}),y", "$1vb$2aa$3", null, null));
|
||||
// Rewrite _deref_pb.z2_ to _vb.aa_ (if other Z2)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z2(.*[zm]2.*)", rvalAa+"|"+rvalYy+"|"+ lvalDerefZM2, "ldy #0\n"+"lda ({z2}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z2(.*[zm]2.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM2, "ldy #0\n" + "lda ({z2}),y", "$1vb$2aa$3", null, null));
|
||||
// Rewrite _deref_pb.z3_ to _vb.aa_ (if no other Z3s)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z3(.*)", twoZM3+"|"+rvalAa+"|"+rvalYy+"|"+ lvalDerefZM3, "ldy #0\n"+"lda ({z3}),y", "$1vb$2aa$3", null, mapZM3));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z3(.*)", twoZM3 + "|" + rvalAa + "|" + rvalYy + "|" + lvalDerefZM3, "ldy #0\n" + "lda ({z3}),y", "$1vb$2aa$3", null, mapZM3));
|
||||
// Rewrite _deref_pb.z3_ to _vb.aa_ (if other Z3)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z3.*)_deref_pb(.)z3(.*)", rvalAa+"|"+rvalYy+"|"+lvalDerefZM3, "ldy #0\n"+"lda ({z3}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*z3.*)_deref_pb(.)z3(.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM3, "ldy #0\n" + "lda ({z3}),y", "$1vb$2aa$3", null, null));
|
||||
// Rewrite _deref_pb.z3_ to _vb.aa_ (if other Z3)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z3(.*[zm]3.*)", rvalAa+"|"+rvalYy+"|"+ lvalDerefZM3, "ldy #0\n"+"lda ({z3}),y", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)z3(.*[zm]3.*)", rvalAa + "|" + rvalYy + "|" + lvalDerefZM3, "ldy #0\n" + "lda ({z3}),y", "$1vb$2aa$3", null, null));
|
||||
|
||||
// Rewrite _deref_pb.m1_ to _vb.aa_ (if no other M1s)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)m1(.*)", twoZM1+"|"+rvalAa+"|"+rvalYy+"|"+lvalDerefZM1, "ldy {m1}\nsty $fe\nldy {m1}+1\nsty $ff\nldy #0\n"+"lda ($fe),y", "$1vb$2aa$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)m1(.*)", twoZM1 + "|" + rvalAa + "|" + rvalYy + "|" + lvalDerefZM1, "ldy {m1}\nsty $fe\nldy {m1}+1\nsty $ff\nldy #0\n" + "lda ($fe),y", "$1vb$2aa$3", null, mapZM1));
|
||||
// Rewrite _deref_pb.m2_ to _vb.aa_ (if no other M1s)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)m2(.*)", twoZM2+"|"+rvalAa+"|"+rvalYy+"|"+lvalDerefZM2, "ldy {m2}\nsty $fe\nldy {m2}+1\nsty $ff\nldy #0\n"+"lda ($fe),y", "$1vb$2aa$3", null, mapZM2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)m2(.*)", twoZM2 + "|" + rvalAa + "|" + rvalYy + "|" + lvalDerefZM2, "ldy {m2}\nsty $fe\nldy {m2}+1\nsty $ff\nldy #0\n" + "lda ($fe),y", "$1vb$2aa$3", null, mapZM2));
|
||||
|
||||
// Replace VB*C1 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1+"|"+rvalAa, "lda #{c1}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1 + "|" + rvalAa, "lda #{c1}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)_then_(.*)", rvalAa, "lda #{c1}", "$1vb$2aa$3_then_$4", null, null));
|
||||
// Replace VB*C1 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1+"|"+rvalXx, "ldx #{c1}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1 + "|" + rvalXx, "ldx #{c1}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)_then_(.*)", rvalXx, "ldx #{c1}", "$1vb$2xx$3_then_$4", null, null));
|
||||
// Replace VB*C1 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1+"|"+rvalYy, "ldy #{c1}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", lvalC1 + "|" + rvalYy, "ldy #{c1}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)_then_(.*)", rvalYy, "ldy #{c1}", "$1vb$2yy$3_then_$4", null, null));
|
||||
// Replace VB*C2 with AA (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2+"|"+rvalAa, "lda #{c2}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2 + "|" + rvalAa, "lda #{c2}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)_then_(.*)", rvalAa, "lda #{c2}", "$1vb$2aa$3_then_$4", null, null));
|
||||
// Replace VB*C2 with XX (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2+"|"+rvalXx, "ldx #{c2}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2 + "|" + rvalXx, "ldx #{c2}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)_then_(.*)", rvalXx, "ldx #{c2}", "$1vb$2xx$3_then_$4", null, null));
|
||||
// Replace VB*C2 with YY (only one)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2+"|"+rvalYy, "ldy #{c2}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", lvalC2 + "|" + rvalYy, "ldy #{c2}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)_then_(.*)", rvalYy, "ldy #{c2}", "$1vb$2yy$3_then_$4", null, null));
|
||||
|
||||
// Rewrite *C1 to AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalAa+"|"+lvalDerefC1, "lda {c1}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalXx+"|"+lvalDerefC1, "ldx {c1}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalYy+"|"+lvalDerefC1, "ldy {c1}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalAa + "|" + lvalDerefC1, "lda {c1}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalXx + "|" + lvalDerefC1, "ldx {c1}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c1(.*)", rvalYy + "|" + lvalDerefC1, "ldy {c1}", "$1vb$2yy$3", null, null));
|
||||
// Rewrite *C2 to AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalAa+"|"+lvalDerefC2, "lda {c2}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalXx+"|"+lvalDerefC2, "ldx {c2}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalYy+"|"+lvalDerefC2, "ldy {c2}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalAa + "|" + lvalDerefC2, "lda {c2}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalXx + "|" + lvalDerefC2, "ldx {c2}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c2(.*)", rvalYy + "|" + lvalDerefC2, "ldy {c2}", "$1vb$2yy$3", null, null));
|
||||
// Rewrite *C3 to AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalAa+"|"+lvalDerefC3, "lda {c3}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalXx+"|"+lvalDerefC3, "ldx {c3}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalYy+"|"+lvalDerefC3, "ldy {c3}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalAa + "|" + lvalDerefC3, "lda {c3}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalXx + "|" + lvalDerefC3, "ldx {c3}", "$1vb$2xx$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_deref_pb(.)c3(.*)", rvalYy + "|" + lvalDerefC3, "ldy {c3}", "$1vb$2yy$3", null, null));
|
||||
// Rewrite (Z1),y to AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)pb(.)z1_derefidx_vbuyy(.*)_then_(.*)", twoZM1+"|"+rvalAa, "lda ({z1}),y\n" , "$1vb$2aa$3_then_$4", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)pb(.)z1_derefidx_vbuyy(.*)_then_(.*)", twoZM1 + "|" + rvalAa, "lda ({z1}),y\n", "$1vb$2aa$3_then_$4", null, mapZM1));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite (Z1),z to AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)pb(.)z1_derefidx_vbuzz(.*)_then_(.*)", twoZM1+"|"+rvalAa, "lda ({z1}),z\n" , "$1vb$2aa$3_then_$4", null, mapZM1));
|
||||
// Rewrite (Z1),z to ZZ
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)pb(.)z1_derefidx_vbuzz(.*)_then_(.*)", twoZM1 + "|" + rvalAa, "lda ({z1}),z\n", "$1vb$2aa$3_then_$4", null, mapZM1));
|
||||
|
||||
// Rewrite left-size C1,y to use AA and a STA C1,y
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy=(.*)", null, null, "vb$1aa=$2", "sta {c1},y", null, "yy"));
|
||||
// Rewrite C1,y to save and reload YY from $FF
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy=(.*)", null, "sty $ff" , "vb$1aa=$2", "ldy $ff\nsta {c1},y", null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy=(.*)", null, "sty $ff", "vb$1aa=$2", "ldy $ff\nsta {c1},y", null));
|
||||
// Rewrite C1,y to use AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy=(.*)", null, null , "vb$1aa=$2", "sta {c1},y", null, "yy"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy=(.*)", null, null, "vb$1aa=$2", "sta {c1},y", null, "yy"));
|
||||
// Rewrite (Z1),y to save and reload YY from $FF
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuyy=(.*)", twoZM1, "sty $ff" , "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuyy=(.*)", twoZM1, "sty $ff", "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
// Rewrite (Z1),y to use AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuyy=(.*)", twoZM1, null , "vb$1aa=$2", "sta ({z1}),y", mapZM1, "yy"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuyy=(.*)", twoZM1, null, "vb$1aa=$2", "sta ({z1}),y", mapZM1, "yy"));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite (Z1),z to save and reload ZZ from $FF
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuzz=(.*)", twoZM1, "stz $ff" , "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuzz=(.*)", twoZM1, "stz $ff", "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
|
||||
// Rewrite left-size C1,x to use AA and a STA C1,x
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx=(.*)", null, null, "vb$1aa=$2", "sta {c1},x", null, "xx"));
|
||||
// Rewrite C1,x to save and reload XX from $FF
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx=(.*)", null, "stx $ff" , "vb$1aa=$2", "ldx $ff\nsta {c1},x", null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx=(.*)", null, "stx $ff", "vb$1aa=$2", "ldx $ff\nsta {c1},x", null));
|
||||
// Rewrite C1,x to use AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx=(.*)", null, null , "vb$1aa=$2", "sta {c1},x", null, "xx"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx=(.*)", null, null, "vb$1aa=$2", "sta {c1},x", null, "xx"));
|
||||
// Rewrite (Z1),x to save Y to $FF and reload it into YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuxx=(.*)", twoZM1, "stx $ff" , "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuxx=(.*)", twoZM1, "stx $ff", "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite (Z1),x to save Y to $FF and reload it into YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuxx=(.*)", twoZM1, "stx $ff" , "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuxx=(.*)", twoZM1, "stx $ff", "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
|
||||
// Rewrite (Z1),a to use TAY prefix
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1+"|"+rvalYy, "tay" , "vb$1aa=$2", "sta ({z1}),y", mapZM1, "yy"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1 + "|" + rvalYy, "tay", "vb$1aa=$2", "sta ({z1}),y", mapZM1, "yy"));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite (Z1),a to use TAZ prefix
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1+"|"+rvalZz, "taz" , "vb$1aa=$2", "sta ({z1}),z", mapZM1, "zz"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1 + "|" + rvalZz, "taz", "vb$1aa=$2", "sta ({z1}),z", mapZM1, "zz"));
|
||||
|
||||
// Rewrite (Z1),a to save A to $FF and reload it into YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1, "sta $ff" , "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1, "sta $ff", "vb$1aa=$2", "ldy $ff\nsta ({z1}),y", mapZM1));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite (Z1),a to save A to $FF and reload it into ZZ
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1, "sta $ff" , "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuaa=(.*)", twoZM1, "sta $ff", "vb$1aa=$2", "ldz $ff\nsta ({z1}),z", mapZM1));
|
||||
|
||||
// Synthesize typed pointer math using void pointers
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)p[^v][^o]([czm][1-9])(.*)", null, null, "$1pvo$2$3", null, null));
|
||||
|
|
@ -917,14 +919,21 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", rvalAa+"|"+ derefC1, "lda #{c1}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", rvalYy+"|"+ derefC1, "ldy #{c1}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", rvalXx+"|"+ derefC1, "ldx #{c1}", "$1vb$2xx$3", null, null));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c1(.*)", rvalZz+"|"+ derefC1, "ldz #{c1}", "$1vb$2zz$3", null, null));
|
||||
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", rvalAa+"|"+ derefC2, "lda #{c2}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", rvalYy+"|"+ derefC2, "ldy #{c2}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", rvalXx+"|"+ derefC2, "ldx #{c2}", "$1vb$2xx$3", null, null));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c2(.*)", rvalZz+"|"+ derefC2, "ldz #{c2}", "$1vb$2zz$3", null, null));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c3(.*)", rvalAa+"|"+ derefC3, "lda #{c3}", "$1vb$2aa$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c3(.*)", rvalYy+"|"+ derefC3, "ldy #{c3}", "$1vb$2yy$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c3(.*)", rvalXx+"|"+ derefC3, "ldx #{c3}", "$1vb$2xx$3", null, null));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)vb(.)c3(.*)", rvalZz+"|"+ derefC3, "ldz #{c3}", "$1vb$2zz$3", null, null));
|
||||
|
||||
// Rewrite any signed dereference (.*_derefidx_vbs.*) to unsigned (.*_derefidx_vbu.*)
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbs(.*)", null, null, "$1_derefidx_vbu$2", null, null));
|
||||
|
|
@ -935,10 +944,10 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*c3.*)", ".*c2.*", null, "$1", null, mapC2));
|
||||
|
||||
// Rewrite trailing right-size (Z1),y to use AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)z1_derefidx_vbuyy", twoZM1+"|"+rvalAa, "lda ({z1}),y", "$1=$2vb$3aa", null, mapZM1, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)z1_derefidx_vbuyy", twoZM1 + "|" + rvalAa, "lda ({z1}),y", "$1=$2vb$3aa", null, mapZM1, null));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite trailing right-size (Z1),z to use AA
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)z1_derefidx_vbuzz", twoZM1+"|"+rvalAa, "lda ({z1}),z", "$1=$2vb$3aa", null, mapZM1, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)z1_derefidx_vbuzz", twoZM1 + "|" + rvalAa, "lda ({z1}),z", "$1=$2vb$3aa", null, mapZM1, null));
|
||||
|
||||
|
||||
// Rewrite trailing right-size (Z1),y to use AA - when 2 Z1
|
||||
|
|
@ -961,36 +970,36 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("vbuaa=(.*)_rol_4", rvalAa, null, "vbuaa=$1", "asl\nasl\nasl\nasl", null, null));
|
||||
|
||||
// Rewrite multiple _derefidx_vbuc1 to use YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuc1(.*)_derefidx_vbuc1(.*)", rvalYy+"|"+ threeC1, "ldy #{c1}", "$1_derefidx_vbuyy$2_derefidx_vbuyy$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuc1(.*)_derefidx_vbuc1(.*)", rvalYy + "|" + threeC1, "ldy #{c1}", "$1_derefidx_vbuyy$2_derefidx_vbuyy$3", null, mapC1));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
// Rewrite multiple _derefidx_vbuc1 to use ZZ
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuc1(.*)_derefidx_vbuc1(.*)", rvalZz+"|"+ threeC1, "ldz #{c1}", "$1_derefidx_vbuzz$2_derefidx_vbuzz$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*)", twoZM1+"|"+twoC1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapZM1C1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuc1(.*)_derefidx_vbuc1(.*)", rvalZz + "|" + threeC1, "ldz #{c1}", "$1_derefidx_vbuzz$2_derefidx_vbuzz$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*)", twoZM1 + "|" + twoC1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapZM1C1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*c1.*)", twoZM1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*[mz]1.*)", twoC1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbum2=(.*)", twoZM1+"|"+twoZM2, null, "vb$1aa=$2", "ldy {m2}\n" + "sta ({z1}),y", mapZM12));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbum2=(.*)", twoZM1 + "|" + twoZM2, null, "vb$1aa=$2", "ldy {m2}\n" + "sta ({z1}),y", mapZM12));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbum2=(.*)", twoZM1+"|"+twoZM2, null, "vb$1aa=$2", "ldz {m2}\n" + "sta ({z1}),z", mapZM12));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbum2=(.*)", twoZM1 + "|" + twoZM2, null, "vb$1aa=$2", "ldz {m2}\n" + "sta ({z1}),z", mapZM12));
|
||||
|
||||
// Convert X/Y-based array indexing of a constant pointer into A-register by prefixing lda cn,x / lda cn,y ( ...pb.c1_derefidx_vbuxx... / ...pb.c1_derefidx_vbuyy... -> ...vb.aa... )
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuxx(.*)", rvalAa+"|"+twoC1, "lda {c1},x", "$1=$2vb$3aa$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuxx(.*)", rvalYy+"|"+twoC1, "ldy {c1},x", "$1=$2vb$3yy$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuxx(.*)", rvalAa + "|" + twoC1, "lda {c1},x", "$1=$2vb$3aa$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuxx(.*)", rvalYy + "|" + twoC1, "ldy {c1},x", "$1=$2vb$3yy$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*c1.*)pb(.)c1_derefidx_vbuxx(.*)", rvalAa, "lda {c1},x", "$1=$2vb$3aa$4", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuxx(.*c1.*)", rvalAa, "lda {c1},x", "$1=$2vb$3aa$4", null, null));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuyy(.*)", rvalAa+"|"+twoC1, "lda {c1},y", "$1=$2vb$3aa$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuyy(.*)", rvalXx+"|"+twoC1, "ldx {c1},y", "$1=$2vb$3xx$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuyy(.*)", rvalAa + "|" + twoC1, "lda {c1},y", "$1=$2vb$3aa$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuyy(.*)", rvalXx + "|" + twoC1, "ldx {c1},y", "$1=$2vb$3xx$4", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*c1.*)pb(.)c1_derefidx_vbuyy(.*)", rvalAa, "lda {c1},y", "$1=$2vb$3aa$4", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c1_derefidx_vbuyy(.*c1.*)", rvalAa, "lda {c1},y", "$1=$2vb$3aa$4", null, null));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuxx(.*)", rvalAa+"|"+twoC2, "lda {c2},x", "$1=$2vb$3aa$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuxx(.*)", rvalYy+"|"+twoC2, "ldy {c2},x", "$1=$2vb$3yy$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuxx(.*)", rvalAa + "|" + twoC2, "lda {c2},x", "$1=$2vb$3aa$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuxx(.*)", rvalYy + "|" + twoC2, "ldy {c2},x", "$1=$2vb$3yy$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*c2.*)pb(.)c2_derefidx_vbuxx(.*)", rvalAa, "lda {c2},x", "$1=$2vb$3aa$4", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuxx(.*c2.*)", rvalAa, "lda {c2},x", "$1=$2vb$3aa$4", null, null));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuyy(.*)", rvalAa+"|"+twoC2, "lda {c2},y", "$1=$2vb$3aa$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuyy(.*)", rvalXx+"|"+twoC2, "ldx {c2},y", "$1=$2vb$3xx$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuyy(.*)", rvalAa + "|" + twoC2, "lda {c2},y", "$1=$2vb$3aa$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuyy(.*)", rvalXx + "|" + twoC2, "ldx {c2},y", "$1=$2vb$3xx$4", null, mapC2));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*c2.*)pb(.)c2_derefidx_vbuyy(.*)", rvalAa, "lda {c2},y", "$1=$2vb$3aa$4", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)=(.*)pb(.)c2_derefidx_vbuyy(.*c2.*)", rvalAa, "lda {c2},y", "$1=$2vb$3aa$4", null, null));
|
||||
|
||||
|
|
@ -998,17 +1007,17 @@ class AsmFragmentTemplateSynthesisRule {
|
|||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)\\(([vp][bwd][us][mzcaxy][123456axyz])\\)(.*)", null, null, "$1$2$3", null, null));
|
||||
|
||||
// Rewrite (pbuc1_derefidx_vbuxx) to use YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)", rvalYy+"|"+twoC1, "ldy {c1},x" , "$1vb$2yy$3", null, mapC1, "yy"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)", rvalYy + "|" + twoC1, "ldy {c1},x", "$1vb$2yy$3", null, mapC1, "yy"));
|
||||
// Rewrite 2 * (pbuc1_derefidx_vbuxx) to use YY
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)", rvalYy+"|"+threeC1, "ldy {c1},x" , "$1vb$2yy$3vb$4yy$5", null, mapC1, "yy"));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)\\(pb(.)c1_derefidx_vbuxx\\)(.*)", rvalYy + "|" + threeC1, "ldy {c1},x", "$1vb$2yy$3vb$4yy$5", null, mapC1, "yy"));
|
||||
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(.*)", rvalYy+"|"+twoZM1, "ldy {z1}", "$1_derefidx_vbuyy_$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(.*)", rvalYy + "|" + twoZM1, "ldy {z1}", "$1_derefidx_vbuyy_$2", null, mapZM1));
|
||||
if(targetCpu.getCpu65xx().hasRegisterZ())
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(.*)", rvalZz+"|"+twoZM1, "ldz {z1}", "$1_derefidx_vbuzz_$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(lt|gt|le|ge|eq|neq)_(.*)", rvalXx+"|"+twoZM1, "ldx {z1}", "$1_derefidx_vbuxx_$2_$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy_(lt|gt|le|ge|eq|neq)_(.*)", rvalAa+"|"+twoC1, "lda {c1},y", "vb$1aa_$2_$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(.*)", rvalZz + "|" + twoZM1, "ldz {z1}", "$1_derefidx_vbuzz_$2", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuz1_(lt|gt|le|ge|eq|neq)_(.*)", rvalXx + "|" + twoZM1, "ldx {z1}", "$1_derefidx_vbuxx_$2_$3", null, mapZM1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy_(lt|gt|le|ge|eq|neq)_(.*)", rvalAa + "|" + twoC1, "lda {c1},y", "vb$1aa_$2_$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuyy_(lt|gt|le|ge|eq|neq)_(.*c1.*)", rvalAa, "lda {c1},y", "vb$1aa_$2_$3", null, null));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx_(lt|gt|le|ge|eq|neq)_(.*)", rvalAa+"|"+twoC1, "lda {c1},x", "vb$1aa_$2_$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx_(lt|gt|le|ge|eq|neq)_(.*)", rvalAa + "|" + twoC1, "lda {c1},x", "vb$1aa_$2_$3", null, mapC1));
|
||||
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuxx_(lt|gt|le|ge|eq|neq)_(.*c1.*)", rvalAa, "lda {c1},x", "vb$1aa_$2_$3", null, null));
|
||||
|
||||
// Use unsigned ASM to synthesize signed ASM ( ...vbs... -> ...vbu... )
|
||||
|
|
|
|||
|
|
@ -50,6 +50,10 @@ public class Pass5UnnecesaryLoadElimination extends Pass5AsmOptimization {
|
|||
getLog().append("Replacing instruction " + instruction + " with TYA");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("tya", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
} else if(AsmProgramStaticRegisterValues.matchImm(instructionValues.getZ(), immValue)) {
|
||||
getLog().append("Replacing instruction " + instruction + " with TZA");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("tza", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("lda") && (cpuOpcode.getAddressingMode().equals(CpuAddressingMode.ZP) || cpuOpcode.getAddressingMode().equals(CpuAddressingMode.ABS))) {
|
||||
|
|
@ -65,6 +69,10 @@ public class Pass5UnnecesaryLoadElimination extends Pass5AsmOptimization {
|
|||
getLog().append("Replacing instruction " + instruction + " with TYA");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("tya", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
} else if(instructionValues.getzMem() != null && instructionValues.getzMem().equals(memValue)) {
|
||||
getLog().append("Replacing instruction " + instruction + " with TZA");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("tza", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("ldx") && cpuOpcode.getAddressingMode().equals(CpuAddressingMode.IMM)) {
|
||||
|
|
@ -111,15 +119,37 @@ public class Pass5UnnecesaryLoadElimination extends Pass5AsmOptimization {
|
|||
instruction.setOperand1(null);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("ldz") && cpuOpcode.getAddressingMode().equals(CpuAddressingMode.IMM)) {
|
||||
String immValue = instruction.getOperand1();
|
||||
AsmProgramStaticRegisterValues.AsmRegisterValues instructionValues = staticValues.getValues(instruction);
|
||||
if(AsmProgramStaticRegisterValues.matchImm(instructionValues.getZ(), immValue)) {
|
||||
modified = remove(lineIt);
|
||||
} else if(AsmProgramStaticRegisterValues.matchImm(instructionValues.getA(), immValue)) {
|
||||
getLog().append("Replacing instruction " + instruction + " with TAZ");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("taz", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("ldz") && (cpuOpcode.getAddressingMode().equals(CpuAddressingMode.ZP) || cpuOpcode.getAddressingMode().equals(CpuAddressingMode.ABS))) {
|
||||
String memValue = instruction.getOperand1();
|
||||
AsmProgramStaticRegisterValues.AsmRegisterValues instructionValues = staticValues.getValues(instruction);
|
||||
if(instructionValues.getzMem() != null && instructionValues.getzMem().equals(memValue)) {
|
||||
modified = remove(lineIt);
|
||||
} else if(instructionValues.getaMem() != null && instructionValues.getaMem().equals(memValue)) {
|
||||
getLog().append("Replacing instruction " + instruction + " with TAZ");
|
||||
instruction.setCpuOpcode(getAsmProgram().getTargetCpu().getCpu65xx().getOpcode("taz", CpuAddressingMode.NON, false));
|
||||
instruction.setOperand1(null);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("clc")) {
|
||||
AsmProgramStaticRegisterValues.AsmRegisterValues instructionValues = staticValues.getValues(instruction);
|
||||
if(Boolean.FALSE.equals(instructionValues.getC())) {
|
||||
if(Boolean.FALSE.equals(instructionValues.getFlagC())) {
|
||||
modified = remove(lineIt);
|
||||
}
|
||||
}
|
||||
if(cpuOpcode.getMnemonic().equals("sec")) {
|
||||
AsmProgramStaticRegisterValues.AsmRegisterValues instructionValues = staticValues.getValues(instruction);
|
||||
if(Boolean.TRUE.equals(instructionValues.getC())) {
|
||||
if(Boolean.TRUE.equals(instructionValues.getFlagC())) {
|
||||
modified = remove(lineIt);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@ main: {
|
|||
sta.z sum+2
|
||||
lda #>0>>$10
|
||||
sta.z sum+3
|
||||
lda #0
|
||||
sta.z i
|
||||
ldz #0
|
||||
stz.z i
|
||||
__b1:
|
||||
// for(char i=0;i<100;i++)
|
||||
lda.z i
|
||||
|
|
|
|||
|
|
@ -224,8 +224,8 @@ main: {
|
|||
lda #>0>>$10
|
||||
sta.z sum+3
|
||||
// [1] phi main::i#2 = 0 [phi:main->main::@1#2] -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z i
|
||||
ldz #0
|
||||
stz.z i
|
||||
jmp __b1
|
||||
// main::@1
|
||||
__b1:
|
||||
|
|
@ -351,8 +351,8 @@ main: {
|
|||
lda #>0>>$10
|
||||
sta.z sum+3
|
||||
// [1] phi main::i#2 = 0 [phi:main->main::@1#2] -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z i
|
||||
ldz #0
|
||||
stz.z i
|
||||
// main::@1
|
||||
__b1:
|
||||
// for(char i=0;i<100;i++)
|
||||
|
|
|
|||
|
|
@ -84,8 +84,8 @@ irq: {
|
|||
phz
|
||||
// VICII->IRQ_STATUS = IRQ_RASTER
|
||||
// Acknowledge the IRQ
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
// (VICII->BORDER_COLOR)++;
|
||||
inc VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR
|
||||
// memoryRemapBlock(0x40, 0x100)
|
||||
|
|
@ -99,7 +99,7 @@ irq: {
|
|||
lda #<0
|
||||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
ldz #0
|
||||
taz
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
jsr memoryRemap
|
||||
|
|
@ -128,17 +128,17 @@ main: {
|
|||
lda #<0
|
||||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
ldz #0
|
||||
taz
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
jsr memoryRemap
|
||||
// VICIII->KEY = 0x47
|
||||
// Enable MEGA65 features
|
||||
lda #$47
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$47
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIII->KEY = 0x53
|
||||
lda #$53
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$53
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIV->CONTROLB |= 0x40
|
||||
// Enable 48MHz fast mode
|
||||
lda #$40
|
||||
|
|
@ -150,15 +150,15 @@ main: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC
|
||||
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
// no kernal or BASIC rom visible
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
ldz #PROCPORT_DDR_MEMORY_MASK
|
||||
stz PROCPORT_DDR
|
||||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
ldz #PROCPORT_RAM_IO
|
||||
stz PROCPORT
|
||||
// VICIV->SIDBDRWD_LO = 1
|
||||
// open sideborder
|
||||
lda #1
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #1
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// memcpy_dma4(1, (void*)0x0000, 0, upperCodeData, MUSIC_END-MUSIC)
|
||||
// Transfer banked code/data to upper memory ($10000)
|
||||
jsr memcpy_dma4
|
||||
|
|
@ -175,27 +175,27 @@ main: {
|
|||
lda #<0
|
||||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
ldz #0
|
||||
taz
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
jsr memoryRemap
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = 0xff
|
||||
// Set raster line to 0xff
|
||||
lda #$ff
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
ldz #$ff
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
// VICII->CONTROL1 &= 0x7f
|
||||
lda #$7f
|
||||
and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
// VICII->IRQ_ENABLE = IRQ_RASTER
|
||||
// Enable Raster Interrupt
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
// *HARDWARE_IRQ = &irq
|
||||
// Set the IRQ routine
|
||||
lda #<irq
|
||||
|
|
@ -354,16 +354,16 @@ memcpy_dma4: {
|
|||
lda #>num
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// memcpy_dma_command4.src_bank = src_bank
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// memcpy_dma_command4.src = src
|
||||
lda #<src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// memcpy_dma_command4.dest_bank = dest_bank
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// memcpy_dma_command4.dest = dest
|
||||
lda #<dest
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -371,21 +371,21 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command4)
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command4)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -889,22 +889,22 @@ Allocated zp[1]:19 [ irq::raster#0 ]
|
|||
Allocated zp[1]:20 [ memcpy_dma4::dmaMode#0 ]
|
||||
Allocated mem[12] [ memcpy_dma_command4 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [4] callexecute *musicPlay [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | $40 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement asm { lda#0 } always clobbers reg byte a
|
||||
Statement [24] callexecute *musicInit [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [31] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [38] DEFAULT_SCREEN[main::i#2] = MUSIC[main::i#2] [ main::mem_destroy_i#1 main::i#2 ] ( [ main::mem_destroy_i#1 main::i#2 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:8 [ main::mem_destroy_i#2 main::mem_destroy_i#1 ]
|
||||
|
|
@ -921,31 +921,32 @@ Removing always clobbered register reg byte a as potential for zp[1]:12 [ memory
|
|||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [57] *((unsigned int *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma4::num#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:20 [ memcpy_dma4::dmaMode#0 ]
|
||||
Statement [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:20 [ memcpy_dma4::dmaMode#0 ]
|
||||
Statement [59] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [61] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [66] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [66] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [4] callexecute *musicPlay [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | $40 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *PROCPORT = PROCPORT_RAM_IO [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 [ memcpy_dma_command4 ] ( [ memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement asm { lda#0 } always clobbers reg byte a
|
||||
Statement [24] callexecute *musicInit [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [31] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [38] DEFAULT_SCREEN[main::i#2] = MUSIC[main::i#2] [ main::mem_destroy_i#1 main::i#2 ] ( [ main::mem_destroy_i#1 main::i#2 ] { } ) always clobbers reg byte a
|
||||
Statement [44] memoryRemap::aVal = byte0 memoryRemap::lowerPageOffset#4 [ memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] ( memoryRemap:6 [ memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] { } memoryRemap:12 [ memcpy_dma_command4 memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] { } memoryRemap:26 [ memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] { } memoryRemapBlock:2::memoryRemap:41 [ memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] { } memoryRemapBlock:22::memoryRemap:41 [ memoryRemap::lowerPageOffset#4 memoryRemap::remapBlocks#4 memoryRemap::upperPageOffset#4 memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
|
|
@ -956,15 +957,15 @@ Statement [50] memoryRemap::$6 = memoryRemap::remapBlocks#4 & $f0 [ memoryRemap:
|
|||
Statement [52] memoryRemap::$8 = memoryRemap::$7 & $f [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] ( memoryRemap:6 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] { } memoryRemap:12 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] { } memoryRemap:26 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] { } memoryRemapBlock:2::memoryRemap:41 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] { } memoryRemapBlock:22::memoryRemap:41 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::$6 memoryRemap::$8 ] { } ) always clobbers reg byte a
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [57] *((unsigned int *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma4::num#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [59] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [61] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [66] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [66] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:20 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:8 [ main::mem_destroy_i#2 main::mem_destroy_i#1 ] : zp[1]:8 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:2 [ main::i#2 main::i#1 ] : zp[1]:2 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[2]:9 [ memoryRemap::lowerPageOffset#4 ] : zp[2]:9 ,
|
||||
|
|
@ -981,7 +982,7 @@ Potential registers zp[1]:12 [ memoryRemap::$6 ] : zp[1]:12 , reg byte x , reg b
|
|||
Potential registers zp[1]:5 [ memoryRemap::$7 ] : zp[1]:5 , reg byte a , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memoryRemap::$8 ] : zp[1]:6 , reg byte a , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:7 [ memoryRemap::zVal ] : zp[1]:7 ,
|
||||
Potential registers zp[1]:20 [ memcpy_dma4::dmaMode#0 ] : zp[1]:20 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:20 [ memcpy_dma4::dmaMode#0 ] : zp[1]:20 , reg byte x , reg byte y ,
|
||||
Potential registers mem[12] [ memcpy_dma_command4 ] : mem[12] ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
|
|
@ -1133,8 +1134,8 @@ irq: {
|
|||
phz
|
||||
// [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER -- _deref_pbuc1=vbuc2
|
||||
// Acknowledge the IRQ
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
// [1] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = ++ *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) -- _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR
|
||||
// [2] call memoryRemapBlock
|
||||
|
|
@ -1227,11 +1228,11 @@ main: {
|
|||
__b5:
|
||||
// [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable MEGA65 features
|
||||
lda #$47
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$47
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$53
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 48MHz fast mode
|
||||
lda #$40
|
||||
|
|
@ -1243,15 +1244,15 @@ main: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC
|
||||
// [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
||||
// no kernal or BASIC rom visible
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
ldz #PROCPORT_DDR_MEMORY_MASK
|
||||
stz PROCPORT_DDR
|
||||
// [18] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
ldz #PROCPORT_RAM_IO
|
||||
stz PROCPORT
|
||||
// [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 -- _deref_pbuc1=vbuc2
|
||||
// open sideborder
|
||||
lda #1
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #1
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// [20] call memcpy_dma4
|
||||
// Transfer banked code/data to upper memory ($10000)
|
||||
jsr memcpy_dma4
|
||||
|
|
@ -1301,20 +1302,20 @@ main: {
|
|||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff -- _deref_pbuc1=vbuc2
|
||||
// Set raster line to 0xff
|
||||
lda #$ff
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
ldz #$ff
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
// [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
lda #$7f
|
||||
and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
// [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER -- _deref_pbuc1=vbuc2
|
||||
// Enable Raster Interrupt
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
// [31] *HARDWARE_IRQ = &irq -- _deref_qprc1=pprc2
|
||||
// Set the IRQ routine
|
||||
lda #<irq
|
||||
|
|
@ -1505,16 +1506,16 @@ memcpy_dma4: {
|
|||
lda #>num
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// [59] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// [61] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -1522,22 +1523,22 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [66] *((char *)DMA) = byte0 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma4::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -1587,15 +1588,18 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #>0
|
||||
Replacing instruction ldz #0 with TAZ
|
||||
Removing instruction lda #<0
|
||||
Removing instruction lda #>0
|
||||
Removing instruction lda #>0
|
||||
Replacing instruction ldz #0 with TAZ
|
||||
Removing instruction lda #<0
|
||||
Removing instruction lda #>0
|
||||
Removing instruction lda #>0
|
||||
Replacing instruction ldz #0 with TAZ
|
||||
Removing instruction lda #<0
|
||||
Removing instruction lda #>0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b4_from_irq:
|
||||
Removing instruction __b1_from___b4:
|
||||
|
|
@ -1741,7 +1745,7 @@ mem[12] [ memcpy_dma_command4 ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 3050
|
||||
Score: 3047
|
||||
|
||||
// File Comments
|
||||
// SID music located in another bank being played in a raster IRQ using memory mapping on the MEGA65
|
||||
|
|
@ -1835,8 +1839,8 @@ irq: {
|
|||
// VICII->IRQ_STATUS = IRQ_RASTER
|
||||
// [0] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER -- _deref_pbuc1=vbuc2
|
||||
// Acknowledge the IRQ
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
// (VICII->BORDER_COLOR)++;
|
||||
// [1] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = ++ *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) -- _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR
|
||||
|
|
@ -1862,7 +1866,7 @@ irq: {
|
|||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
// [43] phi memoryRemap::remapBlocks#4 = 0 [phi:irq::@1->memoryRemap#1] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
taz
|
||||
// [43] phi memoryRemap::lowerPageOffset#4 = 0 [phi:irq::@1->memoryRemap#2] -- vwuz1=vbuc1
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
|
|
@ -1907,7 +1911,7 @@ main: {
|
|||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
// [43] phi memoryRemap::remapBlocks#4 = 0 [phi:main->memoryRemap#1] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
taz
|
||||
// [43] phi memoryRemap::lowerPageOffset#4 = 0 [phi:main->memoryRemap#2] -- vwuz1=vbuc1
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
|
|
@ -1916,12 +1920,12 @@ main: {
|
|||
// VICIII->KEY = 0x47
|
||||
// [13] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable MEGA65 features
|
||||
lda #$47
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$47
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIII->KEY = 0x53
|
||||
// [14] *((char *)VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY) = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$53
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIV->CONTROLB |= 0x40
|
||||
// [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 48MHz fast mode
|
||||
|
|
@ -1936,17 +1940,17 @@ main: {
|
|||
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
// [17] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
||||
// no kernal or BASIC rom visible
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
ldz #PROCPORT_DDR_MEMORY_MASK
|
||||
stz PROCPORT_DDR
|
||||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
// [18] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
ldz #PROCPORT_RAM_IO
|
||||
stz PROCPORT
|
||||
// VICIV->SIDBDRWD_LO = 1
|
||||
// [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 1 -- _deref_pbuc1=vbuc2
|
||||
// open sideborder
|
||||
lda #1
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #1
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// memcpy_dma4(1, (void*)0x0000, 0, upperCodeData, MUSIC_END-MUSIC)
|
||||
// [20] call memcpy_dma4
|
||||
// Transfer banked code/data to upper memory ($10000)
|
||||
|
|
@ -1977,7 +1981,7 @@ main: {
|
|||
sta.z memoryRemap.upperPageOffset
|
||||
sta.z memoryRemap.upperPageOffset+1
|
||||
// [43] phi memoryRemap::remapBlocks#4 = 0 [phi:main::@1->memoryRemap#1] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
taz
|
||||
// [43] phi memoryRemap::lowerPageOffset#4 = 0 [phi:main::@1->memoryRemap#2] -- vwuz1=vbuc1
|
||||
sta.z memoryRemap.lowerPageOffset
|
||||
sta.z memoryRemap.lowerPageOffset+1
|
||||
|
|
@ -1987,13 +1991,13 @@ main: {
|
|||
// [27] *((char *)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR -- _deref_pbuc1=vbuc2
|
||||
// Set up raster interrupts C64 style
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = 0xff
|
||||
// [28] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $ff -- _deref_pbuc1=vbuc2
|
||||
// Set raster line to 0xff
|
||||
lda #$ff
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
ldz #$ff
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
// VICII->CONTROL1 &= 0x7f
|
||||
// [29] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
|
||||
lda #$7f
|
||||
|
|
@ -2002,8 +2006,8 @@ main: {
|
|||
// VICII->IRQ_ENABLE = IRQ_RASTER
|
||||
// [30] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE) = IRQ_RASTER -- _deref_pbuc1=vbuc2
|
||||
// Enable Raster Interrupt
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
// *HARDWARE_IRQ = &irq
|
||||
// [31] *HARDWARE_IRQ = &irq -- _deref_qprc1=pprc2
|
||||
// Set the IRQ routine
|
||||
|
|
@ -2206,8 +2210,8 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// memcpy_dma_command4.src_bank = src_bank
|
||||
// [58] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// memcpy_dma_command4.src = src
|
||||
// [59] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
|
|
@ -2216,8 +2220,8 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// memcpy_dma_command4.dest_bank = dest_bank
|
||||
// [60] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// memcpy_dma_command4.dest = dest
|
||||
// [61] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
|
|
@ -2227,25 +2231,25 @@ memcpy_dma4: {
|
|||
// DMA->EN018B = 1
|
||||
// [62] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [63] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [64] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command4)
|
||||
// [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command4)
|
||||
// [66] *((char *)DMA) = byte0 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma4::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -35,25 +35,25 @@ main: {
|
|||
jsr memoryRemap
|
||||
// DMA->EN018B = 1
|
||||
// Enable enable F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&DMA_SCREEN_UP)
|
||||
lda #>DMA_SCREEN_UP
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>DMA_SCREEN_UP
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&DMA_SCREEN_UP)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<DMA_SCREEN_UP
|
||||
sta DMA
|
||||
ldz #<DMA_SCREEN_UP
|
||||
stz DMA
|
||||
// DMA->EN018B = 0
|
||||
// Re-enable F018A mode
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// }
|
||||
rts
|
||||
}
|
||||
|
|
@ -89,22 +89,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
|
|||
|
|
@ -297,16 +297,16 @@ Allocated zp[1]:4 [ memoryRemap::xVal ]
|
|||
Allocated zp[1]:5 [ memoryRemap::aVal ]
|
||||
Allocated mem[12] [ DMA_SCREEN_UP ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [2] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte a
|
||||
Statement [3] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte a
|
||||
Statement [4] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte a
|
||||
Statement [5] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &DMA_SCREEN_UP [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)DMA) = byte0 &DMA_SCREEN_UP [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [7] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [10] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [11] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [12] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [2] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte z
|
||||
Statement [3] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte z
|
||||
Statement [4] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte z
|
||||
Statement [5] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &DMA_SCREEN_UP [ DMA_SCREEN_UP ] ( [ DMA_SCREEN_UP ] { } ) always clobbers reg byte z
|
||||
Statement [6] *((char *)DMA) = byte0 &DMA_SCREEN_UP [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [7] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 0 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [9] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [10] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [11] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [12] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ DMA_SCREEN_UP memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
|
|
@ -392,26 +392,26 @@ main: {
|
|||
__b1:
|
||||
// [2] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Enable enable F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [3] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [4] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [5] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &DMA_SCREEN_UP -- _deref_pbuc1=vbuc2
|
||||
lda #>DMA_SCREEN_UP
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>DMA_SCREEN_UP
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [6] *((char *)DMA) = byte0 &DMA_SCREEN_UP -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<DMA_SCREEN_UP
|
||||
sta DMA
|
||||
ldz #<DMA_SCREEN_UP
|
||||
stz DMA
|
||||
// [7] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Re-enable F018A mode
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
jmp __breturn
|
||||
// main::@return
|
||||
__breturn:
|
||||
|
|
@ -451,20 +451,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [9] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [10] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [11] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [12] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -493,10 +493,11 @@ Removing instruction jmp __b1
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1:
|
||||
Removing instruction __breturn:
|
||||
|
|
@ -530,7 +531,7 @@ mem[12] [ DMA_SCREEN_UP ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 85
|
||||
Score: 81
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using F018 directly
|
||||
|
|
@ -576,30 +577,30 @@ main: {
|
|||
// DMA->EN018B = 1
|
||||
// [2] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Enable enable F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [3] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [4] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&DMA_SCREEN_UP)
|
||||
// [5] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &DMA_SCREEN_UP -- _deref_pbuc1=vbuc2
|
||||
lda #>DMA_SCREEN_UP
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>DMA_SCREEN_UP
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&DMA_SCREEN_UP)
|
||||
// [6] *((char *)DMA) = byte0 &DMA_SCREEN_UP -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<DMA_SCREEN_UP
|
||||
sta DMA
|
||||
ldz #<DMA_SCREEN_UP
|
||||
stz DMA
|
||||
// DMA->EN018B = 0
|
||||
// [7] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Re-enable F018A mode
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// main::@return
|
||||
// }
|
||||
// [8] return
|
||||
|
|
@ -639,26 +640,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [9] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [10] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [11] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [12] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
|
|||
|
|
@ -76,22 +76,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -128,21 +127,21 @@ memcpy_dma: {
|
|||
sta memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command)
|
||||
lda #>memcpy_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -399,38 +399,39 @@ Allocated zp[1]:5 [ memoryRemap::aVal ]
|
|||
Allocated zp[1]:6 [ memcpy_dma::dmaMode#0 ]
|
||||
Allocated mem[12] [ memcpy_dma_command ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma::num#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:6 [ memcpy_dma::dmaMode#0 ]
|
||||
Statement [13] *((char **)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma::src#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char **)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma::dest#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA) = byte0 &memcpy_dma_command [ memcpy_dma::dmaMode#0 ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:6 [ memcpy_dma::dmaMode#0 ]
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA) = byte0 &memcpy_dma_command [ memcpy_dma::dmaMode#0 ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma::num#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char **)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma::src#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char **)&memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma::dest#0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA) = byte0 &memcpy_dma_command [ memcpy_dma::dmaMode#0 ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command [ memcpy_dma::dmaMode#0 memcpy_dma_command ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 memcpy_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA) = byte0 &memcpy_dma_command [ memcpy_dma::dmaMode#0 ] ( memcpy_dma:3 [ memcpy_dma::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
Potential registers zp[1]:3 [ memoryRemap::yVal ] : zp[1]:3 ,
|
||||
Potential registers zp[1]:2 [ memoryRemap::zVal ] : zp[1]:2 ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y ,
|
||||
Potential registers mem[12] [ memcpy_dma_command ] : mem[12] ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
|
|
@ -560,20 +561,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -619,22 +620,22 @@ memcpy_dma: {
|
|||
sta memcpy_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [19] *((char *)DMA) = byte0 &memcpy_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command
|
||||
stz DMA
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -660,10 +661,11 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1_from_main:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
|
|
@ -713,7 +715,7 @@ mem[12] [ memcpy_dma_command ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 135
|
||||
Score: 131
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using memcpy version
|
||||
|
|
@ -805,26 +807,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -869,25 +870,25 @@ memcpy_dma: {
|
|||
// DMA->EN018B = 1
|
||||
// [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command)
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command)
|
||||
// [19] *((char *)DMA) = byte0 &memcpy_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -78,22 +78,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -123,16 +122,16 @@ memcpy_dma4: {
|
|||
lda #>num
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// memcpy_dma_command4.src_bank = src_bank
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// memcpy_dma_command4.src = src
|
||||
lda #<src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// memcpy_dma_command4.dest_bank = dest_bank
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// memcpy_dma_command4.dest = dest
|
||||
lda #<dest
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -140,21 +139,21 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command4)
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command4)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -429,42 +429,43 @@ Allocated zp[1]:5 [ memoryRemap::aVal ]
|
|||
Allocated zp[1]:6 [ memcpy_dma4::dmaMode#0 ]
|
||||
Allocated mem[12] [ memcpy_dma_command4 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma4::num#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:6 [ memcpy_dma4::dmaMode#0 ]
|
||||
Statement [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:6 [ memcpy_dma4::dmaMode#0 ]
|
||||
Statement [14] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memcpy_dma_command4 memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma4::num#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 memcpy_dma_command4 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA) = byte0 &memcpy_dma_command4 [ memcpy_dma4::dmaMode#0 ] ( memcpy_dma4:3 [ memcpy_dma4::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
Potential registers zp[1]:3 [ memoryRemap::yVal ] : zp[1]:3 ,
|
||||
Potential registers zp[1]:2 [ memoryRemap::zVal ] : zp[1]:2 ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma4::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma4::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y ,
|
||||
Potential registers mem[12] [ memcpy_dma_command4 ] : mem[12] ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
|
|
@ -596,20 +597,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -648,16 +649,16 @@ memcpy_dma4: {
|
|||
lda #>num
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// [14] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// [16] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -665,22 +666,22 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [21] *((char *)DMA) = byte0 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma4::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -706,10 +707,11 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1_from_main:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
|
|
@ -765,7 +767,7 @@ mem[12] [ memcpy_dma_command4 ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 147
|
||||
Score: 143
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using 4MB version
|
||||
|
|
@ -859,26 +861,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -914,8 +915,8 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// memcpy_dma_command4.src_bank = src_bank
|
||||
// [13] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma4::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// memcpy_dma_command4.src = src
|
||||
// [14] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma4::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
|
|
@ -924,8 +925,8 @@ memcpy_dma4: {
|
|||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// memcpy_dma_command4.dest_bank = dest_bank
|
||||
// [15] *((char *)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma4::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// memcpy_dma_command4.dest = dest
|
||||
// [16] *((char **)&memcpy_dma_command4+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma4::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
|
|
@ -935,25 +936,25 @@ memcpy_dma4: {
|
|||
// DMA->EN018B = 1
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memcpy_dma_command4)
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command4
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command4
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memcpy_dma_command4)
|
||||
// [21] *((char *)DMA) = byte0 &memcpy_dma_command4 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memcpy_dma_command4
|
||||
sta DMA
|
||||
ldz #<memcpy_dma_command4
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma4::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -87,22 +87,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -132,27 +131,27 @@ memcpy_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// memcpy_dma_command256[1] = src_mb
|
||||
// Set up command
|
||||
lda #src_mb
|
||||
sta memcpy_dma_command256+1
|
||||
ldz #src_mb
|
||||
stz memcpy_dma_command256+1
|
||||
// memcpy_dma_command256[3] = dest_mb
|
||||
lda #dest_mb
|
||||
sta memcpy_dma_command256+3
|
||||
ldz #dest_mb
|
||||
stz memcpy_dma_command256+3
|
||||
// f018b->count = num
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->src_bank = src_bank
|
||||
lda #src_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// f018b->src = src
|
||||
lda #<src
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -160,21 +159,21 @@ memcpy_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memcpy_dma_command256)
|
||||
lda #>memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memcpy_dma_command256)
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -535,46 +535,47 @@ Allocated zp[1]:4 [ memoryRemap::xVal ]
|
|||
Allocated zp[1]:5 [ memoryRemap::aVal ]
|
||||
Allocated zp[1]:6 [ memcpy_dma256::dmaMode#0 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:6 [ memcpy_dma256::dmaMode#0 ]
|
||||
Statement [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((unsigned int *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma256::num#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:6 [ memcpy_dma256::dmaMode#0 ]
|
||||
Statement [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((unsigned int *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma256::num#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma256::src#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma256::dest#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((unsigned int *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma256::num#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma256::src#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma256::dest#0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 [ memcpy_dma256::dmaMode#0 ] ( memcpy_dma256:3 [ memcpy_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
Potential registers zp[1]:3 [ memoryRemap::yVal ] : zp[1]:3 ,
|
||||
Potential registers zp[1]:2 [ memoryRemap::zVal ] : zp[1]:2 ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma256::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memcpy_dma256::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [memoryRemap] 11: zp[1]:2 [ memoryRemap::zVal ] 5.5: zp[1]:3 [ memoryRemap::yVal ] 3.67: zp[1]:4 [ memoryRemap::xVal ] 2.75: zp[1]:5 [ memoryRemap::aVal ]
|
||||
|
|
@ -714,20 +715,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -766,27 +767,27 @@ memcpy_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #src_mb
|
||||
sta memcpy_dma_command256+1
|
||||
ldz #src_mb
|
||||
stz memcpy_dma_command256+1
|
||||
// [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_mb
|
||||
sta memcpy_dma_command256+3
|
||||
ldz #dest_mb
|
||||
stz memcpy_dma_command256+3
|
||||
// [14] *((unsigned int *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// [16] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma256::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC
|
||||
lda #>src
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// [18] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -794,22 +795,22 @@ memcpy_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// [24] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -831,10 +832,11 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1_from_main:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
|
|
@ -900,7 +902,7 @@ reg byte x [ memcpy_dma256::dmaMode#0 ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 159
|
||||
Score: 155
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using 256MB version
|
||||
|
|
@ -1003,26 +1005,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -1057,12 +1058,12 @@ memcpy_dma256: {
|
|||
// memcpy_dma_command256[1] = src_mb
|
||||
// [12] *(memcpy_dma_command256+1) = memcpy_dma256::src_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #src_mb
|
||||
sta memcpy_dma_command256+1
|
||||
ldz #src_mb
|
||||
stz memcpy_dma_command256+1
|
||||
// memcpy_dma_command256[3] = dest_mb
|
||||
// [13] *(memcpy_dma_command256+3) = memcpy_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_mb
|
||||
sta memcpy_dma_command256+3
|
||||
ldz #dest_mb
|
||||
stz memcpy_dma_command256+3
|
||||
// f018b->count = num
|
||||
// [14] *((unsigned int *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memcpy_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
|
|
@ -1071,8 +1072,8 @@ memcpy_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->src_bank = src_bank
|
||||
// [15] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK) = memcpy_dma256::src_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #src_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
ldz #src_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC_BANK
|
||||
// f018b->src = src
|
||||
// [16] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memcpy_dma256::src#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<src
|
||||
|
|
@ -1081,8 +1082,8 @@ memcpy_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
// [17] *((char *)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memcpy_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
// [18] *((char **)memcpy_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memcpy_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
|
|
@ -1092,25 +1093,25 @@ memcpy_dma256: {
|
|||
// DMA->EN018B = 1
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memcpy_dma_command256)
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memcpy_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memcpy_dma_command256)
|
||||
// [23] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memcpy_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memcpy_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memcpy_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// [24] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memcpy_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -76,22 +76,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -128,21 +127,21 @@ memset_dma: {
|
|||
sta memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memset_dma_command)
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memset_dma_command)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -395,38 +395,39 @@ Allocated zp[1]:5 [ memoryRemap::aVal ]
|
|||
Allocated zp[1]:6 [ memset_dma::dmaMode#0 ]
|
||||
Allocated mem[12] [ memset_dma_command ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma::num#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:6 [ memset_dma::dmaMode#0 ]
|
||||
Statement [13] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma::fill#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma::dest#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 ] ( memset_dma:3 [ memset_dma::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:6 [ memset_dma::dmaMode#0 ]
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 ] ( memset_dma:3 [ memset_dma::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *((unsigned int *)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma::num#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma::fill#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma::dest#0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 ] ( memset_dma:3 [ memset_dma::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:3 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 ] ( memset_dma:3 [ memset_dma::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
Potential registers zp[1]:3 [ memoryRemap::yVal ] : zp[1]:3 ,
|
||||
Potential registers zp[1]:2 [ memoryRemap::zVal ] : zp[1]:2 ,
|
||||
Potential registers zp[1]:6 [ memset_dma::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memset_dma::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y ,
|
||||
Potential registers mem[12] [ memset_dma_command ] : mem[12] ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
|
|
@ -556,20 +557,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -615,22 +616,22 @@ memset_dma: {
|
|||
sta memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [19] *((char *)DMA) = byte0 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -656,10 +657,11 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1_from_main:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
|
|
@ -709,7 +711,7 @@ mem[12] [ memset_dma_command ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 135
|
||||
Score: 131
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using memset
|
||||
|
|
@ -801,26 +803,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -865,25 +866,25 @@ memset_dma: {
|
|||
// DMA->EN018B = 1
|
||||
// [15] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [16] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memset_dma_command)
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memset_dma_command)
|
||||
// [19] *((char *)DMA) = byte0 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -84,22 +84,21 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -124,16 +123,16 @@ memset_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// memset_dma_command256[1] = dest_mb
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// f018b->count = num
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -147,21 +146,21 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memset_dma_command256)
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memset_dma_command256)
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -488,42 +488,43 @@ Allocated zp[1]:4 [ memoryRemap::xVal ]
|
|||
Allocated zp[1]:5 [ memoryRemap::aVal ]
|
||||
Allocated zp[1]:6 [ memset_dma256::dmaMode#0 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:6 [ memset_dma256::dmaMode#0 ]
|
||||
Statement [13] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:6 [ memset_dma256::dmaMode#0 ]
|
||||
Statement [13] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [15] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma256::fill#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [5] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:1 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [6] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [7] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [8] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:1 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [13] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [15] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma256::fill#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:3 [ memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:5 [ memoryRemap::aVal ] : zp[1]:5 ,
|
||||
Potential registers zp[1]:4 [ memoryRemap::xVal ] : zp[1]:4 ,
|
||||
Potential registers zp[1]:3 [ memoryRemap::yVal ] : zp[1]:3 ,
|
||||
Potential registers zp[1]:2 [ memoryRemap::zVal ] : zp[1]:2 ,
|
||||
Potential registers zp[1]:6 [ memset_dma256::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:6 [ memset_dma256::dmaMode#0 ] : zp[1]:6 , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [memoryRemap] 11: zp[1]:2 [ memoryRemap::zVal ] 5.5: zp[1]:3 [ memoryRemap::yVal ] 3.67: zp[1]:4 [ memoryRemap::xVal ] 2.75: zp[1]:5 [ memoryRemap::aVal ]
|
||||
|
|
@ -660,20 +661,20 @@ memoryRemap: {
|
|||
.label zVal = 2
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -707,16 +708,16 @@ memset_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// [13] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// [15] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -730,22 +731,22 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -767,10 +768,11 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b1_from_main:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
|
|
@ -830,7 +832,7 @@ reg byte x [ memset_dma256::dmaMode#0 ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 147
|
||||
Score: 143
|
||||
|
||||
// File Comments
|
||||
// MEGA65 DMA test using memset
|
||||
|
|
@ -930,26 +932,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [5] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [6] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [7] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [8] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -979,8 +980,8 @@ memset_dma256: {
|
|||
// memset_dma_command256[1] = dest_mb
|
||||
// [12] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// f018b->count = num
|
||||
// [13] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
|
|
@ -989,8 +990,8 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
// [14] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
// [15] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
|
|
@ -1007,25 +1008,25 @@ memset_dma256: {
|
|||
// DMA->EN018B = 1
|
||||
// [17] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [18] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [19] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memset_dma_command256)
|
||||
// [20] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memset_dma_command256)
|
||||
// [21] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// [22] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -89,27 +89,27 @@ main: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC
|
||||
// VICIV->KEY = 0x47
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$47
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// VICIV->KEY = 0x53
|
||||
lda #$53
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$53
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// VICIV->SIDBDRWD_LO = 0
|
||||
// Set sideborder width=0, disable raster delay and hot registers
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// VICIV->SIDBDRWD_HI = 0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
// VICIV->TBDRPOS_LO = 0
|
||||
// Disable top/bottom borders
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
// VICIV->TBDRPOS_HI = 0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
// VICIV->BBDRPOS_LO = 0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
// VICIV->BBDRPOS_HI = 2
|
||||
lda #2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
ldz #2
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
// VICIV->CONTROLC |= 1
|
||||
// Enable Super Extended Attribute Mode
|
||||
lda #1
|
||||
|
|
@ -121,50 +121,49 @@ main: {
|
|||
and VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB
|
||||
// VICIV->CHARSTEP_LO = 90
|
||||
lda #$5a
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
ldz #$5a
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
// VICIV->CHARSTEP_HI = 0
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
// VICIV->TEXTXPOS_LO = 40
|
||||
// Start text in the left border
|
||||
lda #$28
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
ldz #$28
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
// VICIV->TEXTXPOS_HI = 0
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
// VICIV->CHRCOUNT = 45
|
||||
// Set number of characters to display per row
|
||||
lda #$2d
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
ldz #$2d
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
// VICIV->SCRNPTR_LOLO = BYTE0(SCREEN)
|
||||
// Set exact screen address
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
// VICIV->SCRNPTR_LOHI = BYTE1(SCREEN)
|
||||
lda #>SCREEN
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
ldz #>SCREEN
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
// VICIV->SCRNPTR_HILO = 0
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
// VICIV->SCRNPTR_HIHI = 0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
// VICIV->CHARPTR_LOLO = BYTE0(CHARSET)
|
||||
// Set exact charset address
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
// VICIV->CHARPTR_LOHI = BYTE1(CHARSET)
|
||||
lda #>CHARSET
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
ldz #>CHARSET
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
// VICIV->CHARPTR_HILO = 0
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
// memset_dma(SCREEN, 0, 45*25*2)
|
||||
// Fill the screen with 0
|
||||
lda #<SCREEN
|
||||
sta.z memset_dma.dest
|
||||
lda #>SCREEN
|
||||
sta.z memset_dma.dest+1
|
||||
ldz #0
|
||||
lda #<$2d*$19*2
|
||||
sta.z memset_dma.num
|
||||
lda #>$2d*$19*2
|
||||
|
|
@ -250,7 +249,7 @@ main: {
|
|||
sta.z c
|
||||
lda #0
|
||||
sta.z c+1
|
||||
ldz #0
|
||||
taz
|
||||
__b3:
|
||||
// for(char i=0; i<45; i++)
|
||||
cpz #$2d
|
||||
|
|
@ -320,22 +319,21 @@ memoryRemap: {
|
|||
.label zVal = $a
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
|
|
@ -371,21 +369,21 @@ memset_dma: {
|
|||
sta memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memset_dma_command)
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memset_dma_command)
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -410,16 +408,16 @@ memset_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// memset_dma_command256[1] = dest_mb
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// f018b->count = num
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -433,21 +431,21 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// DMA->EN018B = 1
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memset_dma_command256)
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memset_dma_command256)
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
|
|||
|
|
@ -1179,28 +1179,28 @@ Allocated mem[12] [ memset_dma_command ]
|
|||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [4] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [5] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | $40 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | 1 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) & $7f [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [37] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BG_COLOR) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [40] main::logo_dest#1 = main::logo_dest#5 + (unsigned int)$20*8 [ main::col#2 main::logo_src#5 main::logo_dest#1 ] ( [ main::col#2 main::logo_src#5 main::logo_dest#1 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:11 [ main::col#2 main::col#1 ]
|
||||
|
|
@ -1216,56 +1216,58 @@ Statement [51] main::erow#5[main::$10] = main::c#2 [ main::r#2 main::erow#5 main
|
|||
Removing always clobbered register reg byte y as potential for zp[1]:12 [ main::r#2 main::r#1 ]
|
||||
Removing always clobbered register reg byte y as potential for zp[1]:3 [ main::i#2 main::i#1 ]
|
||||
Statement [52] main::c#1 = main::c#2 + $20 [ main::r#2 main::erow#5 main::i#2 main::c#1 ] ( [ main::r#2 main::erow#5 main::i#2 main::c#1 ] { } ) always clobbers reg byte a
|
||||
Statement [54] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [55] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [56] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [57] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [54] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [55] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [56] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [57] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [62] *((unsigned int *)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma::num#2 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:23 [ memset_dma::fill#2 ]
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:21 [ memset_dma::dmaMode#0 ]
|
||||
Statement [63] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma::fill#2 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma::dest#2 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [69] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:22 [ memset_dma256::dmaMode#0 ]
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:21 [ memset_dma::dmaMode#0 ]
|
||||
Statement [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [69] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:22 [ memset_dma256::dmaMode#0 ]
|
||||
Statement [74] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:22 [ memset_dma256::dmaMode#0 ]
|
||||
Statement [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [76] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [77] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)WHITE [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [4] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) | $40 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [5] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | $40 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [14] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | 1 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [15] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB) & $7f [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 [ memset_dma_command ] ( [ memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [37] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BG_COLOR) = *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [40] main::logo_dest#1 = main::logo_dest#5 + (unsigned int)$20*8 [ main::col#2 main::logo_src#5 main::logo_dest#1 ] ( [ main::col#2 main::logo_src#5 main::logo_dest#1 ] { } ) always clobbers reg byte a
|
||||
Statement [41] main::logo_src#1 = main::logo_src#5 + $19*8 [ main::col#2 main::logo_src#1 main::logo_dest#1 ] ( [ main::col#2 main::logo_src#1 main::logo_dest#1 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -1275,29 +1277,29 @@ Statement [48] main::erow#1 = main::erow#5 + $2d*SIZEOF_UNSIGNED_INT [ main::r#2
|
|||
Statement [50] main::$10 = main::i#2 << 1 [ main::r#2 main::erow#5 main::i#2 main::c#2 main::$10 ] ( [ main::r#2 main::erow#5 main::i#2 main::c#2 main::$10 ] { } ) always clobbers reg byte a
|
||||
Statement [51] main::erow#5[main::$10] = main::c#2 [ main::r#2 main::erow#5 main::i#2 main::c#2 ] ( [ main::r#2 main::erow#5 main::i#2 main::c#2 ] { } ) always clobbers reg byte a reg byte y
|
||||
Statement [52] main::c#1 = main::c#2 + $20 [ main::r#2 main::erow#5 main::i#2 main::c#1 ] ( [ main::r#2 main::erow#5 main::i#2 main::c#1 ] { } ) always clobbers reg byte a
|
||||
Statement [54] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [55] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [56] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [57] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [54] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [55] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [56] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [57] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:3 [ memset_dma_command memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [62] *((unsigned int *)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma::num#2 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::fill#2 memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [63] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)memset_dma::fill#2 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dest#2 memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [64] *((char **)&memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma::dest#2 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [69] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte a
|
||||
Statement [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [69] *((char *)DMA) = byte0 &memset_dma_command [ memset_dma::dmaMode#0 memset_dma_command ] ( memset_dma:28 [ memset_dma::dmaMode#0 memset_dma_command ] { } memset_dma:32 [ memset_dma::dmaMode#0 memset_dma_command ] { } ) always clobbers reg byte z
|
||||
Statement [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [74] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [76] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [77] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_SRC) = (char *)WHITE [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte a
|
||||
Statement [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Statement [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 [ memset_dma256::dmaMode#0 ] ( memset_dma256:30 [ memset_dma_command memset_dma256::dmaMode#0 ] { } ) always clobbers reg byte z
|
||||
Potential registers zp[1]:12 [ main::r#2 main::r#1 ] : zp[1]:12 , reg byte x , reg byte z ,
|
||||
Potential registers zp[2]:13 [ main::erow#5 main::erow#1 ] : zp[2]:13 ,
|
||||
Potential registers zp[1]:11 [ main::col#2 main::col#1 ] : zp[1]:11 , reg byte x , reg byte y , reg byte z ,
|
||||
|
|
@ -1314,8 +1316,8 @@ Potential registers zp[1]:20 [ memoryRemap::aVal ] : zp[1]:20 ,
|
|||
Potential registers zp[1]:19 [ memoryRemap::xVal ] : zp[1]:19 ,
|
||||
Potential registers zp[1]:18 [ memoryRemap::yVal ] : zp[1]:18 ,
|
||||
Potential registers zp[1]:15 [ memoryRemap::zVal ] : zp[1]:15 ,
|
||||
Potential registers zp[1]:21 [ memset_dma::dmaMode#0 ] : zp[1]:21 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:22 [ memset_dma256::dmaMode#0 ] : zp[1]:22 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:21 [ memset_dma::dmaMode#0 ] : zp[1]:21 , reg byte x , reg byte y ,
|
||||
Potential registers zp[1]:22 [ memset_dma256::dmaMode#0 ] : zp[1]:22 , reg byte x , reg byte y ,
|
||||
Potential registers mem[12] [ memset_dma_command ] : mem[12] ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
|
|
@ -1475,31 +1477,31 @@ main: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC
|
||||
// [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$47
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$53
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set sideborder width=0, disable raster delay and hot registers
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
// [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Disable top/bottom borders
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
// [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
// [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
// [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 -- _deref_pbuc1=vbuc2
|
||||
lda #2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
ldz #2
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
// [14] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | 1 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable Super Extended Attribute Mode
|
||||
lda #1
|
||||
|
|
@ -1511,45 +1513,45 @@ main: {
|
|||
and VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB
|
||||
// [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a -- _deref_pbuc1=vbuc2
|
||||
lda #$5a
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
ldz #$5a
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
// [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
// [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 -- _deref_pbuc1=vbuc2
|
||||
// Start text in the left border
|
||||
lda #$28
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
ldz #$28
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
// [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
// [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d -- _deref_pbuc1=vbuc2
|
||||
// Set number of characters to display per row
|
||||
lda #$2d
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
ldz #$2d
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
// [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set exact screen address
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
// [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN -- _deref_pbuc1=vbuc2
|
||||
lda #>SCREEN
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
ldz #>SCREEN
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
// [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
// [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
// [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set exact charset address
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
// [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET -- _deref_pbuc1=vbuc2
|
||||
lda #>CHARSET
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
ldz #>CHARSET
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
// [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
// [28] call memset_dma
|
||||
// Fill the screen with 0
|
||||
// [60] phi from main::@12 to memset_dma [phi:main::@12->memset_dma]
|
||||
|
|
@ -1784,20 +1786,20 @@ memoryRemap: {
|
|||
.label zVal = $a
|
||||
// [54] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [55] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [56] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [57] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -1842,22 +1844,22 @@ memset_dma: {
|
|||
sta memset_dma_command+OFFSET_STRUCT_DMA_LIST_F018B_DEST+1
|
||||
// [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [69] *((char *)DMA) = byte0 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// [70] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -1886,16 +1888,16 @@ memset_dma256: {
|
|||
ldx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// [74] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT
|
||||
lda #>num
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// [76] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST
|
||||
|
|
@ -1909,22 +1911,22 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_SRC+1
|
||||
// [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// [83] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
stx DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
|
|
@ -1971,17 +1973,18 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b11_from_SEI1:
|
||||
Removing instruction __b13_from___b12:
|
||||
|
|
@ -2009,6 +2012,9 @@ Removing instruction __breturn:
|
|||
Succesful ASM optimization Pass5UnusedLabelElimination
|
||||
Relabelling long label __b7_from___b6 to __b5
|
||||
Succesful ASM optimization Pass5RelabelLongLabels
|
||||
Removing instruction ldz #0
|
||||
Replacing instruction ldz #0 with TAZ
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
|
||||
FINAL SYMBOL TABLE
|
||||
__constant char * const CHARSET = (char *) 24576
|
||||
|
|
@ -2142,7 +2148,7 @@ mem[12] [ memset_dma_command ]
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 9298
|
||||
Score: 9192
|
||||
|
||||
// File Comments
|
||||
// DYPP (Different Y Pixel Position) LOGO created using DMA
|
||||
|
|
@ -2248,34 +2254,34 @@ main: {
|
|||
// VICIV->KEY = 0x47
|
||||
// [6] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$47
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// VICIV->KEY = 0x53
|
||||
// [7] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY) = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
ldz #$53
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_KEY
|
||||
// VICIV->SIDBDRWD_LO = 0
|
||||
// [8] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set sideborder width=0, disable raster delay and hot registers
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// VICIV->SIDBDRWD_HI = 0
|
||||
// [9] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_HI
|
||||
// VICIV->TBDRPOS_LO = 0
|
||||
// [10] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Disable top/bottom borders
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_LO
|
||||
// VICIV->TBDRPOS_HI = 0
|
||||
// [11] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TBDRPOS_HI
|
||||
// VICIV->BBDRPOS_LO = 0
|
||||
// [12] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_LO
|
||||
// VICIV->BBDRPOS_HI = 2
|
||||
// [13] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI) = 2 -- _deref_pbuc1=vbuc2
|
||||
lda #2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
ldz #2
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_BBDRPOS_HI
|
||||
// VICIV->CONTROLC |= 1
|
||||
// [14] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) = *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLC) | 1 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable Super Extended Attribute Mode
|
||||
|
|
@ -2290,54 +2296,54 @@ main: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CONTROLB
|
||||
// VICIV->CHARSTEP_LO = 90
|
||||
// [16] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO) = $5a -- _deref_pbuc1=vbuc2
|
||||
lda #$5a
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
ldz #$5a
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_LO
|
||||
// VICIV->CHARSTEP_HI = 0
|
||||
// [17] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARSTEP_HI
|
||||
// VICIV->TEXTXPOS_LO = 40
|
||||
// [18] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO) = $28 -- _deref_pbuc1=vbuc2
|
||||
// Start text in the left border
|
||||
lda #$28
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
ldz #$28
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
// VICIV->TEXTXPOS_HI = 0
|
||||
// [19] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_HI
|
||||
// VICIV->CHRCOUNT = 45
|
||||
// [20] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT) = $2d -- _deref_pbuc1=vbuc2
|
||||
// Set number of characters to display per row
|
||||
lda #$2d
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
ldz #$2d
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRCOUNT
|
||||
// VICIV->SCRNPTR_LOLO = BYTE0(SCREEN)
|
||||
// [21] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set exact screen address
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOLO
|
||||
// VICIV->SCRNPTR_LOHI = BYTE1(SCREEN)
|
||||
// [22] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI) = byte1 SCREEN -- _deref_pbuc1=vbuc2
|
||||
lda #>SCREEN
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
ldz #>SCREEN
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_LOHI
|
||||
// VICIV->SCRNPTR_HILO = 0
|
||||
// [23] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HILO
|
||||
// VICIV->SCRNPTR_HIHI = 0
|
||||
// [24] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SCRNPTR_HIHI
|
||||
// VICIV->CHARPTR_LOLO = BYTE0(CHARSET)
|
||||
// [25] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set exact charset address
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOLO
|
||||
// VICIV->CHARPTR_LOHI = BYTE1(CHARSET)
|
||||
// [26] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI) = byte1 CHARSET -- _deref_pbuc1=vbuc2
|
||||
lda #>CHARSET
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
ldz #>CHARSET
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_LOHI
|
||||
// VICIV->CHARPTR_HILO = 0
|
||||
// [27] *((char *)VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO) = 0 -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
ldz #0
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHARPTR_HILO
|
||||
// memset_dma(SCREEN, 0, 45*25*2)
|
||||
// [28] call memset_dma
|
||||
// Fill the screen with 0
|
||||
|
|
@ -2348,7 +2354,6 @@ main: {
|
|||
lda #>SCREEN
|
||||
sta.z memset_dma.dest+1
|
||||
// [60] phi memset_dma::fill#2 = 0 [phi:main::@12->memset_dma#1] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
// [60] phi memset_dma::num#2 = (unsigned int)$2d*$19*2 [phi:main::@12->memset_dma#2] -- vwuz1=vwuc1
|
||||
lda #<$2d*$19*2
|
||||
sta.z memset_dma.num
|
||||
|
|
@ -2480,7 +2485,7 @@ main: {
|
|||
// [46] phi from main::@2 to main::@3 [phi:main::@2->main::@3]
|
||||
// [46] phi main::c#2 = main::c#0 [phi:main::@2->main::@3#0] -- register_copy
|
||||
// [46] phi main::i#2 = 0 [phi:main::@2->main::@3#1] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
taz
|
||||
// main::@3
|
||||
__b3:
|
||||
// for(char i=0; i<45; i++)
|
||||
|
|
@ -2568,26 +2573,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [54] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [55] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [56] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [57] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -2631,25 +2635,25 @@ memset_dma: {
|
|||
// DMA->EN018B = 1
|
||||
// [65] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [66] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [67] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(&memset_dma_command)
|
||||
// [68] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ADDRLSBTRIG = BYTE0(&memset_dma_command)
|
||||
// [69] *((char *)DMA) = byte0 &memset_dma_command -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (without option lists)
|
||||
lda #<memset_dma_command
|
||||
sta DMA
|
||||
ldz #<memset_dma_command
|
||||
stz DMA
|
||||
// DMA->EN018B = dmaMode
|
||||
// [70] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
@ -2680,8 +2684,8 @@ memset_dma256: {
|
|||
// memset_dma_command256[1] = dest_mb
|
||||
// [73] *(memset_dma_command256+1) = memset_dma256::dest_mb#0 -- _deref_pbuc1=vbuc2
|
||||
// Set up command
|
||||
lda #dest_mb
|
||||
sta memset_dma_command256+1
|
||||
ldz #dest_mb
|
||||
stz memset_dma_command256+1
|
||||
// f018b->count = num
|
||||
// [74] *((unsigned int *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_COUNT) = memset_dma256::num#0 -- _deref_pwuc1=vwuc2
|
||||
lda #<num
|
||||
|
|
@ -2690,8 +2694,8 @@ memset_dma256: {
|
|||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_COUNT+1
|
||||
// f018b->dest_bank = dest_bank
|
||||
// [75] *((char *)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK) = memset_dma256::dest_bank#0 -- _deref_pbuc1=vbuc2
|
||||
lda #dest_bank
|
||||
sta f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
ldz #dest_bank
|
||||
stz f018b+OFFSET_STRUCT_DMA_LIST_F018B_DEST_BANK
|
||||
// f018b->dest = dest
|
||||
// [76] *((char **)memset_dma256::f018b#0+OFFSET_STRUCT_DMA_LIST_F018B_DEST) = (char *)memset_dma256::dest#0 -- _deref_qbuc1=pbuc2
|
||||
lda #<dest
|
||||
|
|
@ -2708,25 +2712,25 @@ memset_dma256: {
|
|||
// DMA->EN018B = 1
|
||||
// [78] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = 1 -- _deref_pbuc1=vbuc2
|
||||
// Set F018B mode
|
||||
lda #1
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
ldz #1
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B
|
||||
// DMA->ADDRMB = 0
|
||||
// [79] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB) = 0 -- _deref_pbuc1=vbuc2
|
||||
// Set address of DMA list
|
||||
lda #0
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
ldz #0
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMB
|
||||
// DMA->ADDRBANK = 0
|
||||
// [80] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK) = 0 -- _deref_pbuc1=vbuc2
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRBANK
|
||||
// DMA-> ADDRMSB = BYTE1(memset_dma_command256)
|
||||
// [81] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB) = byte1 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
lda #>memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
ldz #>memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ADDRMSB
|
||||
// DMA-> ETRIG = BYTE0(memset_dma_command256)
|
||||
// [82] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG) = byte0 memset_dma_command256 -- _deref_pbuc1=vbuc2
|
||||
// Trigger the DMA (with option lists)
|
||||
lda #<memset_dma_command256
|
||||
sta DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
ldz #<memset_dma_command256
|
||||
stz DMA+OFFSET_STRUCT_F018_DMAGIC_ETRIG
|
||||
// DMA->EN018B = dmaMode
|
||||
// [83] *((char *)DMA+OFFSET_STRUCT_F018_DMAGIC_EN018B) = memset_dma256::dmaMode#0 -- _deref_pbuc1=vbuxx
|
||||
// Re-enable F018A mode
|
||||
|
|
|
|||
|
|
@ -37,10 +37,10 @@
|
|||
.segment Code
|
||||
__start: {
|
||||
// __ma char conio_cursor_x = 0
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// __ma char conio_cursor_y = 0
|
||||
sta.z conio_cursor_y
|
||||
stz.z conio_cursor_y
|
||||
// __ma char *conio_line_text = CONIO_SCREEN_TEXT
|
||||
lda #<DEFAULT_SCREEN
|
||||
sta.z conio_line_text
|
||||
|
|
@ -67,23 +67,23 @@ conio_mega65_init: {
|
|||
jsr memoryRemap
|
||||
// *IO_KEY = 0x47
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// *IO_KEY = 0x53
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// *IO_BANK |= CRAM2K
|
||||
// Enable 2K Color RAM
|
||||
lda #CRAM2K
|
||||
ora IO_BANK
|
||||
sta IO_BANK
|
||||
// char line = *BASIC_CURSOR_LINE+1
|
||||
ldx BASIC_CURSOR_LINE
|
||||
inx
|
||||
lda BASIC_CURSOR_LINE
|
||||
inc
|
||||
// if(line>=CONIO_HEIGHT)
|
||||
cpx #$19
|
||||
cmp #$19
|
||||
bcc __b1
|
||||
ldx #$19-1
|
||||
lda #$19-1
|
||||
__b1:
|
||||
// gotoxy(0, line)
|
||||
jsr gotoxy
|
||||
|
|
@ -105,12 +105,11 @@ cputc: {
|
|||
sta (conio_line_text),z
|
||||
// conio_line_color[conio_cursor_x] = conio_textcolor
|
||||
lda #LIGHT_BLUE
|
||||
ldz conio_cursor_x
|
||||
sta (conio_line_color),z
|
||||
// if(++conio_cursor_x==CONIO_WIDTH)
|
||||
inc.z conio_cursor_x
|
||||
lda #$50
|
||||
cmp.z conio_cursor_x
|
||||
ldz #$50
|
||||
cpz.z conio_cursor_x
|
||||
bne __breturn
|
||||
// cputln()
|
||||
jsr cputln
|
||||
|
|
@ -164,29 +163,28 @@ memoryRemap: {
|
|||
.label zVal = $16
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// }
|
||||
rts
|
||||
}
|
||||
// Set the cursor to the specified position
|
||||
// void gotoxy(char x, __register(X) char y)
|
||||
// void gotoxy(char x, __register(A) char y)
|
||||
gotoxy: {
|
||||
.const x = 0
|
||||
.label __5 = $14
|
||||
|
|
@ -196,17 +194,16 @@ gotoxy: {
|
|||
.label __8 = $12
|
||||
.label __9 = $10
|
||||
// if(y>CONIO_HEIGHT)
|
||||
cpx #$19+1
|
||||
cmp #$19+1
|
||||
bcc __b2
|
||||
ldx #0
|
||||
lda #0
|
||||
__b2:
|
||||
// conio_cursor_x = x
|
||||
lda #x
|
||||
sta.z conio_cursor_x
|
||||
ldz #x
|
||||
stz.z conio_cursor_x
|
||||
// conio_cursor_y = y
|
||||
stx.z conio_cursor_y
|
||||
sta.z conio_cursor_y
|
||||
// unsigned int line_offset = (unsigned int)y*CONIO_WIDTH
|
||||
txa
|
||||
sta.z __7
|
||||
lda #0
|
||||
sta.z __7+1
|
||||
|
|
@ -277,8 +274,8 @@ cputln: {
|
|||
inc.z conio_line_color+1
|
||||
!:
|
||||
// conio_cursor_x = 0
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// conio_cursor_y++;
|
||||
inc.z conio_cursor_y
|
||||
// cscroll()
|
||||
|
|
@ -313,8 +310,8 @@ printf_str: {
|
|||
// Scroll the entire screen if the cursor is beyond the last line
|
||||
cscroll: {
|
||||
// if(conio_cursor_y==CONIO_HEIGHT)
|
||||
lda #$19
|
||||
cmp.z conio_cursor_y
|
||||
ldz #$19
|
||||
cpz.z conio_cursor_y
|
||||
bne __breturn
|
||||
// memcpy(CONIO_SCREEN_TEXT, CONIO_SCREEN_TEXT+CONIO_WIDTH, CONIO_BYTES-CONIO_WIDTH)
|
||||
lda #<DEFAULT_SCREEN
|
||||
|
|
|
|||
|
|
@ -1434,24 +1434,24 @@ Allocated zp[2]:41 [ memcpy::source#2 ]
|
|||
Allocated zp[2]:43 [ memcpy::destination#2 ]
|
||||
Allocated zp[2]:45 [ memset::str#3 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [1] conio_cursor_x = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [2] conio_cursor_y = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [1] conio_cursor_x = 0 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [2] conio_cursor_y = 0 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [3] conio_line_text = DEFAULT_SCREEN [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [4] conio_line_color = COLORRAM [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [13] *IO_KEY = $47 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [14] *IO_KEY = $53 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [13] *IO_KEY = $47 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte z
|
||||
Statement [14] *IO_KEY = $53 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte z
|
||||
Statement [15] *IO_BANK = *IO_BANK | CRAM2K [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [23] cputc::c#0 = stackidx(char,cputc::OFFSET_STACK_C) [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color cputc::c#0 ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color cputc::c#0 ] { } ) always clobbers reg byte a reg byte x
|
||||
Statement [25] conio_line_text[conio_cursor_x] = cputc::c#0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [26] conio_line_color[conio_cursor_x] = LIGHT_BLUE [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a reg byte z
|
||||
Statement [28] if(conio_cursor_x!=$50) goto cputc::@return [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [37] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:12 [ memoryRemap::aVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [38] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [39] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [40] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [28] if(conio_cursor_x!=$50) goto cputc::@return [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [37] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:12 [ memoryRemap::aVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [38] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [39] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [40] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [46] conio_cursor_x = gotoxy::x#2 [ conio_cursor_x gotoxy::y#4 ] ( gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:33 [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
Statement [46] conio_cursor_x = gotoxy::x#2 [ conio_cursor_x gotoxy::y#4 ] ( gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:33 [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
Statement [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [49] gotoxy::$8 = gotoxy::$7 << 2 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [50] gotoxy::$9 = gotoxy::$8 + gotoxy::$7 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
|
|
@ -1462,10 +1462,10 @@ Statement [54] gotoxy::$6 = COLORRAM + gotoxy::line_offset#0 [ conio_cursor_x co
|
|||
Statement [55] conio_line_color = gotoxy::$6 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [57] conio_line_text = conio_line_text + $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [58] conio_line_color = conio_line_color + $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [59] conio_cursor_x = 0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [59] conio_cursor_x = 0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [65] printf_str::c#1 = *printf_str::s#2 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color printf_str::s#2 printf_str::c#1 ] ( main:7::printf_str:35 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color printf_str::s#2 printf_str::c#1 ] { } ) always clobbers reg byte a reg byte y
|
||||
Statement sideeffect stackpullbytes(1) always clobbers reg byte a
|
||||
Statement [72] if(conio_cursor_y!=$19) goto cscroll::@return [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [72] if(conio_cursor_y!=$19) goto cscroll::@return [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [81] conio_line_text = conio_line_text - $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [82] conio_line_color = conio_line_color - $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [86] memcpy::src_end#0 = (char *)memcpy::source#2 + (unsigned int)$19*$50-$50 [ memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memcpy:74 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memcpy:74 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memcpy:76 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memcpy:76 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -1479,23 +1479,23 @@ Statement [97] memset::dst#4 = (char *)memset::str#3 [ memset::c#4 memset::end#0
|
|||
Statement [99] if(memset::dst#2!=memset::end#0) goto memset::@3 [ memset::c#4 memset::end#0 memset::dst#2 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a
|
||||
Statement [101] *memset::dst#2 = memset::c#4 [ memset::c#4 memset::end#0 memset::dst#2 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a reg byte y
|
||||
Removing always clobbered register reg byte y as potential for zp[1]:10 [ memset::c#4 ]
|
||||
Statement [1] conio_cursor_x = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [2] conio_cursor_y = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [1] conio_cursor_x = 0 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [2] conio_cursor_y = 0 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [3] conio_line_text = DEFAULT_SCREEN [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [4] conio_line_color = COLORRAM [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [13] *IO_KEY = $47 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [14] *IO_KEY = $53 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [13] *IO_KEY = $47 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte z
|
||||
Statement [14] *IO_KEY = $53 [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte z
|
||||
Statement [15] *IO_BANK = *IO_BANK | CRAM2K [ ] ( [ ] { } conio_mega65_init:5 [ ] { } ) always clobbers reg byte a
|
||||
Statement [23] cputc::c#0 = stackidx(char,cputc::OFFSET_STACK_C) [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color cputc::c#0 ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color cputc::c#0 ] { } ) always clobbers reg byte a reg byte x
|
||||
Statement [25] conio_line_text[conio_cursor_x] = cputc::c#0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [26] conio_line_color[conio_cursor_x] = LIGHT_BLUE [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a reg byte z
|
||||
Statement [28] if(conio_cursor_x!=$50) goto cputc::@return [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [37] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:12 [ memoryRemap::aVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [38] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte a
|
||||
Statement [39] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [40] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte a
|
||||
Statement [28] if(conio_cursor_x!=$50) goto cputc::@return [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [37] memoryRemap::aVal = 0 [ memoryRemap::aVal ] ( memoryRemap:12 [ memoryRemap::aVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal ] { } ) always clobbers reg byte z
|
||||
Statement [38] memoryRemap::xVal = 0 [ memoryRemap::aVal memoryRemap::xVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal ] { } ) always clobbers reg byte z
|
||||
Statement [39] memoryRemap::yVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [40] memoryRemap::zVal = 0 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] ( memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } conio_mega65_init:5::memoryRemap:12 [ memoryRemap::aVal memoryRemap::xVal memoryRemap::yVal memoryRemap::zVal ] { } ) always clobbers reg byte z
|
||||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [46] conio_cursor_x = gotoxy::x#2 [ conio_cursor_x gotoxy::y#4 ] ( gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [46] conio_cursor_x = gotoxy::x#2 [ conio_cursor_x gotoxy::y#4 ] ( gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x gotoxy::y#4 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte z
|
||||
Statement [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [49] gotoxy::$8 = gotoxy::$7 << 2 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [50] gotoxy::$9 = gotoxy::$8 + gotoxy::$7 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
|
|
@ -1506,10 +1506,10 @@ Statement [54] gotoxy::$6 = COLORRAM + gotoxy::line_offset#0 [ conio_cursor_x co
|
|||
Statement [55] conio_line_color = gotoxy::$6 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( gotoxy:21 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } conio_mega65_init:5::gotoxy:21 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { { gotoxy::y#2 = conio_mega65_init::line#2 } } ) always clobbers reg byte a
|
||||
Statement [57] conio_line_text = conio_line_text + $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [58] conio_line_color = conio_line_color + $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [59] conio_cursor_x = 0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [59] conio_cursor_x = 0 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [65] printf_str::c#1 = *printf_str::s#2 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color printf_str::s#2 printf_str::c#1 ] ( main:7::printf_str:35 [ conio_cursor_x conio_cursor_y conio_line_text conio_line_color printf_str::s#2 printf_str::c#1 ] { } ) always clobbers reg byte a reg byte y
|
||||
Statement sideeffect stackpullbytes(1) always clobbers reg byte a
|
||||
Statement [72] if(conio_cursor_y!=$19) goto cscroll::@return [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [72] if(conio_cursor_y!=$19) goto cscroll::@return [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte z
|
||||
Statement [81] conio_line_text = conio_line_text - $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [82] conio_line_color = conio_line_color - $50 [ conio_cursor_y conio_line_text conio_line_color ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color ] { } ) always clobbers reg byte a
|
||||
Statement [86] memcpy::src_end#0 = (char *)memcpy::source#2 + (unsigned int)$19*$50-$50 [ memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memcpy:74 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memcpy:74 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memcpy:76 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memcpy:76 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memcpy::source#2 memcpy::destination#2 memcpy::src_end#0 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -1522,7 +1522,7 @@ Statement [97] memset::dst#4 = (char *)memset::str#3 [ memset::c#4 memset::end#0
|
|||
Statement [99] if(memset::dst#2!=memset::end#0) goto memset::@3 [ memset::c#4 memset::end#0 memset::dst#2 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a
|
||||
Statement [101] *memset::dst#2 = memset::c#4 [ memset::c#4 memset::end#0 memset::dst#2 ] ( main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:78 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:30::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } main:7::printf_str:35::cputc:70::cputln:33::cscroll:61::memset:80 [ printf_str::s#0 conio_cursor_x conio_cursor_y conio_line_text conio_line_color memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a reg byte y
|
||||
Potential registers zp[1]:39 [ conio_mega65_init::line#2 conio_mega65_init::line#0 ] : zp[1]:39 , reg byte a , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:33 [ gotoxy::y#4 gotoxy::y#2 ] : zp[1]:33 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:33 [ gotoxy::y#4 gotoxy::y#2 ] : zp[1]:33 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp[2]:20 [ printf_str::s#2 printf_str::s#0 ] : zp[2]:20 ,
|
||||
Potential registers zp[2]:41 [ memcpy::source#2 ] : zp[2]:41 ,
|
||||
Potential registers zp[2]:43 [ memcpy::destination#2 ] : zp[2]:43 ,
|
||||
|
|
@ -1581,37 +1581,37 @@ Uplifting [memset] best 10631 combination zp[2]:2 [ memset::dst#2 memset::dst#4
|
|||
Uplifting [] best 10631 combination zp[1]:13 [ conio_cursor_y ] zp[2]:14 [ conio_line_color ] zp[2]:16 [ conio_line_text ] zp[1]:19 [ conio_cursor_x ]
|
||||
Uplifting [cputc] best 10622 combination reg byte a [ cputc::c#0 ]
|
||||
Uplifting [printf_str] best 10552 combination zp[2]:20 [ printf_str::s#2 printf_str::s#0 ] reg byte a [ printf_str::c#1 ]
|
||||
Uplifting [gotoxy] best 10539 combination zp[2]:23 [ gotoxy::$8 ] zp[2]:25 [ gotoxy::$9 ] zp[2]:27 [ gotoxy::$5 ] zp[2]:29 [ gotoxy::$6 ] zp[2]:31 [ gotoxy::$7 ] reg byte x [ gotoxy::y#4 gotoxy::y#2 ] zp[2]:35 [ gotoxy::line_offset#0 ]
|
||||
Uplifting [memoryRemap] best 10539 combination zp[1]:34 [ memoryRemap::zVal ] zp[1]:37 [ memoryRemap::yVal ] zp[1]:38 [ memoryRemap::xVal ] zp[1]:40 [ memoryRemap::aVal ]
|
||||
Uplifting [conio_mega65_init] best 10527 combination reg byte x [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
Uplifting [RADIX] best 10527 combination
|
||||
Uplifting [cputln] best 10527 combination
|
||||
Uplifting [MOS6526_CIA] best 10527 combination
|
||||
Uplifting [MOS6569_VICII] best 10527 combination
|
||||
Uplifting [MOS6581_SID] best 10527 combination
|
||||
Uplifting [MOS4569_VICIII] best 10527 combination
|
||||
Uplifting [MEGA65_VICIV] best 10527 combination
|
||||
Uplifting [F018_DMAGIC] best 10527 combination
|
||||
Uplifting [DMA_LIST_F018A] best 10527 combination
|
||||
Uplifting [DMA_LIST_F018B] best 10527 combination
|
||||
Uplifting [cscroll] best 10527 combination
|
||||
Uplifting [printf_format_number] best 10527 combination
|
||||
Uplifting [printf_buffer_number] best 10527 combination
|
||||
Uplifting [printf_format_string] best 10527 combination
|
||||
Uplifting [main] best 10527 combination
|
||||
Uplifting [__start] best 10527 combination
|
||||
Uplifting [gotoxy] best 10537 combination zp[2]:23 [ gotoxy::$8 ] zp[2]:25 [ gotoxy::$9 ] zp[2]:27 [ gotoxy::$5 ] zp[2]:29 [ gotoxy::$6 ] zp[2]:31 [ gotoxy::$7 ] reg byte a [ gotoxy::y#4 gotoxy::y#2 ] zp[2]:35 [ gotoxy::line_offset#0 ]
|
||||
Uplifting [memoryRemap] best 10537 combination zp[1]:34 [ memoryRemap::zVal ] zp[1]:37 [ memoryRemap::yVal ] zp[1]:38 [ memoryRemap::xVal ] zp[1]:40 [ memoryRemap::aVal ]
|
||||
Uplifting [conio_mega65_init] best 10525 combination reg byte a [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
Uplifting [RADIX] best 10525 combination
|
||||
Uplifting [cputln] best 10525 combination
|
||||
Uplifting [MOS6526_CIA] best 10525 combination
|
||||
Uplifting [MOS6569_VICII] best 10525 combination
|
||||
Uplifting [MOS6581_SID] best 10525 combination
|
||||
Uplifting [MOS4569_VICIII] best 10525 combination
|
||||
Uplifting [MEGA65_VICIV] best 10525 combination
|
||||
Uplifting [F018_DMAGIC] best 10525 combination
|
||||
Uplifting [DMA_LIST_F018A] best 10525 combination
|
||||
Uplifting [DMA_LIST_F018B] best 10525 combination
|
||||
Uplifting [cscroll] best 10525 combination
|
||||
Uplifting [printf_format_number] best 10525 combination
|
||||
Uplifting [printf_buffer_number] best 10525 combination
|
||||
Uplifting [printf_format_string] best 10525 combination
|
||||
Uplifting [main] best 10525 combination
|
||||
Uplifting [__start] best 10525 combination
|
||||
Attempting to uplift remaining variables inzp[1]:13 [ conio_cursor_y ]
|
||||
Uplifting [] best 10527 combination zp[1]:13 [ conio_cursor_y ]
|
||||
Uplifting [] best 10525 combination zp[1]:13 [ conio_cursor_y ]
|
||||
Attempting to uplift remaining variables inzp[1]:19 [ conio_cursor_x ]
|
||||
Uplifting [] best 10527 combination zp[1]:19 [ conio_cursor_x ]
|
||||
Uplifting [] best 10525 combination zp[1]:19 [ conio_cursor_x ]
|
||||
Attempting to uplift remaining variables inzp[1]:34 [ memoryRemap::zVal ]
|
||||
Uplifting [memoryRemap] best 10527 combination zp[1]:34 [ memoryRemap::zVal ]
|
||||
Uplifting [memoryRemap] best 10525 combination zp[1]:34 [ memoryRemap::zVal ]
|
||||
Attempting to uplift remaining variables inzp[1]:37 [ memoryRemap::yVal ]
|
||||
Uplifting [memoryRemap] best 10527 combination zp[1]:37 [ memoryRemap::yVal ]
|
||||
Uplifting [memoryRemap] best 10525 combination zp[1]:37 [ memoryRemap::yVal ]
|
||||
Attempting to uplift remaining variables inzp[1]:38 [ memoryRemap::xVal ]
|
||||
Uplifting [memoryRemap] best 10527 combination zp[1]:38 [ memoryRemap::xVal ]
|
||||
Uplifting [memoryRemap] best 10525 combination zp[1]:38 [ memoryRemap::xVal ]
|
||||
Attempting to uplift remaining variables inzp[1]:40 [ memoryRemap::aVal ]
|
||||
Uplifting [memoryRemap] best 10527 combination zp[1]:40 [ memoryRemap::aVal ]
|
||||
Uplifting [memoryRemap] best 10525 combination zp[1]:40 [ memoryRemap::aVal ]
|
||||
Coalescing zero page register [ zp[2]:41 [ memcpy::source#2 ] ] with [ zp[2]:4 [ memcpy::src#2 memcpy::src#4 memcpy::src#1 ] ] - score: 1
|
||||
Coalescing zero page register [ zp[2]:43 [ memcpy::destination#2 ] ] with [ zp[2]:6 [ memcpy::dst#2 memcpy::dst#4 memcpy::dst#1 ] ] - score: 1
|
||||
Coalescing zero page register [ zp[2]:45 [ memset::str#3 ] ] with [ zp[2]:2 [ memset::dst#2 memset::dst#4 memset::dst#1 ] ] - score: 1
|
||||
|
|
@ -1683,11 +1683,11 @@ __start: {
|
|||
// __start::__init1
|
||||
__init1:
|
||||
// [1] conio_cursor_x = 0 -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// [2] conio_cursor_y = 0 -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z conio_cursor_y
|
||||
ldz #0
|
||||
stz.z conio_cursor_y
|
||||
// [3] conio_line_text = DEFAULT_SCREEN -- pbuz1=pbuc1
|
||||
lda #<DEFAULT_SCREEN
|
||||
sta.z conio_line_text
|
||||
|
|
@ -1740,26 +1740,26 @@ conio_mega65_init: {
|
|||
__b3:
|
||||
// [13] *IO_KEY = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// [14] *IO_KEY = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// [15] *IO_BANK = *IO_BANK | CRAM2K -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 2K Color RAM
|
||||
lda #CRAM2K
|
||||
ora IO_BANK
|
||||
sta IO_BANK
|
||||
// [16] conio_mega65_init::line#0 = *conio_mega65_init::BASIC_CURSOR_LINE + 1 -- vbuxx=_deref_pbuc1_plus_1
|
||||
ldx BASIC_CURSOR_LINE
|
||||
inx
|
||||
// [17] if(conio_mega65_init::line#0<$19) goto conio_mega65_init::@4 -- vbuxx_lt_vbuc1_then_la1
|
||||
cpx #$19
|
||||
// [16] conio_mega65_init::line#0 = *conio_mega65_init::BASIC_CURSOR_LINE + 1 -- vbuaa=_deref_pbuc1_plus_1
|
||||
lda BASIC_CURSOR_LINE
|
||||
inc
|
||||
// [17] if(conio_mega65_init::line#0<$19) goto conio_mega65_init::@4 -- vbuaa_lt_vbuc1_then_la1
|
||||
cmp #$19
|
||||
bcc __b4_from___b3
|
||||
// [19] phi from conio_mega65_init::@3 to conio_mega65_init::@1 [phi:conio_mega65_init::@3->conio_mega65_init::@1]
|
||||
__b1_from___b3:
|
||||
// [19] phi conio_mega65_init::line#2 = $19-1 [phi:conio_mega65_init::@3->conio_mega65_init::@1#0] -- vbuxx=vbuc1
|
||||
ldx #$19-1
|
||||
// [19] phi conio_mega65_init::line#2 = $19-1 [phi:conio_mega65_init::@3->conio_mega65_init::@1#0] -- vbuaa=vbuc1
|
||||
lda #$19-1
|
||||
jmp __b1
|
||||
// [18] phi from conio_mega65_init::@3 to conio_mega65_init::@4 [phi:conio_mega65_init::@3->conio_mega65_init::@4]
|
||||
__b4_from___b3:
|
||||
|
|
@ -1806,8 +1806,8 @@ cputc: {
|
|||
// [27] conio_cursor_x = ++ conio_cursor_x -- vbuz1=_inc_vbuz1
|
||||
inc.z conio_cursor_x
|
||||
// [28] if(conio_cursor_x!=$50) goto cputc::@return -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #$50
|
||||
cmp.z conio_cursor_x
|
||||
ldz #$50
|
||||
cpz.z conio_cursor_x
|
||||
bne __breturn
|
||||
// [29] phi from cputc::@2 to cputc::@3 [phi:cputc::@2->cputc::@3]
|
||||
__b3_from___b2:
|
||||
|
|
@ -1879,20 +1879,20 @@ memoryRemap: {
|
|||
.label zVal = $16
|
||||
// [37] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// [38] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
lda #0
|
||||
sta.z xVal
|
||||
ldz #0
|
||||
stz.z xVal
|
||||
// [39] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [40] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
lda #0
|
||||
sta.z zVal
|
||||
ldz #0
|
||||
stz.z zVal
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
|
|
@ -1908,7 +1908,7 @@ memoryRemap: {
|
|||
}
|
||||
// gotoxy
|
||||
// Set the cursor to the specified position
|
||||
// void gotoxy(char x, __register(X) char y)
|
||||
// void gotoxy(char x, __register(A) char y)
|
||||
gotoxy: {
|
||||
.const x = 0
|
||||
.label __5 = $14
|
||||
|
|
@ -1917,13 +1917,13 @@ gotoxy: {
|
|||
.label line_offset = $10
|
||||
.label __8 = $12
|
||||
.label __9 = $10
|
||||
// [43] if(gotoxy::y#2<$19+1) goto gotoxy::@3 -- vbuxx_lt_vbuc1_then_la1
|
||||
cpx #$19+1
|
||||
// [43] if(gotoxy::y#2<$19+1) goto gotoxy::@3 -- vbuaa_lt_vbuc1_then_la1
|
||||
cmp #$19+1
|
||||
bcc __b3_from_gotoxy
|
||||
// [45] phi from gotoxy to gotoxy::@1 [phi:gotoxy->gotoxy::@1]
|
||||
__b1_from_gotoxy:
|
||||
// [45] phi gotoxy::y#4 = 0 [phi:gotoxy->gotoxy::@1#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [45] phi gotoxy::y#4 = 0 [phi:gotoxy->gotoxy::@1#0] -- vbuaa=vbuc1
|
||||
lda #0
|
||||
jmp __b1
|
||||
// [44] phi from gotoxy to gotoxy::@3 [phi:gotoxy->gotoxy::@3]
|
||||
__b3_from_gotoxy:
|
||||
|
|
@ -1940,12 +1940,11 @@ gotoxy: {
|
|||
// gotoxy::@2
|
||||
__b2:
|
||||
// [46] conio_cursor_x = gotoxy::x#2 -- vbuz1=vbuc1
|
||||
lda #x
|
||||
sta.z conio_cursor_x
|
||||
// [47] conio_cursor_y = gotoxy::y#4 -- vbuz1=vbuxx
|
||||
stx.z conio_cursor_y
|
||||
// [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 -- vwuz1=_word_vbuxx
|
||||
txa
|
||||
ldz #x
|
||||
stz.z conio_cursor_x
|
||||
// [47] conio_cursor_y = gotoxy::y#4 -- vbuz1=vbuaa
|
||||
sta.z conio_cursor_y
|
||||
// [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 -- vwuz1=_word_vbuaa
|
||||
sta.z __7
|
||||
lda #0
|
||||
sta.z __7+1
|
||||
|
|
@ -2023,8 +2022,8 @@ cputln: {
|
|||
inc.z conio_line_color+1
|
||||
!:
|
||||
// [59] conio_cursor_x = 0 -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// [60] conio_cursor_y = ++ conio_cursor_y -- vbuz1=_inc_vbuz1
|
||||
inc.z conio_cursor_y
|
||||
// [61] call cscroll
|
||||
|
|
@ -2080,8 +2079,8 @@ printf_str: {
|
|||
// Scroll the entire screen if the cursor is beyond the last line
|
||||
cscroll: {
|
||||
// [72] if(conio_cursor_y!=$19) goto cscroll::@return -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #$19
|
||||
cmp.z conio_cursor_y
|
||||
ldz #$19
|
||||
cpz.z conio_cursor_y
|
||||
bne __breturn
|
||||
// [73] phi from cscroll to cscroll::@1 [phi:cscroll->cscroll::@1]
|
||||
__b1_from_cscroll:
|
||||
|
|
@ -2318,10 +2317,12 @@ Removing instruction jmp __b1
|
|||
Removing instruction jmp __b2
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz conio_cursor_x
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz #0
|
||||
Removing instruction ldz zVal
|
||||
Removing instruction ldy #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Replacing label __b4_from___b3 with __b1
|
||||
|
|
@ -2410,8 +2411,8 @@ __loadstore char *conio_line_text // zp[2]:11 47023.574468085106
|
|||
void conio_mega65_init()
|
||||
__constant char * const conio_mega65_init::BASIC_CURSOR_LINE = (char *) 235
|
||||
char conio_mega65_init::line
|
||||
char conio_mega65_init::line#0 // reg byte x 11.0
|
||||
char conio_mega65_init::line#2 // reg byte x 22.0
|
||||
char conio_mega65_init::line#0 // reg byte a 11.0
|
||||
char conio_mega65_init::line#2 // reg byte a 22.0
|
||||
__stackcall void cputc(char c)
|
||||
__constant char cputc::OFFSET_STACK_C = 0
|
||||
char cputc::c
|
||||
|
|
@ -2429,8 +2430,8 @@ unsigned int gotoxy::line_offset#0 // line_offset zp[2]:16 101.0
|
|||
char gotoxy::x
|
||||
__constant char gotoxy::x#2 = 0 // x
|
||||
char gotoxy::y
|
||||
char gotoxy::y#2 // reg byte x 71.0
|
||||
char gotoxy::y#4 // reg byte x 67.33333333333333
|
||||
char gotoxy::y#2 // reg byte a 71.0
|
||||
char gotoxy::y#4 // reg byte a 67.33333333333333
|
||||
void main()
|
||||
__constant char main::s[$d] = "hello world!"
|
||||
void * memcpy(void *destination , void *source , unsigned int num)
|
||||
|
|
@ -2479,8 +2480,8 @@ const char *printf_str::s
|
|||
const char *printf_str::s#0 // s zp[2]:14 400.4
|
||||
const char *printf_str::s#2 // s zp[2]:14 1501.5
|
||||
|
||||
reg byte x [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
reg byte x [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
reg byte a [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
reg byte a [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
zp[2]:14 [ printf_str::s#2 printf_str::s#0 ]
|
||||
zp[2]:2 [ memset::str#3 memset::dst#2 memset::dst#4 memset::dst#1 memcpy::source#2 memcpy::src#2 memcpy::src#4 memcpy::src#1 ]
|
||||
reg byte z [ memset::c#4 ]
|
||||
|
|
@ -2502,7 +2503,7 @@ zp[2]:4 [ memset::end#0 memcpy::destination#2 memcpy::dst#2 memcpy::dst#4 memcpy
|
|||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 8813
|
||||
Score: 8803
|
||||
|
||||
// File Comments
|
||||
// Hello World for MEGA 65 - using stdio.h and conio.h
|
||||
|
|
@ -2549,11 +2550,11 @@ __start: {
|
|||
// __start::__init1
|
||||
// __ma char conio_cursor_x = 0
|
||||
// [1] conio_cursor_x = 0 -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// __ma char conio_cursor_y = 0
|
||||
// [2] conio_cursor_y = 0 -- vbuz1=vbuc1
|
||||
sta.z conio_cursor_y
|
||||
stz.z conio_cursor_y
|
||||
// __ma char *conio_line_text = CONIO_SCREEN_TEXT
|
||||
// [3] conio_line_text = DEFAULT_SCREEN -- pbuz1=pbuc1
|
||||
lda #<DEFAULT_SCREEN
|
||||
|
|
@ -2598,12 +2599,12 @@ conio_mega65_init: {
|
|||
// *IO_KEY = 0x47
|
||||
// [13] *IO_KEY = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// *IO_KEY = 0x53
|
||||
// [14] *IO_KEY = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// *IO_BANK |= CRAM2K
|
||||
// [15] *IO_BANK = *IO_BANK | CRAM2K -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 2K Color RAM
|
||||
|
|
@ -2611,16 +2612,16 @@ conio_mega65_init: {
|
|||
ora IO_BANK
|
||||
sta IO_BANK
|
||||
// char line = *BASIC_CURSOR_LINE+1
|
||||
// [16] conio_mega65_init::line#0 = *conio_mega65_init::BASIC_CURSOR_LINE + 1 -- vbuxx=_deref_pbuc1_plus_1
|
||||
ldx BASIC_CURSOR_LINE
|
||||
inx
|
||||
// [16] conio_mega65_init::line#0 = *conio_mega65_init::BASIC_CURSOR_LINE + 1 -- vbuaa=_deref_pbuc1_plus_1
|
||||
lda BASIC_CURSOR_LINE
|
||||
inc
|
||||
// if(line>=CONIO_HEIGHT)
|
||||
// [17] if(conio_mega65_init::line#0<$19) goto conio_mega65_init::@4 -- vbuxx_lt_vbuc1_then_la1
|
||||
cpx #$19
|
||||
// [17] if(conio_mega65_init::line#0<$19) goto conio_mega65_init::@4 -- vbuaa_lt_vbuc1_then_la1
|
||||
cmp #$19
|
||||
bcc __b1
|
||||
// [19] phi from conio_mega65_init::@3 to conio_mega65_init::@1 [phi:conio_mega65_init::@3->conio_mega65_init::@1]
|
||||
// [19] phi conio_mega65_init::line#2 = $19-1 [phi:conio_mega65_init::@3->conio_mega65_init::@1#0] -- vbuxx=vbuc1
|
||||
ldx #$19-1
|
||||
// [19] phi conio_mega65_init::line#2 = $19-1 [phi:conio_mega65_init::@3->conio_mega65_init::@1#0] -- vbuaa=vbuc1
|
||||
lda #$19-1
|
||||
// [18] phi from conio_mega65_init::@3 to conio_mega65_init::@4 [phi:conio_mega65_init::@3->conio_mega65_init::@4]
|
||||
// conio_mega65_init::@4
|
||||
// [19] phi from conio_mega65_init::@4 to conio_mega65_init::@1 [phi:conio_mega65_init::@4->conio_mega65_init::@1]
|
||||
|
|
@ -2657,14 +2658,13 @@ cputc: {
|
|||
// conio_line_color[conio_cursor_x] = conio_textcolor
|
||||
// [26] conio_line_color[conio_cursor_x] = LIGHT_BLUE -- pbuz1_derefidx_vbuz2=vbuc1
|
||||
lda #LIGHT_BLUE
|
||||
ldz conio_cursor_x
|
||||
sta (conio_line_color),z
|
||||
// if(++conio_cursor_x==CONIO_WIDTH)
|
||||
// [27] conio_cursor_x = ++ conio_cursor_x -- vbuz1=_inc_vbuz1
|
||||
inc.z conio_cursor_x
|
||||
// [28] if(conio_cursor_x!=$50) goto cputc::@return -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #$50
|
||||
cmp.z conio_cursor_x
|
||||
ldz #$50
|
||||
cpz.z conio_cursor_x
|
||||
bne __breturn
|
||||
// [29] phi from cputc::@2 to cputc::@3 [phi:cputc::@2->cputc::@3]
|
||||
// cputc::@3
|
||||
|
|
@ -2733,26 +2733,25 @@ memoryRemap: {
|
|||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [37] memoryRemap::aVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks offset page low
|
||||
lda #0
|
||||
sta.z aVal
|
||||
ldz #0
|
||||
stz.z aVal
|
||||
// char xVal = (remapBlocks << 4) | (BYTE1(lowerPageOffset) & 0xf)
|
||||
// [38] memoryRemap::xVal = 0 -- vbuz1=vbuc1
|
||||
// lower blocks to map + lower blocks offset high nibble
|
||||
sta.z xVal
|
||||
stz.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [39] memoryRemap::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [40] memoryRemap::zVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
sta.z zVal
|
||||
stz.z zVal
|
||||
// asm
|
||||
// asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom }
|
||||
lda aVal
|
||||
ldx xVal
|
||||
ldy yVal
|
||||
ldz zVal
|
||||
map
|
||||
eom
|
||||
// memoryRemap::@return
|
||||
|
|
@ -2762,7 +2761,7 @@ memoryRemap: {
|
|||
}
|
||||
// gotoxy
|
||||
// Set the cursor to the specified position
|
||||
// void gotoxy(char x, __register(X) char y)
|
||||
// void gotoxy(char x, __register(A) char y)
|
||||
gotoxy: {
|
||||
.const x = 0
|
||||
.label __5 = $14
|
||||
|
|
@ -2772,12 +2771,12 @@ gotoxy: {
|
|||
.label __8 = $12
|
||||
.label __9 = $10
|
||||
// if(y>CONIO_HEIGHT)
|
||||
// [43] if(gotoxy::y#2<$19+1) goto gotoxy::@3 -- vbuxx_lt_vbuc1_then_la1
|
||||
cpx #$19+1
|
||||
// [43] if(gotoxy::y#2<$19+1) goto gotoxy::@3 -- vbuaa_lt_vbuc1_then_la1
|
||||
cmp #$19+1
|
||||
bcc __b2
|
||||
// [45] phi from gotoxy to gotoxy::@1 [phi:gotoxy->gotoxy::@1]
|
||||
// [45] phi gotoxy::y#4 = 0 [phi:gotoxy->gotoxy::@1#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [45] phi gotoxy::y#4 = 0 [phi:gotoxy->gotoxy::@1#0] -- vbuaa=vbuc1
|
||||
lda #0
|
||||
// [44] phi from gotoxy to gotoxy::@3 [phi:gotoxy->gotoxy::@3]
|
||||
// gotoxy::@3
|
||||
// [45] phi from gotoxy::@3 to gotoxy::@1 [phi:gotoxy::@3->gotoxy::@1]
|
||||
|
|
@ -2787,14 +2786,13 @@ gotoxy: {
|
|||
__b2:
|
||||
// conio_cursor_x = x
|
||||
// [46] conio_cursor_x = gotoxy::x#2 -- vbuz1=vbuc1
|
||||
lda #x
|
||||
sta.z conio_cursor_x
|
||||
ldz #x
|
||||
stz.z conio_cursor_x
|
||||
// conio_cursor_y = y
|
||||
// [47] conio_cursor_y = gotoxy::y#4 -- vbuz1=vbuxx
|
||||
stx.z conio_cursor_y
|
||||
// [47] conio_cursor_y = gotoxy::y#4 -- vbuz1=vbuaa
|
||||
sta.z conio_cursor_y
|
||||
// unsigned int line_offset = (unsigned int)y*CONIO_WIDTH
|
||||
// [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 -- vwuz1=_word_vbuxx
|
||||
txa
|
||||
// [48] gotoxy::$7 = (unsigned int)gotoxy::y#4 -- vwuz1=_word_vbuaa
|
||||
sta.z __7
|
||||
lda #0
|
||||
sta.z __7+1
|
||||
|
|
@ -2878,8 +2876,8 @@ cputln: {
|
|||
!:
|
||||
// conio_cursor_x = 0
|
||||
// [59] conio_cursor_x = 0 -- vbuz1=vbuc1
|
||||
lda #0
|
||||
sta.z conio_cursor_x
|
||||
ldz #0
|
||||
stz.z conio_cursor_x
|
||||
// conio_cursor_y++;
|
||||
// [60] conio_cursor_y = ++ conio_cursor_y -- vbuz1=_inc_vbuz1
|
||||
inc.z conio_cursor_y
|
||||
|
|
@ -2935,8 +2933,8 @@ printf_str: {
|
|||
cscroll: {
|
||||
// if(conio_cursor_y==CONIO_HEIGHT)
|
||||
// [72] if(conio_cursor_y!=$19) goto cscroll::@return -- vbuz1_neq_vbuc1_then_la1
|
||||
lda #$19
|
||||
cmp.z conio_cursor_y
|
||||
ldz #$19
|
||||
cpz.z conio_cursor_y
|
||||
bne __breturn
|
||||
// [73] phi from cscroll to cscroll::@1 [phi:cscroll->cscroll::@1]
|
||||
// cscroll::@1
|
||||
|
|
|
|||
|
|
@ -17,8 +17,8 @@ __loadstore char *conio_line_text // zp[2]:11 47023.574468085106
|
|||
void conio_mega65_init()
|
||||
__constant char * const conio_mega65_init::BASIC_CURSOR_LINE = (char *) 235
|
||||
char conio_mega65_init::line
|
||||
char conio_mega65_init::line#0 // reg byte x 11.0
|
||||
char conio_mega65_init::line#2 // reg byte x 22.0
|
||||
char conio_mega65_init::line#0 // reg byte a 11.0
|
||||
char conio_mega65_init::line#2 // reg byte a 22.0
|
||||
__stackcall void cputc(char c)
|
||||
__constant char cputc::OFFSET_STACK_C = 0
|
||||
char cputc::c
|
||||
|
|
@ -36,8 +36,8 @@ unsigned int gotoxy::line_offset#0 // line_offset zp[2]:16 101.0
|
|||
char gotoxy::x
|
||||
__constant char gotoxy::x#2 = 0 // x
|
||||
char gotoxy::y
|
||||
char gotoxy::y#2 // reg byte x 71.0
|
||||
char gotoxy::y#4 // reg byte x 67.33333333333333
|
||||
char gotoxy::y#2 // reg byte a 71.0
|
||||
char gotoxy::y#4 // reg byte a 67.33333333333333
|
||||
void main()
|
||||
__constant char main::s[$d] = "hello world!"
|
||||
void * memcpy(void *destination , void *source , unsigned int num)
|
||||
|
|
@ -86,8 +86,8 @@ const char *printf_str::s
|
|||
const char *printf_str::s#0 // s zp[2]:14 400.4
|
||||
const char *printf_str::s#2 // s zp[2]:14 1501.5
|
||||
|
||||
reg byte x [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
reg byte x [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
reg byte a [ conio_mega65_init::line#2 conio_mega65_init::line#0 ]
|
||||
reg byte a [ gotoxy::y#4 gotoxy::y#2 ]
|
||||
zp[2]:14 [ printf_str::s#2 printf_str::s#0 ]
|
||||
zp[2]:2 [ memset::str#3 memset::dst#2 memset::dst#4 memset::dst#1 memcpy::source#2 memcpy::src#2 memcpy::src#4 memcpy::src#1 ]
|
||||
reg byte z [ memset::c#4 ]
|
||||
|
|
|
|||
|
|
@ -35,22 +35,22 @@ main: {
|
|||
jsr memoryRemapBlock
|
||||
// BLOCK_4000[0] = '-'
|
||||
// Put '-', '*' into $10000
|
||||
lda #'-'
|
||||
sta BLOCK_4000
|
||||
ldz #'-'
|
||||
stz BLOCK_4000
|
||||
// BLOCK_4000[1] = '*'
|
||||
lda #'*'
|
||||
sta BLOCK_4000+1
|
||||
ldz #'*'
|
||||
stz BLOCK_4000+1
|
||||
// memoryRemapBlock(0x80, 0x100)
|
||||
// Remap [$8000-$9fff] to point to [$10000-$11fff]
|
||||
ldx #$80
|
||||
jsr memoryRemapBlock
|
||||
// BLOCK_8000[2] = '-'
|
||||
// Put '-', '*' into $10002
|
||||
lda #'-'
|
||||
sta BLOCK_8000+2
|
||||
ldz #'-'
|
||||
stz BLOCK_8000+2
|
||||
// BLOCK_8000[3] = '*'
|
||||
lda #'*'
|
||||
sta BLOCK_8000+3
|
||||
ldz #'*'
|
||||
stz BLOCK_8000+3
|
||||
// memoryRemap(MEMORYBLOCK_4000|MEMORYBLOCK_8000, 0x0c0, 0x080)
|
||||
// Remap [$4000-$5fff] and [$8000-$9fff] to both point to [$10000-$11fff] (notice usage of page offsets)
|
||||
lda #<$80
|
||||
|
|
@ -78,7 +78,7 @@ main: {
|
|||
bcc __b2
|
||||
// memoryRemap256M(MEMORYBLOCK_4000, 0xff800-0x00040, 0)
|
||||
// Remap [$4000-$5fff] to point to [$ff80000-$ff81fff] COLORRAM! (notice usage of page offsets)
|
||||
ldz #MEMORYBLOCK_4000
|
||||
ldx #MEMORYBLOCK_4000
|
||||
lda #<$ff800-$40
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
lda #>$ff800-$40
|
||||
|
|
@ -96,8 +96,8 @@ main: {
|
|||
bcc __b5
|
||||
// memoryRemap256M(0, 0, 0)
|
||||
// Remap [$4000-$5fff] back to normal memory!
|
||||
ldz #0
|
||||
lda #0
|
||||
ldx #0
|
||||
txa
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
sta.z memoryRemap256M.lowerPageOffset+1
|
||||
sta.z memoryRemap256M.lowerPageOffset+2
|
||||
|
|
@ -273,7 +273,7 @@ memoryRemap: {
|
|||
// - If block 5 ($a000-$bfff) is remapped it will point to upperPageOffset*$100 + $a000.
|
||||
// - If block 6 ($c000-$dfff) is remapped it will point to upperPageOffset*$100 + $c000.
|
||||
// - If block 7 ($e000-$ffff) is remapped it will point to upperPageOffset*$100 + $e000.
|
||||
// void memoryRemap256M(__register(Z) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
// void memoryRemap256M(__register(X) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
memoryRemap256M: {
|
||||
.label lMb = $19
|
||||
.label __0 = $b
|
||||
|
|
@ -315,14 +315,14 @@ memoryRemap256M: {
|
|||
sta.z lMb
|
||||
// char uMb = BYTE1((unsigned int)(upperPageOffset>>4))
|
||||
// upper blocks offset megabytes
|
||||
lda #0
|
||||
sta.z uMb
|
||||
ldz #0
|
||||
stz.z uMb
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// lower blocks offset page low
|
||||
lda.z lowerPageOffset
|
||||
sta.z aVal
|
||||
// remapBlocks << 4
|
||||
tza
|
||||
txa
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
|
|
@ -338,10 +338,9 @@ memoryRemap256M: {
|
|||
sta.z xVal
|
||||
// char yVal = BYTE0(upperPageOffset)
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// remapBlocks & 0xf0
|
||||
tza
|
||||
txa
|
||||
and #$f0
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
|
|
|
|||
|
|
@ -801,10 +801,10 @@ Allocated zp[1]:41 [ memoryRemap256M::aVal ]
|
|||
Allocated zp[1]:42 [ memoryRemap256M::uMb ]
|
||||
Allocated zp[1]:43 [ memoryRemap256M::lMb ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [2] *main::BLOCK_4000 = '-' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [3] *(main::BLOCK_4000+1) = '*' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [5] *(main::BLOCK_8000+2) = '-' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] *(main::BLOCK_8000+3) = '*' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [2] *main::BLOCK_4000 = '-' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [3] *(main::BLOCK_4000+1) = '*' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [5] *(main::BLOCK_8000+2) = '-' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [6] *(main::BLOCK_8000+3) = '*' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [8] *(main::BLOCK_8000+4) = *(main::BLOCK_4000+2) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] *(main::BLOCK_4000+5) = *(main::BLOCK_8000+1) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [19] main::$7 = $40 + main::i1#2 [ main::i1#2 main::$7 ] ( [ main::i1#2 main::$7 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -830,18 +830,19 @@ Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg b
|
|||
Statement [47] memoryRemap256M::$0 = memoryRemap256M::lowerPageOffset#2 >> 4 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:40 [ memoryRemap256M::remapBlocks#2 ]
|
||||
Statement [48] memoryRemap256M::lMb = byte1 (unsigned int)memoryRemap256M::$0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] { } ) always clobbers reg byte a
|
||||
Statement [49] memoryRemap256M::uMb = 0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } ) always clobbers reg byte a
|
||||
Statement [49] memoryRemap256M::uMb = 0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } ) always clobbers reg byte z
|
||||
Removing always clobbered register reg byte z as potential for zp[1]:40 [ memoryRemap256M::remapBlocks#2 ]
|
||||
Statement [50] memoryRemap256M::aVal = byte0 memoryRemap256M::lowerPageOffset#2 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] { } ) always clobbers reg byte a
|
||||
Statement [53] memoryRemap256M::$7 = memoryRemap256M::$6 & $f [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] { } ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp[1]:31 [ memoryRemap256M::$5 ]
|
||||
Statement [55] memoryRemap256M::yVal = 0 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [55] memoryRemap256M::yVal = 0 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] ( memoryRemap256M:13 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] { } memoryRemap256M:17 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] { } ) always clobbers reg byte a
|
||||
Statement asm { ldalMb ldx#$0f ldyuMb ldz#$0f map ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [2] *main::BLOCK_4000 = '-' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [3] *(main::BLOCK_4000+1) = '*' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [5] *(main::BLOCK_8000+2) = '-' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [6] *(main::BLOCK_8000+3) = '*' [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [2] *main::BLOCK_4000 = '-' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [3] *(main::BLOCK_4000+1) = '*' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [5] *(main::BLOCK_8000+2) = '-' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [6] *(main::BLOCK_8000+3) = '*' [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [8] *(main::BLOCK_8000+4) = *(main::BLOCK_4000+2) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [9] *(main::BLOCK_4000+5) = *(main::BLOCK_8000+1) [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [19] main::$7 = $40 + main::i1#2 [ main::i1#2 main::$7 ] ( [ main::i1#2 main::$7 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -860,11 +861,11 @@ Statement [42] memoryRemap::$8 = memoryRemap::$7 & $f [ memoryRemap::aVal memory
|
|||
Statement asm { ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [47] memoryRemap256M::$0 = memoryRemap256M::lowerPageOffset#2 >> 4 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::$0 ] { } ) always clobbers reg byte a
|
||||
Statement [48] memoryRemap256M::lMb = byte1 (unsigned int)memoryRemap256M::$0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb ] { } ) always clobbers reg byte a
|
||||
Statement [49] memoryRemap256M::uMb = 0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } ) always clobbers reg byte a
|
||||
Statement [49] memoryRemap256M::uMb = 0 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb ] { } ) always clobbers reg byte z
|
||||
Statement [50] memoryRemap256M::aVal = byte0 memoryRemap256M::lowerPageOffset#2 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal ] { } ) always clobbers reg byte a
|
||||
Statement [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] ( memoryRemap256M:13 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] { } memoryRemap256M:17 [ memoryRemap256M::lowerPageOffset#2 memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 ] { } ) always clobbers reg byte a
|
||||
Statement [53] memoryRemap256M::$7 = memoryRemap256M::$6 & $f [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::$5 memoryRemap256M::$7 ] { } ) always clobbers reg byte a
|
||||
Statement [55] memoryRemap256M::yVal = 0 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } ) always clobbers reg byte a
|
||||
Statement [55] memoryRemap256M::yVal = 0 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] ( memoryRemap256M:13 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } memoryRemap256M:17 [ memoryRemap256M::remapBlocks#2 memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal ] { } ) always clobbers reg byte z
|
||||
Statement [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] ( memoryRemap256M:13 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] { } memoryRemap256M:17 [ memoryRemap256M::lMb memoryRemap256M::uMb memoryRemap256M::aVal memoryRemap256M::xVal memoryRemap256M::yVal memoryRemap256M::$10 ] { } ) always clobbers reg byte a
|
||||
Statement asm { ldalMb ldx#$0f ldyuMb ldz#$0f map ldaaVal ldxxVal ldyyVal ldzzVal map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Potential registers zp[1]:13 [ main::i#2 main::i#1 ] : zp[1]:13 , reg byte x , reg byte y , reg byte z ,
|
||||
|
|
@ -874,7 +875,7 @@ Potential registers zp[2]:7 [ memoryRemap::lowerPageOffset#2 memoryRemap::lowerP
|
|||
Potential registers zp[1]:14 [ memoryRemap::remapBlocks#2 memoryRemap::remapBlocks#0 ] : zp[1]:14 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[2]:11 [ memoryRemap::upperPageOffset#2 memoryRemap::upperPageOffset#0 ] : zp[2]:11 ,
|
||||
Potential registers zp[4]:34 [ memoryRemap256M::lowerPageOffset#2 ] : zp[4]:34 ,
|
||||
Potential registers zp[1]:40 [ memoryRemap256M::remapBlocks#2 ] : zp[1]:40 , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[1]:40 [ memoryRemap256M::remapBlocks#2 ] : zp[1]:40 , reg byte x , reg byte y ,
|
||||
Potential registers zp[1]:16 [ main::$7 ] : zp[1]:16 , reg byte a , reg byte x , reg byte y , reg byte z ,
|
||||
Potential registers zp[2]:32 [ memoryRemapBlock::pageOffset#0 ] : zp[2]:32 ,
|
||||
Potential registers zp[1]:17 [ memoryRemapBlock::block#0 ] : zp[1]:17 , reg byte a , reg byte x , reg byte y , reg byte z ,
|
||||
|
|
@ -919,7 +920,7 @@ Uplift Scope []
|
|||
Uplifting [memoryRemap] best 1374 combination reg byte a [ memoryRemap::$2 ] reg byte a [ memoryRemap::$3 ] reg byte a [ memoryRemap::$7 ] zp[1]:5 [ memoryRemap::$8 ] zp[1]:6 [ memoryRemap::zVal ] zp[2]:7 [ memoryRemap::lowerPageOffset#2 memoryRemap::lowerPageOffset#0 ] zp[1]:9 [ memoryRemap::$1 ] zp[1]:10 [ memoryRemap::$6 ] zp[2]:11 [ memoryRemap::upperPageOffset#2 memoryRemap::upperPageOffset#0 ] zp[1]:14 [ memoryRemap::remapBlocks#2 memoryRemap::remapBlocks#0 ] zp[1]:22 [ memoryRemap::yVal ] zp[1]:23 [ memoryRemap::xVal ] zp[1]:30 [ memoryRemap::aVal ]
|
||||
Limited combination testing to 100 combinations of 40000 possible.
|
||||
Uplifting [memoryRemap256M] best 1356 combination reg byte a [ memoryRemap256M::$6 ] reg byte a [ memoryRemap256M::$7 ] reg byte a [ memoryRemap256M::$10 ] zp[4]:25 [ memoryRemap256M::$0 ] zp[1]:29 [ memoryRemap256M::zVal ] zp[1]:31 [ memoryRemap256M::$5 ] zp[4]:34 [ memoryRemap256M::lowerPageOffset#2 ] zp[1]:38 [ memoryRemap256M::yVal ] zp[1]:39 [ memoryRemap256M::xVal ] zp[1]:40 [ memoryRemap256M::remapBlocks#2 ] zp[1]:41 [ memoryRemap256M::aVal ] zp[1]:42 [ memoryRemap256M::uMb ] zp[1]:43 [ memoryRemap256M::lMb ]
|
||||
Limited combination testing to 100 combinations of 2000 possible.
|
||||
Limited combination testing to 100 combinations of 1500 possible.
|
||||
Uplifting [main] best 1046 combination reg byte x [ main::i#2 main::i#1 ] reg byte x [ main::i1#2 main::i1#1 ] reg byte a [ main::$7 ]
|
||||
Uplifting [memoryRemapBlock] best 1032 combination reg byte a [ memoryRemapBlock::block#0 ] reg byte a [ memoryRemapBlock::blockBits#0 ] reg byte x [ memoryRemapBlock::blockPage#2 ] zp[2]:32 [ memoryRemapBlock::pageOffset#0 ]
|
||||
Uplifting [MOS6526_CIA] best 1032 combination
|
||||
|
|
@ -956,13 +957,13 @@ Uplifting [memoryRemap256M] best 1017 combination zp[1]:38 [ memoryRemap256M::yV
|
|||
Attempting to uplift remaining variables inzp[1]:39 [ memoryRemap256M::xVal ]
|
||||
Uplifting [memoryRemap256M] best 1017 combination zp[1]:39 [ memoryRemap256M::xVal ]
|
||||
Attempting to uplift remaining variables inzp[1]:40 [ memoryRemap256M::remapBlocks#2 ]
|
||||
Uplifting [memoryRemap256M] best 1007 combination reg byte z [ memoryRemap256M::remapBlocks#2 ]
|
||||
Uplifting [memoryRemap256M] best 1009 combination reg byte x [ memoryRemap256M::remapBlocks#2 ]
|
||||
Attempting to uplift remaining variables inzp[1]:41 [ memoryRemap256M::aVal ]
|
||||
Uplifting [memoryRemap256M] best 1007 combination zp[1]:41 [ memoryRemap256M::aVal ]
|
||||
Uplifting [memoryRemap256M] best 1009 combination zp[1]:41 [ memoryRemap256M::aVal ]
|
||||
Attempting to uplift remaining variables inzp[1]:42 [ memoryRemap256M::uMb ]
|
||||
Uplifting [memoryRemap256M] best 1007 combination zp[1]:42 [ memoryRemap256M::uMb ]
|
||||
Uplifting [memoryRemap256M] best 1009 combination zp[1]:42 [ memoryRemap256M::uMb ]
|
||||
Attempting to uplift remaining variables inzp[1]:43 [ memoryRemap256M::lMb ]
|
||||
Uplifting [memoryRemap256M] best 1007 combination zp[1]:43 [ memoryRemap256M::lMb ]
|
||||
Uplifting [memoryRemap256M] best 1009 combination zp[1]:43 [ memoryRemap256M::lMb ]
|
||||
Coalescing zero page register [ zp[2]:7 [ memoryRemap::lowerPageOffset#2 memoryRemap::lowerPageOffset#0 ] ] with [ zp[2]:32 [ memoryRemapBlock::pageOffset#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp[1]:31 [ memoryRemap256M::$5 ] ] with [ zp[1]:9 [ memoryRemap::$1 ] ]
|
||||
Allocated (was zp[1]:6) zp[1]:2 [ memoryRemap::zVal ]
|
||||
|
|
@ -1030,11 +1031,11 @@ main: {
|
|||
__b7:
|
||||
// [2] *main::BLOCK_4000 = '-' -- _deref_pbuc1=vbuc2
|
||||
// Put '-', '*' into $10000
|
||||
lda #'-'
|
||||
sta BLOCK_4000
|
||||
ldz #'-'
|
||||
stz BLOCK_4000
|
||||
// [3] *(main::BLOCK_4000+1) = '*' -- _deref_pbuc1=vbuc2
|
||||
lda #'*'
|
||||
sta BLOCK_4000+1
|
||||
ldz #'*'
|
||||
stz BLOCK_4000+1
|
||||
// [4] call memoryRemapBlock
|
||||
// Remap [$8000-$9fff] to point to [$10000-$11fff]
|
||||
// [24] phi from main::@7 to memoryRemapBlock [phi:main::@7->memoryRemapBlock]
|
||||
|
|
@ -1047,11 +1048,11 @@ main: {
|
|||
__b8:
|
||||
// [5] *(main::BLOCK_8000+2) = '-' -- _deref_pbuc1=vbuc2
|
||||
// Put '-', '*' into $10002
|
||||
lda #'-'
|
||||
sta BLOCK_8000+2
|
||||
ldz #'-'
|
||||
stz BLOCK_8000+2
|
||||
// [6] *(main::BLOCK_8000+3) = '*' -- _deref_pbuc1=vbuc2
|
||||
lda #'*'
|
||||
sta BLOCK_8000+3
|
||||
ldz #'*'
|
||||
stz BLOCK_8000+3
|
||||
// [7] call memoryRemap
|
||||
// Remap [$4000-$5fff] and [$8000-$9fff] to both point to [$10000-$11fff] (notice usage of page offsets)
|
||||
// [33] phi from main::@8 to memoryRemap [phi:main::@8->memoryRemap]
|
||||
|
|
@ -1099,8 +1100,8 @@ main: {
|
|||
// Remap [$4000-$5fff] to point to [$ff80000-$ff81fff] COLORRAM! (notice usage of page offsets)
|
||||
// [46] phi from main::@3 to memoryRemap256M [phi:main::@3->memoryRemap256M]
|
||||
memoryRemap256M_from___b3:
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = MEMORYBLOCK_4000 [phi:main::@3->memoryRemap256M#0] -- vbuzz=vbuc1
|
||||
ldz #MEMORYBLOCK_4000
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = MEMORYBLOCK_4000 [phi:main::@3->memoryRemap256M#0] -- vbuxx=vbuc1
|
||||
ldx #MEMORYBLOCK_4000
|
||||
// [46] phi memoryRemap256M::lowerPageOffset#2 = $ff800-$40 [phi:main::@3->memoryRemap256M#1] -- vduz1=vduc1
|
||||
lda #<$ff800-$40
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
|
|
@ -1131,8 +1132,8 @@ main: {
|
|||
// Remap [$4000-$5fff] back to normal memory!
|
||||
// [46] phi from main::@6 to memoryRemap256M [phi:main::@6->memoryRemap256M]
|
||||
memoryRemap256M_from___b6:
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = 0 [phi:main::@6->memoryRemap256M#0] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = 0 [phi:main::@6->memoryRemap256M#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [46] phi memoryRemap256M::lowerPageOffset#2 = 0 [phi:main::@6->memoryRemap256M#1] -- vduz1=vbuc1
|
||||
lda #0
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
|
|
@ -1339,7 +1340,7 @@ memoryRemap: {
|
|||
// - If block 5 ($a000-$bfff) is remapped it will point to upperPageOffset*$100 + $a000.
|
||||
// - If block 6 ($c000-$dfff) is remapped it will point to upperPageOffset*$100 + $c000.
|
||||
// - If block 7 ($e000-$ffff) is remapped it will point to upperPageOffset*$100 + $e000.
|
||||
// void memoryRemap256M(__register(Z) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
// void memoryRemap256M(__register(X) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
memoryRemap256M: {
|
||||
.label lMb = $19
|
||||
.label __0 = $b
|
||||
|
|
@ -1381,14 +1382,14 @@ memoryRemap256M: {
|
|||
sta.z lMb
|
||||
// [49] memoryRemap256M::uMb = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset megabytes
|
||||
lda #0
|
||||
sta.z uMb
|
||||
ldz #0
|
||||
stz.z uMb
|
||||
// [50] memoryRemap256M::aVal = byte0 memoryRemap256M::lowerPageOffset#2 -- vbuz1=_byte0_vduz2
|
||||
// lower blocks offset page low
|
||||
lda.z lowerPageOffset
|
||||
sta.z aVal
|
||||
// [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 -- vbuz1=vbuzz_rol_4
|
||||
tza
|
||||
// [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 -- vbuz1=vbuxx_rol_4
|
||||
txa
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
|
|
@ -1404,10 +1405,10 @@ memoryRemap256M: {
|
|||
sta.z xVal
|
||||
// [55] memoryRemap256M::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
// [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 -- vbuaa=vbuzz_band_vbuc1
|
||||
tza
|
||||
ldz #0
|
||||
stz.z yVal
|
||||
// [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
and #$f0
|
||||
// [57] memoryRemap256M::zVal = memoryRemap256M::$10 -- vbuz1=vbuaa
|
||||
// upper blocks to map + upper blocks offset page high nibble
|
||||
|
|
@ -1445,7 +1446,9 @@ Removing instruction jmp __breturn
|
|||
Removing instruction jmp __breturn
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Replacing instruction lda #0 with TXA
|
||||
Removing instruction lda #0
|
||||
Removing instruction ldz #0
|
||||
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
||||
Removing instruction __b3_from___b1:
|
||||
Removing instruction __b6_from___b4:
|
||||
|
|
@ -1516,7 +1519,7 @@ __loadstore volatile char memoryRemap256M::lMb // zp[1]:25 1.1
|
|||
unsigned long memoryRemap256M::lowerPageOffset
|
||||
unsigned long memoryRemap256M::lowerPageOffset#2 // lowerPageOffset zp[4]:17 5.5
|
||||
char memoryRemap256M::remapBlocks
|
||||
char memoryRemap256M::remapBlocks#2 // reg byte z 2.2
|
||||
char memoryRemap256M::remapBlocks#2 // reg byte x 2.2
|
||||
__loadstore volatile char memoryRemap256M::uMb // zp[1]:24 1.2222222222222223
|
||||
unsigned long memoryRemap256M::upperPageOffset
|
||||
__loadstore volatile char memoryRemap256M::xVal // zp[1]:22 2.75
|
||||
|
|
@ -1540,7 +1543,7 @@ zp[2]:3 [ memoryRemap::lowerPageOffset#2 memoryRemap::lowerPageOffset#0 memoryRe
|
|||
reg byte z [ memoryRemap::remapBlocks#2 memoryRemap::remapBlocks#0 ]
|
||||
zp[2]:7 [ memoryRemap::upperPageOffset#2 memoryRemap::upperPageOffset#0 ]
|
||||
zp[4]:17 [ memoryRemap256M::lowerPageOffset#2 ]
|
||||
reg byte z [ memoryRemap256M::remapBlocks#2 ]
|
||||
reg byte x [ memoryRemap256M::remapBlocks#2 ]
|
||||
reg byte a [ main::$7 ]
|
||||
reg byte a [ memoryRemapBlock::block#0 ]
|
||||
reg byte a [ memoryRemapBlock::blockBits#0 ]
|
||||
|
|
@ -1615,12 +1618,12 @@ main: {
|
|||
// BLOCK_4000[0] = '-'
|
||||
// [2] *main::BLOCK_4000 = '-' -- _deref_pbuc1=vbuc2
|
||||
// Put '-', '*' into $10000
|
||||
lda #'-'
|
||||
sta BLOCK_4000
|
||||
ldz #'-'
|
||||
stz BLOCK_4000
|
||||
// BLOCK_4000[1] = '*'
|
||||
// [3] *(main::BLOCK_4000+1) = '*' -- _deref_pbuc1=vbuc2
|
||||
lda #'*'
|
||||
sta BLOCK_4000+1
|
||||
ldz #'*'
|
||||
stz BLOCK_4000+1
|
||||
// memoryRemapBlock(0x80, 0x100)
|
||||
// [4] call memoryRemapBlock
|
||||
// Remap [$8000-$9fff] to point to [$10000-$11fff]
|
||||
|
|
@ -1632,12 +1635,12 @@ main: {
|
|||
// BLOCK_8000[2] = '-'
|
||||
// [5] *(main::BLOCK_8000+2) = '-' -- _deref_pbuc1=vbuc2
|
||||
// Put '-', '*' into $10002
|
||||
lda #'-'
|
||||
sta BLOCK_8000+2
|
||||
ldz #'-'
|
||||
stz BLOCK_8000+2
|
||||
// BLOCK_8000[3] = '*'
|
||||
// [6] *(main::BLOCK_8000+3) = '*' -- _deref_pbuc1=vbuc2
|
||||
lda #'*'
|
||||
sta BLOCK_8000+3
|
||||
ldz #'*'
|
||||
stz BLOCK_8000+3
|
||||
// memoryRemap(MEMORYBLOCK_4000|MEMORYBLOCK_8000, 0x0c0, 0x080)
|
||||
// [7] call memoryRemap
|
||||
// Remap [$4000-$5fff] and [$8000-$9fff] to both point to [$10000-$11fff] (notice usage of page offsets)
|
||||
|
|
@ -1681,8 +1684,8 @@ main: {
|
|||
// [13] call memoryRemap256M
|
||||
// Remap [$4000-$5fff] to point to [$ff80000-$ff81fff] COLORRAM! (notice usage of page offsets)
|
||||
// [46] phi from main::@3 to memoryRemap256M [phi:main::@3->memoryRemap256M]
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = MEMORYBLOCK_4000 [phi:main::@3->memoryRemap256M#0] -- vbuzz=vbuc1
|
||||
ldz #MEMORYBLOCK_4000
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = MEMORYBLOCK_4000 [phi:main::@3->memoryRemap256M#0] -- vbuxx=vbuc1
|
||||
ldx #MEMORYBLOCK_4000
|
||||
// [46] phi memoryRemap256M::lowerPageOffset#2 = $ff800-$40 [phi:main::@3->memoryRemap256M#1] -- vduz1=vduc1
|
||||
lda #<$ff800-$40
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
|
|
@ -1709,10 +1712,10 @@ main: {
|
|||
// [17] call memoryRemap256M
|
||||
// Remap [$4000-$5fff] back to normal memory!
|
||||
// [46] phi from main::@6 to memoryRemap256M [phi:main::@6->memoryRemap256M]
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = 0 [phi:main::@6->memoryRemap256M#0] -- vbuzz=vbuc1
|
||||
ldz #0
|
||||
// [46] phi memoryRemap256M::remapBlocks#2 = 0 [phi:main::@6->memoryRemap256M#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [46] phi memoryRemap256M::lowerPageOffset#2 = 0 [phi:main::@6->memoryRemap256M#1] -- vduz1=vbuc1
|
||||
lda #0
|
||||
txa
|
||||
sta.z memoryRemap256M.lowerPageOffset
|
||||
sta.z memoryRemap256M.lowerPageOffset+1
|
||||
sta.z memoryRemap256M.lowerPageOffset+2
|
||||
|
|
@ -1930,7 +1933,7 @@ memoryRemap: {
|
|||
// - If block 5 ($a000-$bfff) is remapped it will point to upperPageOffset*$100 + $a000.
|
||||
// - If block 6 ($c000-$dfff) is remapped it will point to upperPageOffset*$100 + $c000.
|
||||
// - If block 7 ($e000-$ffff) is remapped it will point to upperPageOffset*$100 + $e000.
|
||||
// void memoryRemap256M(__register(Z) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
// void memoryRemap256M(__register(X) char remapBlocks, __zp($11) unsigned long lowerPageOffset, unsigned long upperPageOffset)
|
||||
memoryRemap256M: {
|
||||
.label lMb = $19
|
||||
.label __0 = $b
|
||||
|
|
@ -1975,16 +1978,16 @@ memoryRemap256M: {
|
|||
// char uMb = BYTE1((unsigned int)(upperPageOffset>>4))
|
||||
// [49] memoryRemap256M::uMb = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset megabytes
|
||||
lda #0
|
||||
sta.z uMb
|
||||
ldz #0
|
||||
stz.z uMb
|
||||
// char aVal = BYTE0(lowerPageOffset)
|
||||
// [50] memoryRemap256M::aVal = byte0 memoryRemap256M::lowerPageOffset#2 -- vbuz1=_byte0_vduz2
|
||||
// lower blocks offset page low
|
||||
lda.z lowerPageOffset
|
||||
sta.z aVal
|
||||
// remapBlocks << 4
|
||||
// [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 -- vbuz1=vbuzz_rol_4
|
||||
tza
|
||||
// [51] memoryRemap256M::$5 = memoryRemap256M::remapBlocks#2 << 4 -- vbuz1=vbuxx_rol_4
|
||||
txa
|
||||
asl
|
||||
asl
|
||||
asl
|
||||
|
|
@ -2004,11 +2007,10 @@ memoryRemap256M: {
|
|||
// char yVal = BYTE0(upperPageOffset)
|
||||
// [55] memoryRemap256M::yVal = 0 -- vbuz1=vbuc1
|
||||
// upper blocks offset page
|
||||
lda #0
|
||||
sta.z yVal
|
||||
stz.z yVal
|
||||
// remapBlocks & 0xf0
|
||||
// [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 -- vbuaa=vbuzz_band_vbuc1
|
||||
tza
|
||||
// [56] memoryRemap256M::$10 = memoryRemap256M::remapBlocks#2 & $f0 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
and #$f0
|
||||
// char zVal = (remapBlocks & 0xf0) | (BYTE1(upperPageOffset) & 0xf)
|
||||
// [57] memoryRemap256M::zVal = memoryRemap256M::$10 -- vbuz1=vbuaa
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ __loadstore volatile char memoryRemap256M::lMb // zp[1]:25 1.1
|
|||
unsigned long memoryRemap256M::lowerPageOffset
|
||||
unsigned long memoryRemap256M::lowerPageOffset#2 // lowerPageOffset zp[4]:17 5.5
|
||||
char memoryRemap256M::remapBlocks
|
||||
char memoryRemap256M::remapBlocks#2 // reg byte z 2.2
|
||||
char memoryRemap256M::remapBlocks#2 // reg byte x 2.2
|
||||
__loadstore volatile char memoryRemap256M::uMb // zp[1]:24 1.2222222222222223
|
||||
unsigned long memoryRemap256M::upperPageOffset
|
||||
__loadstore volatile char memoryRemap256M::xVal // zp[1]:22 2.75
|
||||
|
|
@ -66,7 +66,7 @@ zp[2]:3 [ memoryRemap::lowerPageOffset#2 memoryRemap::lowerPageOffset#0 memoryRe
|
|||
reg byte z [ memoryRemap::remapBlocks#2 memoryRemap::remapBlocks#0 ]
|
||||
zp[2]:7 [ memoryRemap::upperPageOffset#2 memoryRemap::upperPageOffset#0 ]
|
||||
zp[4]:17 [ memoryRemap256M::lowerPageOffset#2 ]
|
||||
reg byte z [ memoryRemap256M::remapBlocks#2 ]
|
||||
reg byte x [ memoryRemap256M::remapBlocks#2 ]
|
||||
reg byte a [ main::$7 ]
|
||||
reg byte a [ memoryRemapBlock::block#0 ]
|
||||
reg byte a [ memoryRemapBlock::blockBits#0 ]
|
||||
|
|
|
|||
|
|
@ -92,40 +92,41 @@
|
|||
// Pointer to the song play routine
|
||||
.label songPlay = SONG+3
|
||||
// Sine Position (used across effects)
|
||||
.label sin_idx = 8
|
||||
.label sin_idx = 9
|
||||
// scroll soft position of text scrolly (0-7)
|
||||
.label scroll_soft = 9
|
||||
.label scroll_soft = $a
|
||||
// scroll text pointer to next char
|
||||
.label scroll_ptr = $a
|
||||
.label scroll_ptr = $b
|
||||
// Zoom Position
|
||||
.label greet_zoomx = 6
|
||||
.label greet_zoomx = 7
|
||||
// The greeting currently being shown
|
||||
.label greet_idx = 7
|
||||
.label greet_idx = 8
|
||||
.segment Code
|
||||
__start: {
|
||||
// volatile char sin_idx
|
||||
lda #0
|
||||
sta.z sin_idx
|
||||
ldz #0
|
||||
stz.z sin_idx
|
||||
// volatile char scroll_soft = 7
|
||||
lda #7
|
||||
sta.z scroll_soft
|
||||
ldz #7
|
||||
stz.z scroll_soft
|
||||
// char * volatile scroll_ptr = SCROLL_TEXT
|
||||
lda #<SCROLL_TEXT
|
||||
sta.z scroll_ptr
|
||||
lda #>SCROLL_TEXT
|
||||
sta.z scroll_ptr+1
|
||||
// volatile char greet_zoomx
|
||||
lda #0
|
||||
sta.z greet_zoomx
|
||||
ldz #0
|
||||
stz.z greet_zoomx
|
||||
// volatile char greet_idx
|
||||
sta.z greet_idx
|
||||
stz.z greet_idx
|
||||
jsr main
|
||||
rts
|
||||
}
|
||||
// BIG INTERRUPT LOOP
|
||||
irq: {
|
||||
.label sin_bar = 5
|
||||
.label barcnt = 4
|
||||
.label line = 4
|
||||
.label sin_bar = 6
|
||||
.label barcnt = 5
|
||||
pha
|
||||
phx
|
||||
phy
|
||||
|
|
@ -137,20 +138,21 @@ irq: {
|
|||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_RASLINE0
|
||||
// VICII->IRQ_STATUS = IRQ_RASTER
|
||||
// Acknowledge the IRQ
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS
|
||||
// VICII->CONTROL2 = 0
|
||||
// reset x scroll
|
||||
lda #0
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2
|
||||
ldz #0
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2
|
||||
// char wobble_idx = ++sin_idx
|
||||
inc.z sin_idx
|
||||
// Generate Raster Bars and more
|
||||
ldx.z sin_idx
|
||||
ldz #0
|
||||
stz.z line
|
||||
__b2:
|
||||
// for(char line=0;line!=RASTER_LINES;line++)
|
||||
cpz #RASTER_LINES
|
||||
ldz #RASTER_LINES
|
||||
cpz.z line
|
||||
beq !__b3+
|
||||
jmp __b3
|
||||
!__b3:
|
||||
|
|
@ -179,8 +181,8 @@ irq: {
|
|||
// Big block of bars (16)
|
||||
lda.z sin_idx
|
||||
sta.z sin_bar
|
||||
lda #0
|
||||
sta.z barcnt
|
||||
ldz #0
|
||||
stz.z barcnt
|
||||
__b22:
|
||||
// for(char barcnt=0; barcnt<16; barcnt++)
|
||||
lda.z barcnt
|
||||
|
|
@ -207,12 +209,12 @@ irq: {
|
|||
bcc __b33
|
||||
// if(--scroll_soft == 0xff)
|
||||
dec.z scroll_soft
|
||||
lda #$ff
|
||||
cmp.z scroll_soft
|
||||
ldz #$ff
|
||||
cpz.z scroll_soft
|
||||
bne __breturn
|
||||
// scroll_soft = 7
|
||||
lda #7
|
||||
sta.z scroll_soft
|
||||
ldz #7
|
||||
stz.z scroll_soft
|
||||
ldx #0
|
||||
// Move scroll on screen
|
||||
__b36:
|
||||
|
|
@ -285,16 +287,16 @@ irq: {
|
|||
asl
|
||||
asl
|
||||
asl
|
||||
taz
|
||||
ldy #0
|
||||
tay
|
||||
ldz #0
|
||||
__b24:
|
||||
// for(char i=0;i<16;i++)
|
||||
cpy #$10
|
||||
cpz #$10
|
||||
bcc __b25
|
||||
ldy #0
|
||||
ldz #0
|
||||
__b26:
|
||||
// for(char i=0;i<15;i++)
|
||||
cpy #$f
|
||||
cpz #$f
|
||||
bcc __b27
|
||||
// sin_bar += 10
|
||||
lda #$a
|
||||
|
|
@ -306,24 +308,24 @@ irq: {
|
|||
jmp __b22
|
||||
__b27:
|
||||
// rasters[idx++] = --barcol;
|
||||
dez
|
||||
dey
|
||||
// rasters[idx++] = --barcol
|
||||
tza
|
||||
tya
|
||||
sta rasters,x
|
||||
// rasters[idx++] = --barcol;
|
||||
inx
|
||||
// for(char i=0;i<15;i++)
|
||||
iny
|
||||
inz
|
||||
jmp __b26
|
||||
__b25:
|
||||
// rasters[idx++] = barcol++
|
||||
tza
|
||||
tya
|
||||
sta rasters,x
|
||||
// rasters[idx++] = barcol++;
|
||||
inx
|
||||
inz
|
||||
// for(char i=0;i<16;i++)
|
||||
iny
|
||||
// for(char i=0;i<16;i++)
|
||||
inz
|
||||
jmp __b24
|
||||
__b20:
|
||||
// rasters[l] = 0
|
||||
|
|
@ -366,24 +368,27 @@ irq: {
|
|||
jmp __b17
|
||||
__b3:
|
||||
// char col = rasters[line]
|
||||
tza
|
||||
tay
|
||||
ldy.z line
|
||||
lda rasters,y
|
||||
// VICIII->BORDER_COLOR = col
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_BORDER_COLOR
|
||||
// VICIII->BG_COLOR = col
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_BG_COLOR
|
||||
// if(line < SCROLL_Y)
|
||||
cpz #SCROLL_Y
|
||||
tya
|
||||
cmp #SCROLL_Y
|
||||
bcc __b5
|
||||
// if(line == SCROLL_Y)
|
||||
cpz #SCROLL_Y
|
||||
ldz #SCROLL_Y
|
||||
cpz.z line
|
||||
beq __b6
|
||||
// if(line == SCROLL_Y+SCROLL_BLACKBARS)
|
||||
cpz #SCROLL_Y+SCROLL_BLACKBARS
|
||||
ldz #SCROLL_Y+SCROLL_BLACKBARS
|
||||
cpz.z line
|
||||
beq __b7
|
||||
// if(line == SCROLL_Y+SCROLL_BLACKBARS+1)
|
||||
cpz #SCROLL_Y+SCROLL_BLACKBARS+1
|
||||
ldz #SCROLL_Y+SCROLL_BLACKBARS+1
|
||||
cpz.z line
|
||||
bne __b8
|
||||
// char zoomval = SINE[greet_zoomx++]
|
||||
// if raster position > SCROLL_Y pos do zoom
|
||||
|
|
@ -401,12 +406,12 @@ irq: {
|
|||
bne __b8
|
||||
// if(++greet_idx == GREET_COUNT)
|
||||
inc.z greet_idx
|
||||
lda #GREET_COUNT
|
||||
cmp.z greet_idx
|
||||
ldz #GREET_COUNT
|
||||
cpz.z greet_idx
|
||||
bne __b8
|
||||
// greet_idx = 0
|
||||
lda #0
|
||||
sta.z greet_idx
|
||||
ldz #0
|
||||
stz.z greet_idx
|
||||
__b8:
|
||||
// char raster = VICII->RASTER
|
||||
// Wait for the next raster line
|
||||
|
|
@ -416,20 +421,20 @@ irq: {
|
|||
cmp VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
beq __b9
|
||||
// for(char line=0;line!=RASTER_LINES;line++)
|
||||
inz
|
||||
inc.z line
|
||||
jmp __b2
|
||||
__b7:
|
||||
// VICIV->TEXTXPOS_LO = 0x50
|
||||
// if raster position > SCROLL_Y pos do nozoom
|
||||
// default value
|
||||
lda #$50
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
ldz #$50
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
jmp __b8
|
||||
__b6:
|
||||
// if raster position = SCROLL_Y pos do scroll
|
||||
// no wobbling from this point
|
||||
lda #$50
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
ldz #$50
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_TEXTXPOS_LO
|
||||
// VICII->CONTROL2 = scroll_soft
|
||||
// set softscroll
|
||||
lda.z scroll_soft
|
||||
|
|
@ -444,18 +449,18 @@ irq: {
|
|||
inx
|
||||
// VICIV->CHRXSCL = 0x66
|
||||
// No zooming
|
||||
lda #$66
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRXSCL
|
||||
ldz #$66
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_CHRXSCL
|
||||
jmp __b8
|
||||
}
|
||||
main: {
|
||||
// VICIII->KEY = 0x47
|
||||
// Enable MEGA65 features
|
||||
lda #$47
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$47
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIII->KEY = 0x53
|
||||
lda #$53
|
||||
sta VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
ldz #$53
|
||||
stz VICIII+OFFSET_STRUCT_MOS4569_VICIII_KEY
|
||||
// VICIV->CONTROLB |= 0x40
|
||||
// Enable 48MHz fast mode
|
||||
lda #$40
|
||||
|
|
@ -505,20 +510,20 @@ main: {
|
|||
sei
|
||||
// CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR
|
||||
// Disable CIA 1 Timer IRQ
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
ldz #CIA_INTERRUPT_CLEAR
|
||||
stz CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
|
||||
// VICII->RASTER = IRQ_Y
|
||||
// Set raster line to 0x16
|
||||
lda #IRQ_Y
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
ldz #IRQ_Y
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER
|
||||
// VICII->CONTROL1 &= 0x7f
|
||||
lda #$7f
|
||||
and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1
|
||||
// VICII->IRQ_ENABLE = IRQ_RASTER
|
||||
// Enable Raster Interrupt
|
||||
lda #IRQ_RASTER
|
||||
sta VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
ldz #IRQ_RASTER
|
||||
stz VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_ENABLE
|
||||
// *HARDWARE_IRQ = &irq
|
||||
// Set the IRQ routine
|
||||
lda #<irq
|
||||
|
|
@ -527,15 +532,15 @@ main: {
|
|||
sta HARDWARE_IRQ+1
|
||||
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
||||
// no kernal or BASIC rom visible
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
ldz #PROCPORT_DDR_MEMORY_MASK
|
||||
stz PROCPORT_DDR
|
||||
// *PROCPORT = PROCPORT_RAM_IO
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
ldz #PROCPORT_RAM_IO
|
||||
stz PROCPORT
|
||||
// VICIV->SIDBDRWD_LO = 1
|
||||
// open sideborder
|
||||
lda #1
|
||||
sta VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
ldz #1
|
||||
stz VICIV+OFFSET_STRUCT_MEGA65_VICIV_SIDBDRWD_LO
|
||||
// asm
|
||||
// Enable IRQ
|
||||
cli
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -49,8 +49,8 @@ __constant struct MOS6569_VICII * const VICII = (struct MOS6569_VICII *) 53248
|
|||
__constant struct MOS4569_VICIII * const VICIII = (struct MOS4569_VICIII *) 53248
|
||||
__constant struct MEGA65_VICIV * const VICIV = (struct MEGA65_VICIV *) 53248
|
||||
void __start()
|
||||
__loadstore volatile char greet_idx // zp[1]:7 0.6153846153846154
|
||||
__loadstore volatile char greet_zoomx // zp[1]:6 1.3939393939393938
|
||||
__loadstore volatile char greet_idx // zp[1]:8 0.6153846153846154
|
||||
__loadstore volatile char greet_zoomx // zp[1]:7 1.3939393939393938
|
||||
__interrupt(hardware_clobber) void irq()
|
||||
char irq::$10 // reg byte a 22.0
|
||||
char irq::$26 // reg byte a 22.0
|
||||
|
|
@ -58,14 +58,14 @@ char irq::$27 // reg byte a 22.0
|
|||
char irq::$29 // reg byte a 22.0
|
||||
char irq::$33 // reg byte a 4.0
|
||||
char irq::barcnt
|
||||
char irq::barcnt#1 // barcnt zp[1]:4 22.0
|
||||
char irq::barcnt#2 // barcnt zp[1]:4 2.588235294117647
|
||||
char irq::barcnt#1 // barcnt zp[1]:5 22.0
|
||||
char irq::barcnt#2 // barcnt zp[1]:5 2.588235294117647
|
||||
char irq::barcol
|
||||
char irq::barcol#0 // reg byte z 22.0
|
||||
char irq::barcol#1 // reg byte z 101.0
|
||||
char irq::barcol#2 // reg byte z 75.75
|
||||
char irq::barcol#3 // reg byte z 103.75
|
||||
char irq::barcol#4 // reg byte z 151.5
|
||||
char irq::barcol#0 // reg byte y 22.0
|
||||
char irq::barcol#1 // reg byte y 101.0
|
||||
char irq::barcol#2 // reg byte y 75.75
|
||||
char irq::barcol#3 // reg byte y 103.75
|
||||
char irq::barcol#4 // reg byte y 151.5
|
||||
char irq::col
|
||||
char irq::col#0 // reg byte a 16.5
|
||||
char irq::col1
|
||||
|
|
@ -79,11 +79,11 @@ char irq::i
|
|||
char irq::i#1 // reg byte x 22.0
|
||||
char irq::i#2 // reg byte x 9.307692307692307
|
||||
char irq::i1
|
||||
char irq::i1#1 // reg byte y 202.0
|
||||
char irq::i1#2 // reg byte y 60.599999999999994
|
||||
char irq::i1#1 // reg byte z 202.0
|
||||
char irq::i1#2 // reg byte z 60.599999999999994
|
||||
char irq::i2
|
||||
char irq::i2#1 // reg byte y 202.0
|
||||
char irq::i2#2 // reg byte y 60.599999999999994
|
||||
char irq::i2#1 // reg byte z 202.0
|
||||
char irq::i2#2 // reg byte z 60.599999999999994
|
||||
char irq::i3
|
||||
char irq::i3#1 // reg byte x 22.0
|
||||
char irq::i3#2 // reg byte x 11.0
|
||||
|
|
@ -103,8 +103,8 @@ char irq::l
|
|||
char irq::l#1 // reg byte x 22.0
|
||||
char irq::l#2 // reg byte x 14.666666666666666
|
||||
char irq::line
|
||||
char irq::line#1 // reg byte z 22.0
|
||||
char irq::line#10 // reg byte z 3.259259259259259
|
||||
char irq::line#1 // line zp[1]:4 22.0
|
||||
char irq::line#10 // line zp[1]:4 3.259259259259259
|
||||
char irq::nxt
|
||||
char irq::nxt#0 // reg byte a 2.0
|
||||
char irq::nxt#1 // reg byte a 4.0
|
||||
|
|
@ -112,9 +112,9 @@ char irq::nxt#2 // reg byte a 6.0
|
|||
char irq::raster
|
||||
char irq::raster#0 // reg byte a 56.0
|
||||
char irq::sin_bar
|
||||
char irq::sin_bar#0 // sin_bar zp[1]:5 4.0
|
||||
char irq::sin_bar#1 // sin_bar zp[1]:5 11.0
|
||||
char irq::sin_bar#2 // sin_bar zp[1]:5 2.1875
|
||||
char irq::sin_bar#0 // sin_bar zp[1]:6 4.0
|
||||
char irq::sin_bar#1 // sin_bar zp[1]:6 11.0
|
||||
char irq::sin_bar#2 // sin_bar zp[1]:6 2.1875
|
||||
char irq::sin_col
|
||||
char irq::sin_col#0 // reg byte y 4.0
|
||||
char irq::sin_col#1 // reg byte y 11.0
|
||||
|
|
@ -150,37 +150,37 @@ void *memset::return
|
|||
void *memset::str
|
||||
__constant void *memset::str#0 = (void *)DEFAULT_SCREEN // str
|
||||
__constant char rasters[RASTER_LINES] = { fill( RASTER_LINES, 0) }
|
||||
__loadstore char * volatile scroll_ptr // zp[2]:10 0.19672131147540986
|
||||
__loadstore volatile char scroll_soft // zp[1]:9 0.2441860465116279
|
||||
__loadstore volatile char sin_idx // zp[1]:8 0.49999999999999994
|
||||
__loadstore char * volatile scroll_ptr // zp[2]:11 0.19672131147540986
|
||||
__loadstore volatile char scroll_soft // zp[1]:10 0.2441860465116279
|
||||
__loadstore volatile char sin_idx // zp[1]:9 0.49999999999999994
|
||||
__constant void (*songInit)() = (void (*)())SONG
|
||||
__constant void (*songPlay)() = (void (*)())SONG+3
|
||||
|
||||
reg byte z [ irq::line#10 irq::line#1 ]
|
||||
zp[1]:4 [ irq::line#10 irq::line#1 ]
|
||||
reg byte x [ irq::wobble_idx#10 irq::wobble_idx#0 irq::wobble_idx#7 irq::wobble_idx#1 ]
|
||||
reg byte x [ irq::i#2 irq::i#1 ]
|
||||
reg byte y [ irq::sin_col#2 irq::sin_col#0 irq::sin_col#1 ]
|
||||
reg byte x [ irq::l#2 irq::l#1 ]
|
||||
zp[1]:4 [ irq::barcnt#2 irq::barcnt#1 ]
|
||||
zp[1]:5 [ irq::sin_bar#2 irq::sin_bar#0 irq::sin_bar#1 ]
|
||||
zp[1]:5 [ irq::barcnt#2 irq::barcnt#1 ]
|
||||
zp[1]:6 [ irq::sin_bar#2 irq::sin_bar#0 irq::sin_bar#1 ]
|
||||
reg byte x [ irq::i3#2 irq::i3#1 ]
|
||||
reg byte x [ irq::i4#2 irq::i4#1 ]
|
||||
reg byte y [ irq::greet_offset#2 irq::greet_offset#0 irq::greet_offset#1 ]
|
||||
reg byte x [ irq::i5#2 irq::i5#1 ]
|
||||
reg byte a [ irq::nxt#2 irq::nxt#0 irq::nxt#1 ]
|
||||
reg byte y [ irq::i1#2 irq::i1#1 ]
|
||||
reg byte y [ irq::i2#2 irq::i2#1 ]
|
||||
reg byte z [ irq::barcol#4 irq::barcol#3 irq::barcol#0 irq::barcol#1 irq::barcol#2 ]
|
||||
reg byte z [ irq::i1#2 irq::i1#1 ]
|
||||
reg byte z [ irq::i2#2 irq::i2#1 ]
|
||||
reg byte y [ irq::barcol#4 irq::barcol#3 irq::barcol#0 irq::barcol#1 irq::barcol#2 ]
|
||||
reg byte x [ irq::idx#4 irq::idx#3 irq::idx#0 irq::idx#1 irq::idx#2 ]
|
||||
reg byte x [ main::i1#2 main::i1#1 ]
|
||||
reg byte x [ main::i2#2 main::i2#1 ]
|
||||
reg byte x [ main::i#2 main::i#1 ]
|
||||
zp[2]:2 [ memset::dst#2 memset::dst#1 ]
|
||||
zp[1]:8 [ sin_idx ]
|
||||
zp[1]:9 [ scroll_soft ]
|
||||
zp[2]:10 [ scroll_ptr ]
|
||||
zp[1]:6 [ greet_zoomx ]
|
||||
zp[1]:7 [ greet_idx ]
|
||||
zp[1]:9 [ sin_idx ]
|
||||
zp[1]:10 [ scroll_soft ]
|
||||
zp[2]:11 [ scroll_ptr ]
|
||||
zp[1]:7 [ greet_zoomx ]
|
||||
zp[1]:8 [ greet_idx ]
|
||||
reg byte a [ irq::$33 ]
|
||||
reg byte a [ irq::$29 ]
|
||||
reg byte a [ irq::$26 ]
|
||||
|
|
|
|||
|
|
@ -44,11 +44,11 @@ main: {
|
|||
eom
|
||||
// *IO_KEY = 0x47
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// *IO_KEY = 0x53
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// *IO_BANK |= CRAM2K
|
||||
// Enable 2K Color RAM
|
||||
lda #CRAM2K
|
||||
|
|
|
|||
|
|
@ -195,8 +195,8 @@ Allocated zp[2]:2 [ main::sc#2 main::sc#1 ]
|
|||
Allocated zp[2]:4 [ main::col#2 main::col#1 ]
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement asm { sei lda#0 tax tay taz map eom } always clobbers reg byte a reg byte x reg byte y reg byte z
|
||||
Statement [1] *IO_KEY = $47 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [2] *IO_KEY = $53 [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [1] *IO_KEY = $47 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [2] *IO_KEY = $53 [ ] ( [ ] { } ) always clobbers reg byte z
|
||||
Statement [3] *IO_BANK = *IO_BANK | CRAM2K [ ] ( [ ] { } ) always clobbers reg byte a
|
||||
Statement [5] if(main::sc#2<SCREEN+$7d0) goto main::@2 [ main::sc#2 ] ( [ main::sc#2 ] { } ) always clobbers reg byte a
|
||||
Statement [7] if(main::col#2<COLORS+$7d0) goto main::@4 [ main::col#2 ] ( [ main::col#2 ] { } ) always clobbers reg byte a
|
||||
|
|
@ -280,11 +280,11 @@ main: {
|
|||
eom
|
||||
// [1] *IO_KEY = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// [2] *IO_KEY = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// [3] *IO_BANK = *IO_BANK | CRAM2K -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 2K Color RAM
|
||||
lda #CRAM2K
|
||||
|
|
@ -451,12 +451,12 @@ main: {
|
|||
// *IO_KEY = 0x47
|
||||
// [1] *IO_KEY = $47 -- _deref_pbuc1=vbuc2
|
||||
// Enable the VIC 4
|
||||
lda #$47
|
||||
sta IO_KEY
|
||||
ldz #$47
|
||||
stz IO_KEY
|
||||
// *IO_KEY = 0x53
|
||||
// [2] *IO_KEY = $53 -- _deref_pbuc1=vbuc2
|
||||
lda #$53
|
||||
sta IO_KEY
|
||||
ldz #$53
|
||||
stz IO_KEY
|
||||
// *IO_BANK |= CRAM2K
|
||||
// [3] *IO_BANK = *IO_BANK | CRAM2K -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
// Enable 2K Color RAM
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user