From 4993a2cb4b8bd00af4b88816589bf7e31b2fa630 Mon Sep 17 00:00:00 2001 From: jespergravgaard Date: Tue, 2 Feb 2021 01:37:05 +0100 Subject: [PATCH] Merged FlightControl/CX16_VERA Commander X16 veralib updates and space demo. --- src/main/kc/include/cx16.h | 24 +- src/main/kc/lib/cx16.c | 50 +- .../dk/camelot64/kickc/test/TestPrograms.java | 5 + src/test/kc/examples/cx16/cx16-bankload.c | 12 +- .../kc/examples/cx16/spacedemo/spacedemo.c | 17 +- src/test/ref/examples/cx16/cx16-bankload.asm | 100 +- src/test/ref/examples/cx16/cx16-bankload.cfg | 142 +- src/test/ref/examples/cx16/cx16-bankload.log | 2136 +++++++++-------- src/test/ref/examples/cx16/cx16-bankload.sym | 144 +- 9 files changed, 1325 insertions(+), 1305 deletions(-) diff --git a/src/main/kc/include/cx16.h b/src/main/kc/include/cx16.h index 7379ddf7a..ba9172380 100644 --- a/src/main/kc/include/cx16.h +++ b/src/main/kc/include/cx16.h @@ -43,13 +43,6 @@ char * const DEFAULT_SCREEN = 0x0000; // VRAM Bank (0/1) of the default screen char * const DEFAULT_SCREEN_VBANK = 0; - -// Load a file to memory -// Returns a status: -// - 0xff: Success -// - other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) -char LoadFileBanked( char device, char* filename, dword address); - // Put a single byte into VRAM. // Uses VERA DATA0 // - vbank: Which 64K VRAM bank to put data into (0/1) @@ -72,12 +65,13 @@ char vpeek(char vbank, char* vaddr); // - num: The number of bytes to copy void memcpy_to_vram(char vbank, void* vdest, void* src, unsigned int num ); -// Copy block of banked internal memory (256 banks at A000-BFFF) to VERA VRAM. +// Copy block of memory (from banked RAM to VRAM) // Copies the values of num bytes from the location pointed to by source directly to the memory block pointed to by destination in VRAM. -// - vdest: dword of the destination address in VRAM -// - src: dword of source banked address in RAM. This address is a linair project of the banked memory of 512K to 2048K. +// - vdest: absolute address in VRAM +// - src: absolute address in the banked RAM of the CX16. // - num: dword of the number of bytes to copy -void bnkcpy_vram_address(dword vdest, dword src, dword num ); +// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks. +void memcpy_bank_to_vram(unsigned long vdest, unsigned long src, unsigned long num ); // Copy block of memory (from VRAM to VRAM) // Copies the values from the location pointed by src to the location pointed by dest. @@ -106,3 +100,11 @@ void memset_vram(char vbank, void* vdest, char data, unsigned long num ); // - data: The value to set the vram with. // - num: The number of bytes to set void memset_vram_word(char vbank, void* vdest, unsigned int data, unsigned long num ); + +// Load a file into one of the 256 8KB RAM banks. +// - device: The device to load from +// - filename: The file name +// - address: The absolute address in banked memory to load the file too +// - returns: 0xff: Success, other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) +// Note: This function only works if the entire file fits within the selected bank. The function cannot load to multiple banks. +char load_to_bank( char device, char* filename, unsigned long address); \ No newline at end of file diff --git a/src/main/kc/lib/cx16.c b/src/main/kc/lib/cx16.c index 898851c70..29b633743 100644 --- a/src/main/kc/lib/cx16.c +++ b/src/main/kc/lib/cx16.c @@ -4,21 +4,6 @@ #include #include -#include - -// Load a file to memory -// Returns a status: -// - 0xff: Success -// - other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) -char LoadFileBanked( char device, char* filename, dword address) { - setnam(filename); - setlfs(device); - char bank = (byte)(((((word)<(>address)<<8)|>(>5)+((word)<(>address)<<3)); - char* addr = ((PORT_A = (char)bank; // select the bank - return load(addr, 0); -} // Put a single byte into VRAM. // Uses VERA DATA0 @@ -71,12 +56,13 @@ void memcpy_to_vram(char vbank, void* vdest, void* src, unsigned int num ) { *VERA_DATA0 = *s; } -// Copy block of banked internal memory (256 banks at A000-BFFF) to VERA VRAM. +// Copy block of memory (from banked RAM to VRAM) // Copies the values of num bytes from the location pointed to by source directly to the memory block pointed to by destination in VRAM. -// - vdest: dword of the destination address in VRAM -// - src: dword of source banked address in RAM. This address is a linair project of the banked memory of 512K to 2048K. +// - vdest: absolute address in VRAM +// - src: absolute address in the banked RAM of the CX16. // - num: dword of the number of bytes to copy -void bnkcpy_vram_address(dword vdest, dword src, dword num ) { +// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks. +void memcpy_bank_to_vram(unsigned long vdest, unsigned long src, unsigned long num ) { // Select DATA0 *VERA_CTRL &= ~VERA_ADDRSEL; // Set address @@ -85,18 +71,17 @@ void bnkcpy_vram_address(dword vdest, dword src, dword num ) { *VERA_ADDRX_H = <(>vdest); *VERA_ADDRX_H |= VERA_INC_1; - dword beg = src; - dword end = src+num; + unsigned long beg = src; + unsigned long end = src+num; char bank = (byte)(((((word)<(>beg)<<8)|>(>5)+((word)<(>beg)<<3)); - char* addr = ((PORT_A = (char)bank; // select the bank + for(unsigned long pos=beg; posPORT_A = (char)++bank; // select the bank addr = 0xA000; } *VERA_DATA0 = *addr; @@ -173,3 +158,18 @@ void memcpy_in_vram(char dest_bank, void *dest, char dest_increment, char src_ba } } +// Load a file into one of the 256 8KB RAM banks. +// - device: The device to load from +// - filename: The file name +// - address: The absolute address in banked memory to load the file too +// - returns: 0xff: Success, other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) +// Note: This function only works if the entire file fits within the selected bank. The function cannot load to multiple banks. +char load_to_bank( char device, char* filename, dword address) { + setnam(filename); + setlfs(device); + char bank = (byte)(((((word)<(>address)<<8)|>(>5)+((word)<(>address)<<3)); + char* addr = ((PORT_A = (char)bank; // select the bank + return load(addr, 0); +} diff --git a/src/test/java/dk/camelot64/kickc/test/TestPrograms.java b/src/test/java/dk/camelot64/kickc/test/TestPrograms.java index cf07627f7..536f7a2e7 100644 --- a/src/test/java/dk/camelot64/kickc/test/TestPrograms.java +++ b/src/test/java/dk/camelot64/kickc/test/TestPrograms.java @@ -482,6 +482,11 @@ public class TestPrograms { compileAndCompare("examples/cx16/cx16-bankaddressing.c"); } + //@Test + //public void testCx16SpaceDemo() throws IOException, URISyntaxException { + // compileAndCompare("examples/cx16/spacedemo/spacedemo.c"); + //} + @Test public void testCx16LoadFileInBank() throws IOException, URISyntaxException { compileAndCompare("examples/cx16/cx16-bankload.c"); diff --git a/src/test/kc/examples/cx16/cx16-bankload.c b/src/test/kc/examples/cx16/cx16-bankload.c index 425b01797..6df2a3879 100644 --- a/src/test/kc/examples/cx16/cx16-bankload.c +++ b/src/test/kc/examples/cx16/cx16-bankload.c @@ -79,15 +79,17 @@ void main() { clrscr(); printf("\n\nsprite banked file load and display demo.\n"); - const dword BANK_SPRITE = 0x12000; // Load in bank 9. - const dword VRAM_SPRITE = 0x10000; // Load in bank 9. + // RAM Bank where sprite is loaded + const dword BANK_SPRITE = 0x12000; + // VRAM address of sprite + const dword VRAM_SPRITE = 0x10000; // Sprite attributes: 8bpp, in front, 64x64, address SPRITE_PIXELS_VRAM struct VERA_SPRITE SPRITE_ATTR = { <(VRAM_SPRITE/32)|VERA_SPRITE_8BPP, 320-32, 240-32, 0x0c, 0xf1 }; - char status = LoadFileBanked(8, "SPRITE", BANK_SPRITE ); + char status = load_to_bank(8, "SPRITE", BANK_SPRITE ); - bnkcpy_vram_address(VERA_PALETTE+32, BANK_SPRITE-2, 32); - bnkcpy_vram_address(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32); + memcpy_bank_to_vram(VERA_PALETTE+32, BANK_SPRITE-2, 32); + memcpy_bank_to_vram(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32); SPRITE_ATTR.ADDR = <(VRAM_SPRITE/32)|VERA_SPRITE_4BPP; SPRITE_ATTR.X = 100; diff --git a/src/test/kc/examples/cx16/spacedemo/spacedemo.c b/src/test/kc/examples/cx16/spacedemo/spacedemo.c index 7a1fdb595..101616026 100644 --- a/src/test/kc/examples/cx16/spacedemo/spacedemo.c +++ b/src/test/kc/examples/cx16/spacedemo/spacedemo.c @@ -9,6 +9,7 @@ #include #include #include <6502.h> +#include #include #include #include @@ -251,20 +252,20 @@ void main() { clrscr(); // Loading the graphics in main banked memory. - char status = LoadFileBanked(8, "SPRITES", BANK_SPRITES); - status = LoadFileBanked(8, "TILES", BANK_TILES_SMALL); - status = LoadFileBanked(8, "TILEB", BANK_TILES_LARGE); + char status = load_to_bank(8, "SPRITES", BANK_SPRITES); + status = load_to_bank(8, "TILES", BANK_TILES_SMALL); + status = load_to_bank(8, "TILEB", BANK_TILES_LARGE); // Load the palette in main banked memory. - status = LoadFileBanked(8, "PALETTES", BANK_PALETTE); + status = load_to_bank(8, "PALETTES", BANK_PALETTE); // Copy graphics to the VERA VRAM. - bnkcpy_vram_address(VRAM_SPRITES, BANK_SPRITES-2, (dword)64*64*NUM_SPRITES/2); - bnkcpy_vram_address(VRAM_TILES_SMALL, BANK_TILES_SMALL-2, (dword)32*32*(NUM_TILES_SMALL)/2); - bnkcpy_vram_address(VRAM_TILES_LARGE, BANK_TILES_LARGE-2, (dword)64*64*(NUM_TILES_LARGE)/2); + memcpy_bank_to_vram(VRAM_SPRITES, BANK_SPRITES-2, (dword)64*64*NUM_SPRITES/2); + memcpy_bank_to_vram(VRAM_TILES_SMALL, BANK_TILES_SMALL-2, (dword)32*32*(NUM_TILES_SMALL)/2); + memcpy_bank_to_vram(VRAM_TILES_LARGE, BANK_TILES_LARGE-2, (dword)64*64*(NUM_TILES_LARGE)/2); // Load the palette in VERA palette registers, but keep the first 16 colors untouched. - bnkcpy_vram_address(VERA_PALETTE+32, BANK_PALETTE-2, (dword)32*3); + memcpy_bank_to_vram(VERA_PALETTE+32, BANK_PALETTE-2, (dword)32*3); // Now we activate the tile mode. vera_layer_mode_tile(0, (dword)0x10000, VRAM_TILES_SMALL, 128, 64, 16, 16, 4); diff --git a/src/test/ref/examples/cx16/cx16-bankload.asm b/src/test/ref/examples/cx16/cx16-bankload.asm index 0400ac17b..5a1316150 100644 --- a/src/test/ref/examples/cx16/cx16-bankload.asm +++ b/src/test/ref/examples/cx16/cx16-bankload.asm @@ -187,8 +187,9 @@ conio_x16_init: { rts } main: { + // RAM Bank where sprite is loaded .label BANK_SPRITE = $12000 - // Load in bank 9. + // VRAM address of sprite .label VRAM_SPRITE = $10000 .label SPRITE_ATTR = $43 // vera_layer_set_text_color_mode( 1, VERA_LAYER_CONFIG_16C ) @@ -207,58 +208,58 @@ main: { sta SPRITE_ATTR-1,y dey bne !- - // LoadFileBanked(8, "SPRITE", BANK_SPRITE ) - jsr LoadFileBanked - // bnkcpy_vram_address(VERA_PALETTE+32, BANK_SPRITE-2, 32) + // load_to_bank(8, "SPRITE", BANK_SPRITE ) + jsr load_to_bank + // memcpy_bank_to_vram(VERA_PALETTE+32, BANK_SPRITE-2, 32) lda #$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #0 - sta.z bnkcpy_vram_address.num+1 - sta.z bnkcpy_vram_address.num+2 - sta.z bnkcpy_vram_address.num+3 + sta.z memcpy_bank_to_vram.num+1 + sta.z memcpy_bank_to_vram.num+2 + sta.z memcpy_bank_to_vram.num+3 lda #BANK_SPRITE-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE-2>>$10 - sta.z bnkcpy_vram_address.beg+3 + sta.z memcpy_bank_to_vram.beg+3 lda #VERA_PALETTE+$20 - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VERA_PALETTE+$20>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address - // bnkcpy_vram_address(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32) + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram + // memcpy_bank_to_vram(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32) lda #<$40*$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #>$40*$20 - sta.z bnkcpy_vram_address.num+1 + sta.z memcpy_bank_to_vram.num+1 lda #<$40*$20>>$10 - sta.z bnkcpy_vram_address.num+2 + sta.z memcpy_bank_to_vram.num+2 lda #>$40*$20>>$10 - sta.z bnkcpy_vram_address.num+3 + sta.z memcpy_bank_to_vram.num+3 lda #BANK_SPRITE+$20-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE+$20-2>>$10 - sta.z bnkcpy_vram_address.beg+3 + sta.z memcpy_bank_to_vram.beg+3 lda #VRAM_SPRITE - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VRAM_SPRITE>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram // SPRITE_ATTR.ADDR = <(VRAM_SPRITE/32)|VERA_SPRITE_4BPP lda #((main.BANK_SPRITE&$ffff)))>>5)+(<((main.BANK_SPRITE>>$10)<<3)) // setnam(filename) @@ -739,13 +742,14 @@ LoadFileBanked: { // } rts } -// Copy block of banked internal memory (256 banks at A000-BFFF) to VERA VRAM. +// Copy block of memory (from banked RAM to VRAM) // Copies the values of num bytes from the location pointed to by source directly to the memory block pointed to by destination in VRAM. -// - vdest: dword of the destination address in VRAM -// - src: dword of source banked address in RAM. This address is a linair project of the banked memory of 512K to 2048K. +// - vdest: absolute address in VRAM +// - src: absolute address in the banked RAM of the CX16. // - num: dword of the number of bytes to copy -// bnkcpy_vram_address(dword zp(3) vdest, dword zp(7) num) -bnkcpy_vram_address: { +// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks. +// memcpy_bank_to_vram(dword zp(3) vdest, dword zp(7) num) +memcpy_bank_to_vram: { .label __0 = $2b .label __2 = $2d .label __4 = $35 @@ -903,11 +907,11 @@ bnkcpy_vram_address: { lda.z addr+1 adc #>$a000 sta.z addr+1 - // POKE - stx $9f61 + // VIA1->PORT_A = (char)bank + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A __b1: // select the bank - // for(dword pos=beg; posPORT_A = (char)++bank; inx - // POKE - stx $9f61 + // VIA1->PORT_A = (char)++bank + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A lda #<$a000 sta.z addr lda #>$a000 @@ -952,7 +956,7 @@ bnkcpy_vram_address: { bne !+ inc.z addr+1 !: - // for(dword pos=beg; pos bnkcpy_vram_address::$2 - [189] *VERA_ADDRX_M = bnkcpy_vram_address::$3 - [190] bnkcpy_vram_address::$4 = > bnkcpy_vram_address::vdest#2 - [191] bnkcpy_vram_address::$5 = < bnkcpy_vram_address::$4 - [192] *VERA_ADDRX_H = bnkcpy_vram_address::$5 + [184] memcpy_bank_to_vram::$0 = < memcpy_bank_to_vram::vdest#2 + [185] memcpy_bank_to_vram::$1 = < memcpy_bank_to_vram::$0 + [186] *VERA_ADDRX_L = memcpy_bank_to_vram::$1 + [187] memcpy_bank_to_vram::$2 = < memcpy_bank_to_vram::vdest#2 + [188] memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2 + [189] *VERA_ADDRX_M = memcpy_bank_to_vram::$3 + [190] memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2 + [191] memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4 + [192] *VERA_ADDRX_H = memcpy_bank_to_vram::$5 [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 - [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 - [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 - [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 - [197] bnkcpy_vram_address::$9 = < bnkcpy_vram_address::$8 - [198] bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 - [199] bnkcpy_vram_address::$11 = > bnkcpy_vram_address::$10 - [200] bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 - [201] bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 - [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 - [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 - [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 - [205] bnkcpy_vram_address::$16 = < bnkcpy_vram_address::$15 - [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 - [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 - [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 - [209] bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 - [210] bnkcpy_vram_address::addr#0 = bnkcpy_vram_address::$18 & $1fff - [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 - [212] *((byte*) 40801) = bnkcpy_vram_address::bank#0 - to:bnkcpy_vram_address::@1 -bnkcpy_vram_address::@1: scope:[bnkcpy_vram_address] from bnkcpy_vram_address bnkcpy_vram_address::@3 - [213] bnkcpy_vram_address::bank#2 = phi( bnkcpy_vram_address/bnkcpy_vram_address::bank#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::bank#5 ) - [213] bnkcpy_vram_address::addr#4 = phi( bnkcpy_vram_address/bnkcpy_vram_address::addr#1, bnkcpy_vram_address::@3/bnkcpy_vram_address::addr#2 ) - [213] bnkcpy_vram_address::pos#2 = phi( bnkcpy_vram_address/bnkcpy_vram_address::beg#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::pos#1 ) - [214] if(bnkcpy_vram_address::pos#2 memcpy_bank_to_vram::beg#0 + [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 + [197] memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8 + [198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 + [199] memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10 + [200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 + [201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 + [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 + [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 + [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 + [205] memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15 + [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 + [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 + [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 + [209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 + [210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff + [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 + [212] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0 + to:memcpy_bank_to_vram::@1 +memcpy_bank_to_vram::@1: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram memcpy_bank_to_vram::@3 + [213] memcpy_bank_to_vram::bank#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::bank#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::bank#5 ) + [213] memcpy_bank_to_vram::addr#4 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::addr#1, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::addr#2 ) + [213] memcpy_bank_to_vram::pos#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::beg#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::pos#1 ) + [214] if(memcpy_bank_to_vram::pos#2 LoadFileBanked::address#1 - LoadFileBanked::$3 = LoadFileBanked::$2 << 8 - LoadFileBanked::$4 = < LoadFileBanked::$3 - LoadFileBanked::$5 = < LoadFileBanked::address#1 - LoadFileBanked::$6 = > LoadFileBanked::$5 - LoadFileBanked::$16 = (word)LoadFileBanked::$4 - LoadFileBanked::$7 = LoadFileBanked::$16 | LoadFileBanked::$6 - LoadFileBanked::$8 = LoadFileBanked::$7 >> 5 - LoadFileBanked::$9 = > LoadFileBanked::address#1 - LoadFileBanked::$10 = LoadFileBanked::$9 << 3 - LoadFileBanked::$11 = < LoadFileBanked::$10 - LoadFileBanked::$17 = (word)LoadFileBanked::$11 - LoadFileBanked::$12 = LoadFileBanked::$8 + LoadFileBanked::$17 - LoadFileBanked::bank#0 = (byte)LoadFileBanked::$12 - LoadFileBanked::$13 = < LoadFileBanked::address#1 - LoadFileBanked::$14 = LoadFileBanked::$13 & $1fff - LoadFileBanked::addr#0 = ((byte*)) LoadFileBanked::$14 - LoadFileBanked::addr#1 = LoadFileBanked::addr#0 + $a000 - *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = (byte)LoadFileBanked::bank#0 - load::address = LoadFileBanked::addr#1 - load::verify = 0 - call load - load::return#2 = load::return#1 - to:LoadFileBanked::@3 -LoadFileBanked::@3: scope:[LoadFileBanked] from LoadFileBanked::@2 - load::return#4 = phi( LoadFileBanked::@2/load::return#2 ) - LoadFileBanked::$15 = load::return#4 - LoadFileBanked::return#0 = LoadFileBanked::$15 - to:LoadFileBanked::@return -LoadFileBanked::@return: scope:[LoadFileBanked] from LoadFileBanked::@3 - LoadFileBanked::return#3 = phi( LoadFileBanked::@3/LoadFileBanked::return#0 ) - LoadFileBanked::return#1 = LoadFileBanked::return#3 - return - to:@return - void memcpy_to_vram(byte memcpy_to_vram::vbank , void* memcpy_to_vram::vdest , void* memcpy_to_vram::src , word memcpy_to_vram::num) memcpy_to_vram: scope:[memcpy_to_vram] from main::@7 memcpy_to_vram::num#1 = phi( main::@7/memcpy_to_vram::num#0 ) @@ -174,81 +123,81 @@ memcpy_to_vram::@return: scope:[memcpy_to_vram] from memcpy_to_vram::@1 return to:@return -void bnkcpy_vram_address(dword bnkcpy_vram_address::vdest , dword bnkcpy_vram_address::src , dword bnkcpy_vram_address::num) -bnkcpy_vram_address: scope:[bnkcpy_vram_address] from main::@5 main::@6 - bnkcpy_vram_address::num#2 = phi( main::@5/bnkcpy_vram_address::num#0, main::@6/bnkcpy_vram_address::num#1 ) - bnkcpy_vram_address::src#2 = phi( main::@5/bnkcpy_vram_address::src#0, main::@6/bnkcpy_vram_address::src#1 ) - bnkcpy_vram_address::vdest#2 = phi( main::@5/bnkcpy_vram_address::vdest#0, main::@6/bnkcpy_vram_address::vdest#1 ) +void memcpy_bank_to_vram(dword memcpy_bank_to_vram::vdest , dword memcpy_bank_to_vram::src , dword memcpy_bank_to_vram::num) +memcpy_bank_to_vram: scope:[memcpy_bank_to_vram] from main::@5 main::@6 + memcpy_bank_to_vram::num#2 = phi( main::@5/memcpy_bank_to_vram::num#0, main::@6/memcpy_bank_to_vram::num#1 ) + memcpy_bank_to_vram::src#2 = phi( main::@5/memcpy_bank_to_vram::src#0, main::@6/memcpy_bank_to_vram::src#1 ) + memcpy_bank_to_vram::vdest#2 = phi( main::@5/memcpy_bank_to_vram::vdest#0, main::@6/memcpy_bank_to_vram::vdest#1 ) *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL - bnkcpy_vram_address::$0 = < bnkcpy_vram_address::vdest#2 - bnkcpy_vram_address::$1 = < bnkcpy_vram_address::$0 - *VERA_ADDRX_L = bnkcpy_vram_address::$1 - bnkcpy_vram_address::$2 = < bnkcpy_vram_address::vdest#2 - bnkcpy_vram_address::$3 = > bnkcpy_vram_address::$2 - *VERA_ADDRX_M = bnkcpy_vram_address::$3 - bnkcpy_vram_address::$4 = > bnkcpy_vram_address::vdest#2 - bnkcpy_vram_address::$5 = < bnkcpy_vram_address::$4 - *VERA_ADDRX_H = bnkcpy_vram_address::$5 + memcpy_bank_to_vram::$0 = < memcpy_bank_to_vram::vdest#2 + memcpy_bank_to_vram::$1 = < memcpy_bank_to_vram::$0 + *VERA_ADDRX_L = memcpy_bank_to_vram::$1 + memcpy_bank_to_vram::$2 = < memcpy_bank_to_vram::vdest#2 + memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2 + *VERA_ADDRX_M = memcpy_bank_to_vram::$3 + memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2 + memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4 + *VERA_ADDRX_H = memcpy_bank_to_vram::$5 *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 - bnkcpy_vram_address::beg#0 = bnkcpy_vram_address::src#2 - bnkcpy_vram_address::$6 = bnkcpy_vram_address::src#2 + bnkcpy_vram_address::num#2 - bnkcpy_vram_address::end#0 = bnkcpy_vram_address::$6 - bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 - bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 - bnkcpy_vram_address::$9 = < bnkcpy_vram_address::$8 - bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 - bnkcpy_vram_address::$11 = > bnkcpy_vram_address::$10 - bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 - bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 - bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 - bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 - bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 - bnkcpy_vram_address::$16 = < bnkcpy_vram_address::$15 - bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 - bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 - bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 - bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 - bnkcpy_vram_address::$19 = bnkcpy_vram_address::$18 & $1fff - bnkcpy_vram_address::addr#0 = ((byte*)) bnkcpy_vram_address::$19 - bnkcpy_vram_address::addr#1 = bnkcpy_vram_address::addr#0 + $a000 - *((byte*)$9f61) = (byte)bnkcpy_vram_address::bank#0 - bnkcpy_vram_address::pos#0 = bnkcpy_vram_address::beg#0 - to:bnkcpy_vram_address::@1 -bnkcpy_vram_address::@1: scope:[bnkcpy_vram_address] from bnkcpy_vram_address bnkcpy_vram_address::@3 - bnkcpy_vram_address::bank#4 = phi( bnkcpy_vram_address/bnkcpy_vram_address::bank#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::bank#5 ) - bnkcpy_vram_address::addr#6 = phi( bnkcpy_vram_address/bnkcpy_vram_address::addr#1, bnkcpy_vram_address::@3/bnkcpy_vram_address::addr#2 ) - bnkcpy_vram_address::end#1 = phi( bnkcpy_vram_address/bnkcpy_vram_address::end#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::end#2 ) - bnkcpy_vram_address::pos#2 = phi( bnkcpy_vram_address/bnkcpy_vram_address::pos#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::pos#1 ) - bnkcpy_vram_address::$20 = bnkcpy_vram_address::pos#2 < bnkcpy_vram_address::end#1 - if(bnkcpy_vram_address::$20) goto bnkcpy_vram_address::@2 - to:bnkcpy_vram_address::@return -bnkcpy_vram_address::@2: scope:[bnkcpy_vram_address] from bnkcpy_vram_address::@1 - bnkcpy_vram_address::end#3 = phi( bnkcpy_vram_address::@1/bnkcpy_vram_address::end#1 ) - bnkcpy_vram_address::bank#3 = phi( bnkcpy_vram_address::@1/bnkcpy_vram_address::bank#4 ) - bnkcpy_vram_address::pos#4 = phi( bnkcpy_vram_address::@1/bnkcpy_vram_address::pos#2 ) - bnkcpy_vram_address::addr#4 = phi( bnkcpy_vram_address::@1/bnkcpy_vram_address::addr#6 ) - bnkcpy_vram_address::$21 = bnkcpy_vram_address::addr#4 == $c000 - bnkcpy_vram_address::$22 = ! bnkcpy_vram_address::$21 - if(bnkcpy_vram_address::$22) goto bnkcpy_vram_address::@3 - to:bnkcpy_vram_address::@4 -bnkcpy_vram_address::@3: scope:[bnkcpy_vram_address] from bnkcpy_vram_address::@2 bnkcpy_vram_address::@4 - bnkcpy_vram_address::bank#5 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::bank#3, bnkcpy_vram_address::@4/bnkcpy_vram_address::bank#1 ) - bnkcpy_vram_address::end#2 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::end#3, bnkcpy_vram_address::@4/bnkcpy_vram_address::end#4 ) - bnkcpy_vram_address::pos#3 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::pos#4, bnkcpy_vram_address::@4/bnkcpy_vram_address::pos#5 ) - bnkcpy_vram_address::addr#5 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::addr#4, bnkcpy_vram_address::@4/bnkcpy_vram_address::addr#3 ) - *VERA_DATA0 = *bnkcpy_vram_address::addr#5 - bnkcpy_vram_address::addr#2 = ++ bnkcpy_vram_address::addr#5 - bnkcpy_vram_address::pos#1 = ++ bnkcpy_vram_address::pos#3 - to:bnkcpy_vram_address::@1 -bnkcpy_vram_address::@4: scope:[bnkcpy_vram_address] from bnkcpy_vram_address::@2 - bnkcpy_vram_address::end#4 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::end#3 ) - bnkcpy_vram_address::pos#5 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::pos#4 ) - bnkcpy_vram_address::bank#2 = phi( bnkcpy_vram_address::@2/bnkcpy_vram_address::bank#3 ) - bnkcpy_vram_address::bank#1 = ++ bnkcpy_vram_address::bank#2 - *((byte*)$9f61) = (byte)bnkcpy_vram_address::bank#1 - bnkcpy_vram_address::addr#3 = ((byte*)) $a000 - to:bnkcpy_vram_address::@3 -bnkcpy_vram_address::@return: scope:[bnkcpy_vram_address] from bnkcpy_vram_address::@1 + memcpy_bank_to_vram::beg#0 = memcpy_bank_to_vram::src#2 + memcpy_bank_to_vram::$6 = memcpy_bank_to_vram::src#2 + memcpy_bank_to_vram::num#2 + memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::$6 + memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 + memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8 + memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10 + memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 + memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 + memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 + memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 + memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15 + memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 + memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 + memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 + memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::$19 = memcpy_bank_to_vram::$18 & $1fff + memcpy_bank_to_vram::addr#0 = ((byte*)) memcpy_bank_to_vram::$19 + memcpy_bank_to_vram::addr#1 = memcpy_bank_to_vram::addr#0 + $a000 + *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = (byte)memcpy_bank_to_vram::bank#0 + memcpy_bank_to_vram::pos#0 = memcpy_bank_to_vram::beg#0 + to:memcpy_bank_to_vram::@1 +memcpy_bank_to_vram::@1: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram memcpy_bank_to_vram::@3 + memcpy_bank_to_vram::bank#4 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::bank#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::bank#5 ) + memcpy_bank_to_vram::addr#6 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::addr#1, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::addr#2 ) + memcpy_bank_to_vram::end#1 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::end#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::end#2 ) + memcpy_bank_to_vram::pos#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::pos#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::pos#1 ) + memcpy_bank_to_vram::$20 = memcpy_bank_to_vram::pos#2 < memcpy_bank_to_vram::end#1 + if(memcpy_bank_to_vram::$20) goto memcpy_bank_to_vram::@2 + to:memcpy_bank_to_vram::@return +memcpy_bank_to_vram::@2: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@1 + memcpy_bank_to_vram::end#3 = phi( memcpy_bank_to_vram::@1/memcpy_bank_to_vram::end#1 ) + memcpy_bank_to_vram::bank#3 = phi( memcpy_bank_to_vram::@1/memcpy_bank_to_vram::bank#4 ) + memcpy_bank_to_vram::pos#4 = phi( memcpy_bank_to_vram::@1/memcpy_bank_to_vram::pos#2 ) + memcpy_bank_to_vram::addr#4 = phi( memcpy_bank_to_vram::@1/memcpy_bank_to_vram::addr#6 ) + memcpy_bank_to_vram::$21 = memcpy_bank_to_vram::addr#4 == $c000 + memcpy_bank_to_vram::$22 = ! memcpy_bank_to_vram::$21 + if(memcpy_bank_to_vram::$22) goto memcpy_bank_to_vram::@3 + to:memcpy_bank_to_vram::@4 +memcpy_bank_to_vram::@3: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@2 memcpy_bank_to_vram::@4 + memcpy_bank_to_vram::bank#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::bank#3, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::bank#1 ) + memcpy_bank_to_vram::end#2 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::end#3, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::end#4 ) + memcpy_bank_to_vram::pos#3 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::pos#4, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::pos#5 ) + memcpy_bank_to_vram::addr#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::addr#4, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::addr#3 ) + *VERA_DATA0 = *memcpy_bank_to_vram::addr#5 + memcpy_bank_to_vram::addr#2 = ++ memcpy_bank_to_vram::addr#5 + memcpy_bank_to_vram::pos#1 = ++ memcpy_bank_to_vram::pos#3 + to:memcpy_bank_to_vram::@1 +memcpy_bank_to_vram::@4: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@2 + memcpy_bank_to_vram::end#4 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::end#3 ) + memcpy_bank_to_vram::pos#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::pos#4 ) + memcpy_bank_to_vram::bank#2 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::bank#3 ) + memcpy_bank_to_vram::bank#1 = ++ memcpy_bank_to_vram::bank#2 + *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = (byte)memcpy_bank_to_vram::bank#1 + memcpy_bank_to_vram::addr#3 = ((byte*)) $a000 + to:memcpy_bank_to_vram::@3 +memcpy_bank_to_vram::@return: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@1 return to:@return @@ -293,6 +242,57 @@ memcpy_in_vram::@return: scope:[memcpy_in_vram] from memcpy_in_vram::@1 return to:@return +byte load_to_bank(byte load_to_bank::device , byte* load_to_bank::filename , dword load_to_bank::address) +load_to_bank: scope:[load_to_bank] from main::@4 + load_to_bank::address#3 = phi( main::@4/load_to_bank::address#0 ) + load_to_bank::device#2 = phi( main::@4/load_to_bank::device#0 ) + load_to_bank::filename#1 = phi( main::@4/load_to_bank::filename#0 ) + setnam::filename = load_to_bank::filename#1 + call setnam + to:load_to_bank::@1 +load_to_bank::@1: scope:[load_to_bank] from load_to_bank + load_to_bank::address#2 = phi( load_to_bank/load_to_bank::address#3 ) + load_to_bank::device#1 = phi( load_to_bank/load_to_bank::device#2 ) + setlfs::device = load_to_bank::device#1 + call setlfs + to:load_to_bank::@2 +load_to_bank::@2: scope:[load_to_bank] from load_to_bank::@1 + load_to_bank::address#1 = phi( load_to_bank::@1/load_to_bank::address#2 ) + load_to_bank::$2 = > load_to_bank::address#1 + load_to_bank::$3 = load_to_bank::$2 << 8 + load_to_bank::$4 = < load_to_bank::$3 + load_to_bank::$5 = < load_to_bank::address#1 + load_to_bank::$6 = > load_to_bank::$5 + load_to_bank::$16 = (word)load_to_bank::$4 + load_to_bank::$7 = load_to_bank::$16 | load_to_bank::$6 + load_to_bank::$8 = load_to_bank::$7 >> 5 + load_to_bank::$9 = > load_to_bank::address#1 + load_to_bank::$10 = load_to_bank::$9 << 3 + load_to_bank::$11 = < load_to_bank::$10 + load_to_bank::$17 = (word)load_to_bank::$11 + load_to_bank::$12 = load_to_bank::$8 + load_to_bank::$17 + load_to_bank::bank#0 = (byte)load_to_bank::$12 + load_to_bank::$13 = < load_to_bank::address#1 + load_to_bank::$14 = load_to_bank::$13 & $1fff + load_to_bank::addr#0 = ((byte*)) load_to_bank::$14 + load_to_bank::addr#1 = load_to_bank::addr#0 + $a000 + *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = (byte)load_to_bank::bank#0 + load::address = load_to_bank::addr#1 + load::verify = 0 + call load + load::return#2 = load::return#1 + to:load_to_bank::@3 +load_to_bank::@3: scope:[load_to_bank] from load_to_bank::@2 + load::return#4 = phi( load_to_bank::@2/load::return#2 ) + load_to_bank::$15 = load::return#4 + load_to_bank::return#0 = load_to_bank::$15 + to:load_to_bank::@return +load_to_bank::@return: scope:[load_to_bank] from load_to_bank::@3 + load_to_bank::return#3 = phi( load_to_bank::@3/load_to_bank::return#0 ) + load_to_bank::return#1 = load_to_bank::return#3 + return + to:@return + void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config) vera_layer_set_config: scope:[vera_layer_set_config] from vera_layer_mode_tile::@24 vera_layer_set_config::config#1 = phi( vera_layer_mode_tile::@24/vera_layer_set_config::config#0 ) @@ -1522,27 +1522,27 @@ main::@4: scope:[main] from main::@3 CONIO_SCREEN_BANK#54 = phi( main::@3/CONIO_SCREEN_BANK#56 ) *(&main::SPRITE_ATTR) = memcpy(*(&$0), struct VERA_SPRITE, SIZEOF_STRUCT_VERA_SPRITE) main::SPRITE_ATTR = struct-unwound {*(&main::SPRITE_ATTR)} - LoadFileBanked::device#0 = 8 - LoadFileBanked::filename#0 = main::filename - LoadFileBanked::address#0 = main::BANK_SPRITE - call LoadFileBanked - LoadFileBanked::return#2 = LoadFileBanked::return#1 + load_to_bank::device#0 = 8 + load_to_bank::filename#0 = main::filename + load_to_bank::address#0 = main::BANK_SPRITE + call load_to_bank + load_to_bank::return#2 = load_to_bank::return#1 to:main::@5 main::@5: scope:[main] from main::@4 CONIO_SCREEN_TEXT#51 = phi( main::@4/CONIO_SCREEN_TEXT#56 ) CONIO_SCREEN_BANK#49 = phi( main::@4/CONIO_SCREEN_BANK#54 ) - bnkcpy_vram_address::vdest#0 = VERA_PALETTE+$20 - bnkcpy_vram_address::src#0 = main::BANK_SPRITE-2 - bnkcpy_vram_address::num#0 = $20 - call bnkcpy_vram_address + memcpy_bank_to_vram::vdest#0 = VERA_PALETTE+$20 + memcpy_bank_to_vram::src#0 = main::BANK_SPRITE-2 + memcpy_bank_to_vram::num#0 = $20 + call memcpy_bank_to_vram to:main::@6 main::@6: scope:[main] from main::@5 CONIO_SCREEN_TEXT#45 = phi( main::@5/CONIO_SCREEN_TEXT#51 ) CONIO_SCREEN_BANK#43 = phi( main::@5/CONIO_SCREEN_BANK#49 ) - bnkcpy_vram_address::vdest#1 = main::VRAM_SPRITE - bnkcpy_vram_address::src#1 = main::BANK_SPRITE+$20-2 - bnkcpy_vram_address::num#1 = $40*$20 - call bnkcpy_vram_address + memcpy_bank_to_vram::vdest#1 = main::VRAM_SPRITE + memcpy_bank_to_vram::src#1 = main::BANK_SPRITE+$20-2 + memcpy_bank_to_vram::num#1 = $40*$20 + call memcpy_bank_to_vram to:main::@7 main::@7: scope:[main] from main::@6 CONIO_SCREEN_TEXT#38 = phi( main::@6/CONIO_SCREEN_TEXT#45 ) @@ -1746,45 +1746,6 @@ byte* CONIO_SCREEN_TEXT#7 byte* CONIO_SCREEN_TEXT#8 byte* CONIO_SCREEN_TEXT#9 const nomodify byte* DEFAULT_SCREEN = (byte*)0 -byte LoadFileBanked(byte LoadFileBanked::device , byte* LoadFileBanked::filename , dword LoadFileBanked::address) -word~ LoadFileBanked::$10 -byte~ LoadFileBanked::$11 -word~ LoadFileBanked::$12 -word~ LoadFileBanked::$13 -number~ LoadFileBanked::$14 -byte~ LoadFileBanked::$15 -word~ LoadFileBanked::$16 -word~ LoadFileBanked::$17 -word~ LoadFileBanked::$2 -word~ LoadFileBanked::$3 -byte~ LoadFileBanked::$4 -word~ LoadFileBanked::$5 -byte~ LoadFileBanked::$6 -word~ LoadFileBanked::$7 -word~ LoadFileBanked::$8 -word~ LoadFileBanked::$9 -byte* LoadFileBanked::addr -byte* LoadFileBanked::addr#0 -byte* LoadFileBanked::addr#1 -dword LoadFileBanked::address -dword LoadFileBanked::address#0 -dword LoadFileBanked::address#1 -dword LoadFileBanked::address#2 -dword LoadFileBanked::address#3 -byte LoadFileBanked::bank -byte LoadFileBanked::bank#0 -byte LoadFileBanked::device -byte LoadFileBanked::device#0 -byte LoadFileBanked::device#1 -byte LoadFileBanked::device#2 -byte* LoadFileBanked::filename -byte* LoadFileBanked::filename#0 -byte* LoadFileBanked::filename#1 -byte LoadFileBanked::return -byte LoadFileBanked::return#0 -byte LoadFileBanked::return#1 -byte LoadFileBanked::return#2 -byte LoadFileBanked::return#3 const byte OFFSET_STRUCT_MOS6522_VIA_PORT_A = 1 const byte OFFSET_STRUCT_VERA_SPRITE_ADDR = 0 const byte OFFSET_STRUCT_VERA_SPRITE_X = 2 @@ -1897,74 +1858,6 @@ const nomodify byte VERA_TILEBASE_WIDTH_8 = 0 const nomodify struct MOS6522_VIA* VIA1 = (struct MOS6522_VIA*)$9f60 const nomodify byte WHITE = 1 void __start() -void bnkcpy_vram_address(dword bnkcpy_vram_address::vdest , dword bnkcpy_vram_address::src , dword bnkcpy_vram_address::num) -word~ bnkcpy_vram_address::$0 -byte~ bnkcpy_vram_address::$1 -word~ bnkcpy_vram_address::$10 -byte~ bnkcpy_vram_address::$11 -word~ bnkcpy_vram_address::$12 -word~ bnkcpy_vram_address::$13 -word~ bnkcpy_vram_address::$14 -word~ bnkcpy_vram_address::$15 -byte~ bnkcpy_vram_address::$16 -word~ bnkcpy_vram_address::$17 -word~ bnkcpy_vram_address::$18 -number~ bnkcpy_vram_address::$19 -word~ bnkcpy_vram_address::$2 -bool~ bnkcpy_vram_address::$20 -bool~ bnkcpy_vram_address::$21 -bool~ bnkcpy_vram_address::$22 -word~ bnkcpy_vram_address::$23 -word~ bnkcpy_vram_address::$24 -byte~ bnkcpy_vram_address::$3 -word~ bnkcpy_vram_address::$4 -byte~ bnkcpy_vram_address::$5 -dword~ bnkcpy_vram_address::$6 -word~ bnkcpy_vram_address::$7 -word~ bnkcpy_vram_address::$8 -byte~ bnkcpy_vram_address::$9 -byte* bnkcpy_vram_address::addr -byte* bnkcpy_vram_address::addr#0 -byte* bnkcpy_vram_address::addr#1 -byte* bnkcpy_vram_address::addr#2 -byte* bnkcpy_vram_address::addr#3 -byte* bnkcpy_vram_address::addr#4 -byte* bnkcpy_vram_address::addr#5 -byte* bnkcpy_vram_address::addr#6 -byte bnkcpy_vram_address::bank -byte bnkcpy_vram_address::bank#0 -byte bnkcpy_vram_address::bank#1 -byte bnkcpy_vram_address::bank#2 -byte bnkcpy_vram_address::bank#3 -byte bnkcpy_vram_address::bank#4 -byte bnkcpy_vram_address::bank#5 -dword bnkcpy_vram_address::beg -dword bnkcpy_vram_address::beg#0 -dword bnkcpy_vram_address::end -dword bnkcpy_vram_address::end#0 -dword bnkcpy_vram_address::end#1 -dword bnkcpy_vram_address::end#2 -dword bnkcpy_vram_address::end#3 -dword bnkcpy_vram_address::end#4 -dword bnkcpy_vram_address::num -dword bnkcpy_vram_address::num#0 -dword bnkcpy_vram_address::num#1 -dword bnkcpy_vram_address::num#2 -dword bnkcpy_vram_address::pos -dword bnkcpy_vram_address::pos#0 -dword bnkcpy_vram_address::pos#1 -dword bnkcpy_vram_address::pos#2 -dword bnkcpy_vram_address::pos#3 -dword bnkcpy_vram_address::pos#4 -dword bnkcpy_vram_address::pos#5 -dword bnkcpy_vram_address::src -dword bnkcpy_vram_address::src#0 -dword bnkcpy_vram_address::src#1 -dword bnkcpy_vram_address::src#2 -dword bnkcpy_vram_address::vdest -dword bnkcpy_vram_address::vdest#0 -dword bnkcpy_vram_address::vdest#1 -dword bnkcpy_vram_address::vdest#2 void clearline() byte*~ clearline::$0 byte~ clearline::$1 @@ -2172,6 +2065,45 @@ byte load::return#3 byte load::return#4 volatile byte load::status loadstore volatile byte load::verify loadstore +byte load_to_bank(byte load_to_bank::device , byte* load_to_bank::filename , dword load_to_bank::address) +word~ load_to_bank::$10 +byte~ load_to_bank::$11 +word~ load_to_bank::$12 +word~ load_to_bank::$13 +number~ load_to_bank::$14 +byte~ load_to_bank::$15 +word~ load_to_bank::$16 +word~ load_to_bank::$17 +word~ load_to_bank::$2 +word~ load_to_bank::$3 +byte~ load_to_bank::$4 +word~ load_to_bank::$5 +byte~ load_to_bank::$6 +word~ load_to_bank::$7 +word~ load_to_bank::$8 +word~ load_to_bank::$9 +byte* load_to_bank::addr +byte* load_to_bank::addr#0 +byte* load_to_bank::addr#1 +dword load_to_bank::address +dword load_to_bank::address#0 +dword load_to_bank::address#1 +dword load_to_bank::address#2 +dword load_to_bank::address#3 +byte load_to_bank::bank +byte load_to_bank::bank#0 +byte load_to_bank::device +byte load_to_bank::device#0 +byte load_to_bank::device#1 +byte load_to_bank::device#2 +byte* load_to_bank::filename +byte* load_to_bank::filename#0 +byte* load_to_bank::filename#1 +byte load_to_bank::return +byte load_to_bank::return#0 +byte load_to_bank::return#1 +byte load_to_bank::return#2 +byte load_to_bank::return#3 void main() byte~ main::$7 const nomodify dword main::BANK_SPRITE = $12000 @@ -2182,6 +2114,74 @@ const byte* main::s[$2d] = " sprite banked file load and display demo. " +void memcpy_bank_to_vram(dword memcpy_bank_to_vram::vdest , dword memcpy_bank_to_vram::src , dword memcpy_bank_to_vram::num) +word~ memcpy_bank_to_vram::$0 +byte~ memcpy_bank_to_vram::$1 +word~ memcpy_bank_to_vram::$10 +byte~ memcpy_bank_to_vram::$11 +word~ memcpy_bank_to_vram::$12 +word~ memcpy_bank_to_vram::$13 +word~ memcpy_bank_to_vram::$14 +word~ memcpy_bank_to_vram::$15 +byte~ memcpy_bank_to_vram::$16 +word~ memcpy_bank_to_vram::$17 +word~ memcpy_bank_to_vram::$18 +number~ memcpy_bank_to_vram::$19 +word~ memcpy_bank_to_vram::$2 +bool~ memcpy_bank_to_vram::$20 +bool~ memcpy_bank_to_vram::$21 +bool~ memcpy_bank_to_vram::$22 +word~ memcpy_bank_to_vram::$23 +word~ memcpy_bank_to_vram::$24 +byte~ memcpy_bank_to_vram::$3 +word~ memcpy_bank_to_vram::$4 +byte~ memcpy_bank_to_vram::$5 +dword~ memcpy_bank_to_vram::$6 +word~ memcpy_bank_to_vram::$7 +word~ memcpy_bank_to_vram::$8 +byte~ memcpy_bank_to_vram::$9 +byte* memcpy_bank_to_vram::addr +byte* memcpy_bank_to_vram::addr#0 +byte* memcpy_bank_to_vram::addr#1 +byte* memcpy_bank_to_vram::addr#2 +byte* memcpy_bank_to_vram::addr#3 +byte* memcpy_bank_to_vram::addr#4 +byte* memcpy_bank_to_vram::addr#5 +byte* memcpy_bank_to_vram::addr#6 +byte memcpy_bank_to_vram::bank +byte memcpy_bank_to_vram::bank#0 +byte memcpy_bank_to_vram::bank#1 +byte memcpy_bank_to_vram::bank#2 +byte memcpy_bank_to_vram::bank#3 +byte memcpy_bank_to_vram::bank#4 +byte memcpy_bank_to_vram::bank#5 +dword memcpy_bank_to_vram::beg +dword memcpy_bank_to_vram::beg#0 +dword memcpy_bank_to_vram::end +dword memcpy_bank_to_vram::end#0 +dword memcpy_bank_to_vram::end#1 +dword memcpy_bank_to_vram::end#2 +dword memcpy_bank_to_vram::end#3 +dword memcpy_bank_to_vram::end#4 +dword memcpy_bank_to_vram::num +dword memcpy_bank_to_vram::num#0 +dword memcpy_bank_to_vram::num#1 +dword memcpy_bank_to_vram::num#2 +dword memcpy_bank_to_vram::pos +dword memcpy_bank_to_vram::pos#0 +dword memcpy_bank_to_vram::pos#1 +dword memcpy_bank_to_vram::pos#2 +dword memcpy_bank_to_vram::pos#3 +dword memcpy_bank_to_vram::pos#4 +dword memcpy_bank_to_vram::pos#5 +dword memcpy_bank_to_vram::src +dword memcpy_bank_to_vram::src#0 +dword memcpy_bank_to_vram::src#1 +dword memcpy_bank_to_vram::src#2 +dword memcpy_bank_to_vram::vdest +dword memcpy_bank_to_vram::vdest#0 +dword memcpy_bank_to_vram::vdest#1 +dword memcpy_bank_to_vram::vdest#2 void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num) byte~ memcpy_in_vram::$0 byte~ memcpy_in_vram::$1 @@ -2811,20 +2811,20 @@ const word* vera_tilebase_offset[2] = { 0, 0 } Adding number conversion cast (unumber) > 5 -Adding number conversion cast (unumber) 3 in LoadFileBanked::$10 = LoadFileBanked::$9 << 3 -Adding number conversion cast (unumber) $1fff in LoadFileBanked::$14 = LoadFileBanked::$13 & $1fff -Adding number conversion cast (unumber) LoadFileBanked::$14 in LoadFileBanked::$14 = LoadFileBanked::$13 & (unumber)$1fff -Adding number conversion cast (unumber) $a000 in LoadFileBanked::addr#1 = LoadFileBanked::addr#0 + $a000 +Adding number conversion cast (unumber) 8 in memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 +Adding number conversion cast (unumber) 5 in memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 +Adding number conversion cast (unumber) 3 in memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 +Adding number conversion cast (unumber) $1fff in memcpy_bank_to_vram::$19 = memcpy_bank_to_vram::$18 & $1fff +Adding number conversion cast (unumber) memcpy_bank_to_vram::$19 in memcpy_bank_to_vram::$19 = memcpy_bank_to_vram::$18 & (unumber)$1fff +Adding number conversion cast (unumber) $a000 in memcpy_bank_to_vram::addr#1 = memcpy_bank_to_vram::addr#0 + $a000 +Adding number conversion cast (unumber) $c000 in memcpy_bank_to_vram::$21 = memcpy_bank_to_vram::addr#4 == $c000 +Adding number conversion cast (unumber) 8 in load_to_bank::$3 = load_to_bank::$2 << 8 +Adding number conversion cast (unumber) 5 in load_to_bank::$8 = load_to_bank::$7 >> 5 +Adding number conversion cast (unumber) 3 in load_to_bank::$10 = load_to_bank::$9 << 3 +Adding number conversion cast (unumber) $1fff in load_to_bank::$14 = load_to_bank::$13 & $1fff +Adding number conversion cast (unumber) load_to_bank::$14 in load_to_bank::$14 = load_to_bank::$13 & (unumber)$1fff +Adding number conversion cast (unumber) $a000 in load_to_bank::addr#1 = load_to_bank::addr#0 + $a000 Adding number conversion cast (unumber) 0 in load::verify = 0 -Adding number conversion cast (unumber) 8 in bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 -Adding number conversion cast (unumber) 5 in bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 -Adding number conversion cast (unumber) 3 in bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 -Adding number conversion cast (unumber) $1fff in bnkcpy_vram_address::$19 = bnkcpy_vram_address::$18 & $1fff -Adding number conversion cast (unumber) bnkcpy_vram_address::$19 in bnkcpy_vram_address::$19 = bnkcpy_vram_address::$18 & (unumber)$1fff -Adding number conversion cast (unumber) $a000 in bnkcpy_vram_address::addr#1 = bnkcpy_vram_address::addr#0 + $a000 -Adding number conversion cast (unumber) $c000 in bnkcpy_vram_address::$21 = bnkcpy_vram_address::addr#4 == $c000 Adding number conversion cast (unumber) 0 in vera_layer_get_color::$4 = 0 != vera_layer_get_color::$0 Adding number conversion cast (unumber) 4 in vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#4] << 4 Adding number conversion cast (unumber) 1 in if(vera_layer_mode_tile::color_depth#1==1) goto vera_layer_mode_tile::@4 @@ -2904,28 +2904,28 @@ Adding number conversion cast (unumber) 4 in screenlayer::vera_layer_get_width1_ Adding number conversion cast (unumber) 6 in screenlayer::vera_layer_get_height1_$1 = screenlayer::vera_layer_get_height1_$0 >> 6 Adding number conversion cast (unumber) 1 in vera_layer_set_text_color_mode::layer#2 = 1 Adding number conversion cast (unumber) 1 in screenlayer::layer#1 = 1 -Adding number conversion cast (unumber) 8 in LoadFileBanked::device#0 = 8 -Adding number conversion cast (unumber) VERA_PALETTE+$20 in bnkcpy_vram_address::vdest#0 = VERA_PALETTE+$20 -Adding number conversion cast (unumber) $20 in bnkcpy_vram_address::vdest#0 = ((unumber)) VERA_PALETTE+$20 -Adding number conversion cast (unumber) main::BANK_SPRITE-2 in bnkcpy_vram_address::src#0 = main::BANK_SPRITE-2 -Adding number conversion cast (unumber) 2 in bnkcpy_vram_address::src#0 = ((unumber)) main::BANK_SPRITE-2 -Adding number conversion cast (unumber) $20 in bnkcpy_vram_address::num#0 = $20 -Adding number conversion cast (unumber) main::BANK_SPRITE+$20-2 in bnkcpy_vram_address::src#1 = main::BANK_SPRITE+$20-2 -Adding number conversion cast (unumber) $20 in bnkcpy_vram_address::src#1 = ((unumber)) main::BANK_SPRITE+$20-2 -Adding number conversion cast (unumber) $40*$20 in bnkcpy_vram_address::num#1 = $40*$20 +Adding number conversion cast (unumber) 8 in load_to_bank::device#0 = 8 +Adding number conversion cast (unumber) VERA_PALETTE+$20 in memcpy_bank_to_vram::vdest#0 = VERA_PALETTE+$20 +Adding number conversion cast (unumber) $20 in memcpy_bank_to_vram::vdest#0 = ((unumber)) VERA_PALETTE+$20 +Adding number conversion cast (unumber) main::BANK_SPRITE-2 in memcpy_bank_to_vram::src#0 = main::BANK_SPRITE-2 +Adding number conversion cast (unumber) 2 in memcpy_bank_to_vram::src#0 = ((unumber)) main::BANK_SPRITE-2 +Adding number conversion cast (unumber) $20 in memcpy_bank_to_vram::num#0 = $20 +Adding number conversion cast (unumber) main::BANK_SPRITE+$20-2 in memcpy_bank_to_vram::src#1 = main::BANK_SPRITE+$20-2 +Adding number conversion cast (unumber) $20 in memcpy_bank_to_vram::src#1 = ((unumber)) main::BANK_SPRITE+$20-2 +Adding number conversion cast (unumber) $40*$20 in memcpy_bank_to_vram::num#1 = $40*$20 Adding number conversion cast (unumber) = conio_screen_height Inversing boolean not [478] gotoxy::$1 = gotoxy::y#3 <= conio_screen_height from [477] gotoxy::$0 = gotoxy::y#3 > conio_screen_height Inversing boolean not [482] gotoxy::$3 = gotoxy::x#3 < conio_screen_width from [481] gotoxy::$2 = gotoxy::x#3 >= conio_screen_width @@ -3222,21 +3220,21 @@ Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = Alias strlen::len#2 = strlen::len#4 strlen::len#3 strlen::return#0 strlen::return#3 strlen::return#1 Alias strlen::str#2 = strlen::str#3 Alias strlen::return#2 = strlen::return#4 -Alias LoadFileBanked::device#1 = LoadFileBanked::device#2 -Alias LoadFileBanked::address#1 = LoadFileBanked::address#2 LoadFileBanked::address#3 -Alias load::return#2 = load::return#4 -Alias LoadFileBanked::return#0 = LoadFileBanked::$15 LoadFileBanked::return#3 LoadFileBanked::return#1 Alias memcpy_to_vram::end#0 = memcpy_to_vram::$3 Alias memcpy_to_vram::s#2 = memcpy_to_vram::s#3 Alias memcpy_to_vram::end#1 = memcpy_to_vram::end#2 -Alias bnkcpy_vram_address::beg#0 = bnkcpy_vram_address::src#2 bnkcpy_vram_address::pos#0 -Alias bnkcpy_vram_address::end#0 = bnkcpy_vram_address::$6 -Alias bnkcpy_vram_address::addr#4 = bnkcpy_vram_address::addr#6 -Alias bnkcpy_vram_address::pos#2 = bnkcpy_vram_address::pos#4 bnkcpy_vram_address::pos#5 -Alias bnkcpy_vram_address::bank#2 = bnkcpy_vram_address::bank#3 bnkcpy_vram_address::bank#4 -Alias bnkcpy_vram_address::end#1 = bnkcpy_vram_address::end#3 bnkcpy_vram_address::end#4 +Alias memcpy_bank_to_vram::beg#0 = memcpy_bank_to_vram::src#2 memcpy_bank_to_vram::pos#0 +Alias memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::$6 +Alias memcpy_bank_to_vram::addr#4 = memcpy_bank_to_vram::addr#6 +Alias memcpy_bank_to_vram::pos#2 = memcpy_bank_to_vram::pos#4 memcpy_bank_to_vram::pos#5 +Alias memcpy_bank_to_vram::bank#2 = memcpy_bank_to_vram::bank#3 memcpy_bank_to_vram::bank#4 +Alias memcpy_bank_to_vram::end#1 = memcpy_bank_to_vram::end#3 memcpy_bank_to_vram::end#4 Alias memcpy_in_vram::i#2 = memcpy_in_vram::i#3 Alias memcpy_in_vram::num#1 = memcpy_in_vram::num#3 +Alias load_to_bank::device#1 = load_to_bank::device#2 +Alias load_to_bank::address#1 = load_to_bank::address#2 load_to_bank::address#3 +Alias load::return#2 = load::return#4 +Alias load_to_bank::return#0 = load_to_bank::$15 load_to_bank::return#3 load_to_bank::return#1 Alias vera_layer_get_mapbase_bank::return#0 = vera_layer_get_mapbase_bank::return#3 vera_layer_get_mapbase_bank::return#1 Alias vera_layer_get_mapbase_offset::return#0 = vera_layer_get_mapbase_offset::return#3 vera_layer_get_mapbase_offset::return#1 Alias vera_layer_set_textcolor::return#0 = vera_layer_set_textcolor::old#0 vera_layer_set_textcolor::return#3 vera_layer_set_textcolor::return#1 @@ -3362,8 +3360,8 @@ Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#2 screenlayer::vera_layer_get_height1_return#1 screenlayer::vera_layer_get_height1_return#3 screenlayer::$5 conio_height -Alias bnkcpy_vram_address::pos#2 = bnkcpy_vram_address::pos#3 -Alias bnkcpy_vram_address::end#1 = bnkcpy_vram_address::end#2 +Alias memcpy_bank_to_vram::pos#2 = memcpy_bank_to_vram::pos#3 +Alias memcpy_bank_to_vram::end#1 = memcpy_bank_to_vram::end#2 Alias vera_layer_mode_tile::mapwidth#1 = vera_layer_mode_tile::mapwidth#10 Alias vera_layer_mode_tile::layer#1 = vera_layer_mode_tile::layer#21 vera_layer_mode_tile::layer#13 vera_layer_mode_tile::layer#33 vera_layer_mode_tile::layer#18 vera_layer_mode_tile::layer#8 Alias vera_layer_mode_tile::mapheight#1 = vera_layer_mode_tile::mapheight#10 vera_layer_mode_tile::mapheight#13 @@ -3383,15 +3381,12 @@ Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#2 screenlayer::vera_layer_get_height1_return#1 screenlayer::vera_layer_get_height1_return#3 screenlayer::$5 conio_height Identical Phi Values strlen::str#4 strlen::str#1 Identical Phi Values load::return#3 load::return#0 -Identical Phi Values LoadFileBanked::filename#1 LoadFileBanked::filename#0 -Identical Phi Values LoadFileBanked::device#1 LoadFileBanked::device#0 -Identical Phi Values LoadFileBanked::address#1 LoadFileBanked::address#0 Identical Phi Values memcpy_to_vram::vdest#1 memcpy_to_vram::vdest#0 Identical Phi Values memcpy_to_vram::vbank#1 memcpy_to_vram::vbank#0 Identical Phi Values memcpy_to_vram::src#1 memcpy_to_vram::src#0 Identical Phi Values memcpy_to_vram::num#1 memcpy_to_vram::num#0 Identical Phi Values memcpy_to_vram::end#1 memcpy_to_vram::end#0 -Identical Phi Values bnkcpy_vram_address::end#1 bnkcpy_vram_address::end#0 +Identical Phi Values memcpy_bank_to_vram::end#1 memcpy_bank_to_vram::end#0 Identical Phi Values memcpy_in_vram::src#1 memcpy_in_vram::src#0 Identical Phi Values memcpy_in_vram::src_increment#1 memcpy_in_vram::src_increment#0 Identical Phi Values memcpy_in_vram::src_bank#1 memcpy_in_vram::src_bank#0 @@ -3400,6 +3395,9 @@ Identical Phi Values memcpy_in_vram::dest_increment#1 memcpy_in_vram::dest_incre Identical Phi Values memcpy_in_vram::dest_bank#1 memcpy_in_vram::dest_bank#0 Identical Phi Values memcpy_in_vram::num#2 memcpy_in_vram::num#0 Identical Phi Values memcpy_in_vram::num#1 memcpy_in_vram::num#2 +Identical Phi Values load_to_bank::filename#1 load_to_bank::filename#0 +Identical Phi Values load_to_bank::device#1 load_to_bank::device#0 +Identical Phi Values load_to_bank::address#1 load_to_bank::address#0 Identical Phi Values vera_layer_set_config::layer#1 vera_layer_set_config::layer#0 Identical Phi Values vera_layer_set_config::config#1 vera_layer_set_config::config#0 Identical Phi Values vera_layer_get_mapbase_bank::layer#1 vera_layer_get_mapbase_bank::layer#0 @@ -3475,10 +3473,10 @@ Identical Phi Values CONIO_SCREEN_BANK#12 CONIO_SCREEN_BANK#14 Identical Phi Values clrscr::color#3 clrscr::color#0 Successful SSA optimization Pass2IdenticalPhiElimination Simple Condition strlen::$0 [4] if(0!=*strlen::str#2) goto strlen::@2 -Simple Condition memcpy_to_vram::$4 [66] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2 -Simple Condition bnkcpy_vram_address::$20 [104] if(bnkcpy_vram_address::pos#2VERA_SPRITE_ATTR Constant memcpy_to_vram::vdest#0 = (void*) LoadFileBanked::address#0 -Constant right-side identified [24] LoadFileBanked::$5 = < LoadFileBanked::address#0 -Constant right-side identified [29] LoadFileBanked::$9 = > LoadFileBanked::address#0 -Constant right-side identified [35] LoadFileBanked::$13 = < LoadFileBanked::address#0 -Constant right-side identified [45] memcpy_to_vram::$0 = < memcpy_to_vram::vdest#0 -Constant right-side identified [47] memcpy_to_vram::$1 = > memcpy_to_vram::vdest#0 -Constant right-side identified [49] memcpy_to_vram::$2 = VERA_INC_1 | memcpy_to_vram::vbank#0 -Constant right-side identified [51] memcpy_to_vram::end#0 = memcpy_to_vram::$5 + memcpy_to_vram::num#0 +Constant right-side identified [18] memcpy_to_vram::$0 = < memcpy_to_vram::vdest#0 +Constant right-side identified [20] memcpy_to_vram::$1 = > memcpy_to_vram::vdest#0 +Constant right-side identified [22] memcpy_to_vram::$2 = VERA_INC_1 | memcpy_to_vram::vbank#0 +Constant right-side identified [24] memcpy_to_vram::end#0 = memcpy_to_vram::$5 + memcpy_to_vram::num#0 +Constant right-side identified [95] load_to_bank::$2 = > load_to_bank::address#0 +Constant right-side identified [98] load_to_bank::$5 = < load_to_bank::address#0 +Constant right-side identified [103] load_to_bank::$9 = > load_to_bank::address#0 +Constant right-side identified [109] load_to_bank::$13 = < load_to_bank::address#0 Constant right-side identified [118] vera_layer_set_config::$0 = vera_layer_set_config::layer#0 * SIZEOF_POINTER Constant right-side identified [138] vera_layer_set_tilebase::$0 = vera_layer_set_tilebase::layer#0 * SIZEOF_POINTER Constant right-side identified [168] vera_layer_mode_tile::$15 = vera_layer_mode_tile::layer#0 * SIZEOF_WORD @@ -3741,16 +3739,16 @@ Constant right-side identified [188] vera_layer_mode_tile::$8 = > vera_layer_mod Constant right-side identified [190] vera_layer_mode_tile::$20 = vera_layer_mode_tile::layer#0 * SIZEOF_DWORD Constant right-side identified [192] vera_layer_mode_tile::tilebase_address#0 = vera_layer_mode_tile::tilebase_address#1 >> 1 Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$2 = >LoadFileBanked::address#0 -Constant LoadFileBanked::$5 = LoadFileBanked::address#0 -Constant LoadFileBanked::$13 = memcpy_to_vram::vdest#0 Constant memcpy_to_vram::$2 = VERA_INC_1|memcpy_to_vram::vbank#0 Constant memcpy_to_vram::end#0 = memcpy_to_vram::$5+memcpy_to_vram::num#0 Constant memcpy_in_vram::$2 = memcpy_in_vram::src_increment#0 Constant memcpy_in_vram::$5 = memcpy_in_vram::dest_increment#0 +Constant load_to_bank::$2 = >load_to_bank::address#0 +Constant load_to_bank::$5 = load_to_bank::address#0 +Constant load_to_bank::$13 = LoadFileBanked::$5 -Constant right-side identified [27] LoadFileBanked::$10 = LoadFileBanked::$9 << 3 -Constant right-side identified [32] LoadFileBanked::$14 = LoadFileBanked::$13 & $1fff +Constant right-side identified [89] load_to_bank::$3 = load_to_bank::$2 << 8 +Constant right-side identified [91] load_to_bank::$6 = > load_to_bank::$5 +Constant right-side identified [95] load_to_bank::$10 = load_to_bank::$9 << 3 +Constant right-side identified [100] load_to_bank::$14 = load_to_bank::$13 & $1fff Constant right-side identified [162] vera_layer_mode_tile::$4 = < vera_layer_mode_tile::mapbase_address#0 Constant right-side identified [169] vera_layer_mode_tile::$10 = < vera_layer_mode_tile::tilebase_address#0 Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$3 = LoadFileBanked::$2<<8 -Constant LoadFileBanked::$6 = >LoadFileBanked::$5 -Constant LoadFileBanked::$10 = LoadFileBanked::$9<<3 -Constant LoadFileBanked::$14 = LoadFileBanked::$13&$1fff +Constant load_to_bank::$3 = load_to_bank::$2<<8 +Constant load_to_bank::$6 = >load_to_bank::$5 +Constant load_to_bank::$10 = load_to_bank::$9<<3 +Constant load_to_bank::$14 = load_to_bank::$13&$1fff Constant vera_layer_mode_tile::config#21 = VERA_LAYER_WIDTH_128 Constant vera_layer_mode_tile::$4 = vera_layer_mode_tile::$4 Constant right-side identified [162] vera_layer_mode_tile::tilebase#0 = > vera_layer_mode_tile::$10 Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$4 = vera_layer_mode_tile::$4 Constant vera_layer_mode_tile::tilebase#0 = >vera_layer_mode_tile::$10 Successful SSA optimization Pass2ConstantIdentification -Constant LoadFileBanked::$16 = (word)LoadFileBanked::$4 -Constant LoadFileBanked::$17 = (word)LoadFileBanked::$11 +Constant load_to_bank::$16 = (word)load_to_bank::$4 +Constant load_to_bank::$17 = (word)load_to_bank::$11 Constant vera_layer_set_config::config#0 = vera_layer_mode_tile::config#10 Constant vera_layer_set_mapbase::mapbase#0 = vera_layer_mode_tile::mapbase#0 Successful SSA optimization Pass2ConstantIdentification -Simplifying constant evaluating to zero vera_layer_mode_tile::$4 in Successful SSA optimization PassNSimplifyConstantZero -Simplifying expression containing zero LoadFileBanked::$6 in [23] LoadFileBanked::$7 = LoadFileBanked::$16 | LoadFileBanked::$6 +Simplifying expression containing zero load_to_bank::$6 in [91] load_to_bank::$7 = load_to_bank::$16 | load_to_bank::$6 Successful SSA optimization PassNSimplifyExpressionWithZero -Eliminating unused constant LoadFileBanked::$3 -Eliminating unused constant LoadFileBanked::$4 -Eliminating unused constant LoadFileBanked::$16 +Eliminating unused constant load_to_bank::$3 +Eliminating unused constant load_to_bank::$4 +Eliminating unused constant load_to_bank::$16 Eliminating unused constant vera_layer_mode_tile::$4 Successful SSA optimization PassNEliminateUnusedVars -Eliminating unused constant LoadFileBanked::$2 +Eliminating unused constant load_to_bank::$2 Successful SSA optimization PassNEliminateUnusedVars Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 conio_width Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 @@ -3866,7 +3864,7 @@ Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 conio_height Constant right-side identified [153] vera_layer_mode_tile::tilebase#1 = vera_layer_mode_tile::tilebase#0 & VERA_LAYER_TILEBASE_MASK Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$7 = LoadFileBanked::$6 +Constant load_to_bank::$7 = load_to_bank::$6 Constant vera_layer_mode_tile::tilebase#1 = vera_layer_mode_tile::tilebase#0&VERA_LAYER_TILEBASE_MASK Successful SSA optimization Pass2ConstantIdentification Constant vera_layer_set_tilebase::tilebase#0 = vera_layer_mode_tile::tilebase#1 @@ -3875,25 +3873,25 @@ Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 conio_height -Constant right-side identified [21] LoadFileBanked::$8 = LoadFileBanked::$7 >> 5 +Constant right-side identified [89] load_to_bank::$8 = load_to_bank::$7 >> 5 Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$8 = LoadFileBanked::$7>>5 +Constant load_to_bank::$8 = load_to_bank::$7>>5 Successful SSA optimization Pass2ConstantIdentification Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 conio_width Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 conio_height -Constant right-side identified [21] LoadFileBanked::$12 = LoadFileBanked::$8 + LoadFileBanked::$17 +Constant right-side identified [89] load_to_bank::$12 = load_to_bank::$8 + load_to_bank::$17 Successful SSA optimization Pass2ConstantRValueConsolidation -Constant LoadFileBanked::$12 = LoadFileBanked::$8+LoadFileBanked::$17 +Constant load_to_bank::$12 = load_to_bank::$8+load_to_bank::$17 Successful SSA optimization Pass2ConstantIdentification -Constant LoadFileBanked::bank#0 = (byte)LoadFileBanked::$12 +Constant load_to_bank::bank#0 = (byte)load_to_bank::$12 Successful SSA optimization Pass2ConstantIdentification Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 conio_width Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 conio_height -Inlining Noop Cast [64] bnkcpy_vram_address::addr#0 = (byte*)bnkcpy_vram_address::$19 keeping bnkcpy_vram_address::addr#0 +Inlining Noop Cast [55] memcpy_bank_to_vram::addr#0 = (byte*)memcpy_bank_to_vram::$19 keeping memcpy_bank_to_vram::addr#0 Inlining Noop Cast [284] memcpy_in_vram::src#0 = (void*)insertup::$6 keeping memcpy_in_vram::src#0 Inlining Noop Cast [314] CONIO_SCREEN_TEXT#16 = (byte*)screenlayer::$1 keeping CONIO_SCREEN_TEXT#16 Successful SSA optimization Pass2NopCastInlining @@ -3915,17 +3913,17 @@ Rewriting multiplication to use shift [336] screenlayer::vera_layer_get_height1_ Rewriting multiplication to use shift [340] screenlayer::vera_layer_get_height1_$3 = screenlayer::vera_layer_get_height1_$1 * SIZEOF_WORD Successful SSA optimization Pass2MultiplyToShiftRewriting Inlining constant with var siblings strlen::len#0 -Inlining constant with different constant siblings LoadFileBanked::addr#0 -Inlining constant with different constant siblings LoadFileBanked::addr#1 Inlining constant with var siblings memcpy_to_vram::s#0 -Inlining constant with var siblings bnkcpy_vram_address::addr#3 -Inlining constant with var siblings bnkcpy_vram_address::vdest#0 -Inlining constant with different constant siblings bnkcpy_vram_address::src#0 -Inlining constant with var siblings bnkcpy_vram_address::num#0 -Inlining constant with var siblings bnkcpy_vram_address::vdest#1 -Inlining constant with different constant siblings bnkcpy_vram_address::src#1 -Inlining constant with var siblings bnkcpy_vram_address::num#1 +Inlining constant with var siblings memcpy_bank_to_vram::addr#3 +Inlining constant with var siblings memcpy_bank_to_vram::vdest#0 +Inlining constant with different constant siblings memcpy_bank_to_vram::src#0 +Inlining constant with var siblings memcpy_bank_to_vram::num#0 +Inlining constant with var siblings memcpy_bank_to_vram::vdest#1 +Inlining constant with different constant siblings memcpy_bank_to_vram::src#1 +Inlining constant with var siblings memcpy_bank_to_vram::num#1 Inlining constant with var siblings memcpy_in_vram::i#0 +Inlining constant with different constant siblings load_to_bank::addr#0 +Inlining constant with different constant siblings load_to_bank::addr#1 Inlining constant with var siblings vera_layer_set_text_color_mode::color_mode#0 Inlining constant with var siblings vera_layer_set_text_color_mode::layer#2 Inlining constant with var siblings vera_layer_set_text_color_mode::color_mode#2 @@ -3952,39 +3950,34 @@ Inlining constant with var siblings cputs::s#1 Inlining constant with var siblings screenlayer::layer#0 Inlining constant with var siblings screenlayer::layer#1 Constant inlined vera_layer_set_config::layer#0 = vera_layer_mode_text::layer#0 -Constant inlined LoadFileBanked::address#0 = main::BANK_SPRITE Constant inlined vera_layer_set_textcolor::color#0 = WHITE Constant inlined cputs::s#1 = main::s -Constant inlined bnkcpy_vram_address::vdest#1 = main::VRAM_SPRITE Constant inlined clrscr::l#0 = 0 Constant inlined strlen::len#0 = 0 -Constant inlined bnkcpy_vram_address::vdest#0 = VERA_PALETTE+$20 Constant inlined vera_layer_set_tilebase::layer#0 = vera_layer_mode_text::layer#0 -Constant inlined LoadFileBanked::$11 = <>main::BANK_SPRITE<<3 -Constant inlined LoadFileBanked::$10 = >main::BANK_SPRITE<<3 -Constant inlined LoadFileBanked::addr#0 = (byte*)0 -Constant inlined LoadFileBanked::addr#1 = (byte*)0+$a000 Constant inlined memcpy_in_vram::dest_increment#0 = VERA_INC_1 Constant inlined vera_layer_set_tilebase::tilebase#0 = >main::BANK_SPRITE<<3 -Constant inlined LoadFileBanked::$14 = 0 -Constant inlined LoadFileBanked::$12 = >>5+(word)<>main::BANK_SPRITE<<3 Constant inlined vera_layer_mode_tile::$20 = vera_layer_mode_text::layer#0*SIZEOF_DWORD -Constant inlined LoadFileBanked::$6 = >>5 +Constant inlined load_to_bank::$5 = main::BANK_SPRITE Constant inlined vera_layer_set_mapbase::layer#0 = vera_layer_mode_text::layer#0 +Constant inlined load_to_bank::$10 = >main::BANK_SPRITE<<3 +Constant inlined load_to_bank::$11 = <>main::BANK_SPRITE<<3 Constant inlined memcpy_to_vram::s#0 = (byte*)memcpy_to_vram::src#0 +Constant inlined load_to_bank::$12 = >>5+(word)<>main::BANK_SPRITE<<3 Constant inlined vera_layer_set_mapbase::layer#2 = 1 Constant inlined vera_layer_set_mapbase::layer#1 = 0 Constant inlined gotoxy::x#0 = 0 @@ -3995,20 +3988,25 @@ Constant inlined vera_layer_mode_tile::tilebase_address#1 = vera_layer_mode_text Constant inlined memcpy_to_vram::$0 = 0 Constant inlined memcpy_to_vram::$1 = >memcpy_to_vram::vdest#0 Constant inlined vera_layer_set_text_color_mode::color_mode#0 = VERA_LAYER_CONFIG_16C -Constant inlined LoadFileBanked::$9 = >main::BANK_SPRITE -Constant inlined LoadFileBanked::$8 = >>5 +Constant inlined load_to_bank::filename#0 = main::filename Constant inlined vera_layer_set_text_color_mode::color_mode#2 = VERA_LAYER_CONFIG_16C -Constant inlined LoadFileBanked::$7 = >main::BANK_SPRITE<<3 +Constant inlined load_to_bank::addr#0 = (byte*)0 Constant inlined vera_layer_set_mapbase::mapbase#0 = vera_layer_mode_tile::mapbase#0 Constant inlined vera_layer_set_mapbase::mapbase#1 = $20 +Constant inlined load_to_bank::addr#1 = (byte*)0+$a000 Constant inlined vera_layer_set_mapbase::mapbase#2 = 0 Constant inlined memcpy_in_vram::i#0 = 0 +Constant inlined memcpy_bank_to_vram::num#0 = $20 +Constant inlined memcpy_bank_to_vram::num#1 = (word)$40*$20 Constant inlined clearline::c#0 = 0 Constant inlined vera_layer_mode_tile::mapbase_address#1 = vera_layer_mode_text::mapbase_address#0 Constant inlined vera_layer_mode_tile::$18 = vera_layer_mode_text::layer#0*SIZEOF_DWORD @@ -4101,7 +4099,7 @@ Alias candidate removed (volatile)screenlayer::vera_layer_get_width1_return#0 = Alias candidate removed (volatile)conio_rowshift = screenlayer::$3 Alias candidate removed (volatile)conio_rowskip = screenlayer::$4 Alias candidate removed (volatile)screenlayer::vera_layer_get_height1_return#0 = screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 conio_height -Added new block during phi lifting bnkcpy_vram_address::@5(between bnkcpy_vram_address::@2 and bnkcpy_vram_address::@3) +Added new block during phi lifting memcpy_bank_to_vram::@5(between memcpy_bank_to_vram::@2 and memcpy_bank_to_vram::@3) Added new block during phi lifting conio_x16_init::@11(between conio_x16_init::@9 and conio_x16_init::@1) Added new block during phi lifting gotoxy::@5(between gotoxy and gotoxy::@1) Adding NOP phi() at start of __start @@ -4128,7 +4126,7 @@ Adding NOP phi() at start of vera_layer_mode_text::@5 Adding NOP phi() at start of gotoxy::@3 Adding NOP phi() at start of gotoxy::@4 Adding NOP phi() at start of cputs -Adding NOP phi() at start of LoadFileBanked::@3 +Adding NOP phi() at start of load_to_bank::@3 Adding NOP phi() at start of vera_layer_mode_tile Adding NOP phi() at start of vera_layer_mode_tile::@4 Adding NOP phi() at start of vera_layer_mode_tile::@8 @@ -4159,12 +4157,12 @@ Adding NOP phi() at start of insertup::@5 CALL GRAPH Calls in [__start] to conio_x16_init:8 main:11 Calls in [conio_x16_init] to vera_layer_mode_text:15 screensize:17 screenlayer:19 vera_layer_set_textcolor:21 vera_layer_set_backcolor:23 vera_layer_set_mapbase:25 vera_layer_set_mapbase:27 gotoxy:34 -Calls in [main] to vera_layer_set_text_color_mode:39 screenlayer:41 clrscr:43 cputs:45 LoadFileBanked:47 bnkcpy_vram_address:49 bnkcpy_vram_address:51 memcpy_to_vram:55 +Calls in [main] to vera_layer_set_text_color_mode:39 screenlayer:41 clrscr:43 cputs:45 load_to_bank:47 memcpy_bank_to_vram:49 memcpy_bank_to_vram:51 memcpy_to_vram:55 Calls in [vera_layer_mode_text] to vera_layer_mode_tile:60 vera_layer_set_text_color_mode:63 Calls in [screenlayer] to vera_layer_get_mapbase_bank:75 vera_layer_get_mapbase_offset:79 vera_layer_get_rowshift:93 vera_layer_get_rowskip:98 Calls in [clrscr] to vera_layer_get_backcolor:144 vera_layer_get_textcolor:149 Calls in [cputs] to cputc:185 -Calls in [LoadFileBanked] to setnam:188 setlfs:190 load:194 +Calls in [load_to_bank] to setnam:188 setlfs:190 load:194 Calls in [vera_layer_mode_tile] to vera_layer_set_config:268 vera_layer_set_mapbase:272 vera_layer_set_tilebase:280 Calls in [cputc] to vera_layer_get_color:299 cputln:322 cputln:327 cputln:330 Calls in [setnam] to strlen:333 @@ -4183,15 +4181,15 @@ Coalesced [172] clrscr::l#7 = clrscr::l#1 Coalesced [173] clrscr::line_text#9 = clrscr::line_text#1 Coalesced [177] clrscr::c#4 = clrscr::c#1 Coalesced [186] cputs::s#6 = cputs::s#0 -Coalesced [228] bnkcpy_vram_address::pos#6 = bnkcpy_vram_address::beg#0 -Coalesced [229] bnkcpy_vram_address::addr#7 = bnkcpy_vram_address::addr#1 -Coalesced [230] bnkcpy_vram_address::bank#6 = bnkcpy_vram_address::bank#0 -Coalesced [237] bnkcpy_vram_address::bank#9 = bnkcpy_vram_address::bank#1 -Coalesced [242] bnkcpy_vram_address::pos#7 = bnkcpy_vram_address::pos#1 -Coalesced [243] bnkcpy_vram_address::addr#8 = bnkcpy_vram_address::addr#2 -Coalesced [244] bnkcpy_vram_address::bank#7 = bnkcpy_vram_address::bank#5 -Coalesced [245] bnkcpy_vram_address::addr#9 = bnkcpy_vram_address::addr#4 -Coalesced (already) [246] bnkcpy_vram_address::bank#8 = bnkcpy_vram_address::bank#2 +Coalesced [228] memcpy_bank_to_vram::pos#6 = memcpy_bank_to_vram::beg#0 +Coalesced [229] memcpy_bank_to_vram::addr#7 = memcpy_bank_to_vram::addr#1 +Coalesced [230] memcpy_bank_to_vram::bank#6 = memcpy_bank_to_vram::bank#0 +Coalesced [237] memcpy_bank_to_vram::bank#9 = memcpy_bank_to_vram::bank#1 +Coalesced [242] memcpy_bank_to_vram::pos#7 = memcpy_bank_to_vram::pos#1 +Coalesced [243] memcpy_bank_to_vram::addr#8 = memcpy_bank_to_vram::addr#2 +Coalesced [244] memcpy_bank_to_vram::bank#7 = memcpy_bank_to_vram::bank#5 +Coalesced [245] memcpy_bank_to_vram::addr#9 = memcpy_bank_to_vram::addr#4 +Coalesced (already) [246] memcpy_bank_to_vram::bank#8 = memcpy_bank_to_vram::bank#2 Coalesced [256] memcpy_to_vram::s#4 = memcpy_to_vram::s#1 Coalesced [298] vera_layer_get_color::layer#6 = vera_layer_get_color::layer#0 Coalesced [357] vera_layer_get_color::return#9 = vera_layer_get_color::return#1 @@ -4213,8 +4211,8 @@ Culled Empty Block label vera_layer_mode_text::@4 Culled Empty Block label vera_layer_mode_text::@5 Culled Empty Block label gotoxy::@3 Culled Empty Block label cputs::@3 -Culled Empty Block label LoadFileBanked::@3 -Culled Empty Block label bnkcpy_vram_address::@5 +Culled Empty Block label load_to_bank::@3 +Culled Empty Block label memcpy_bank_to_vram::@5 Culled Empty Block label vera_layer_mode_tile::@4 Culled Empty Block label vera_layer_mode_tile::@8 Culled Empty Block label vera_layer_mode_tile::@9 @@ -4358,15 +4356,15 @@ main::@3: scope:[main] from main::@2 to:main::@4 main::@4: scope:[main] from main::@3 [40] *(&main::SPRITE_ATTR) = memcpy(*(&$0), struct VERA_SPRITE, SIZEOF_STRUCT_VERA_SPRITE) - [41] call LoadFileBanked + [41] call load_to_bank to:main::@5 main::@5: scope:[main] from main::@4 [42] phi() - [43] call bnkcpy_vram_address + [43] call memcpy_bank_to_vram to:main::@6 main::@6: scope:[main] from main::@5 [44] phi() - [45] call bnkcpy_vram_address + [45] call memcpy_bank_to_vram to:main::@7 main::@7: scope:[main] from main::@6 [46] *((word*)&main::SPRITE_ATTR) = bnkcpy_vram_address::$2 - [189] *VERA_ADDRX_M = bnkcpy_vram_address::$3 - [190] bnkcpy_vram_address::$4 = > bnkcpy_vram_address::vdest#2 - [191] bnkcpy_vram_address::$5 = < bnkcpy_vram_address::$4 - [192] *VERA_ADDRX_H = bnkcpy_vram_address::$5 + [184] memcpy_bank_to_vram::$0 = < memcpy_bank_to_vram::vdest#2 + [185] memcpy_bank_to_vram::$1 = < memcpy_bank_to_vram::$0 + [186] *VERA_ADDRX_L = memcpy_bank_to_vram::$1 + [187] memcpy_bank_to_vram::$2 = < memcpy_bank_to_vram::vdest#2 + [188] memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2 + [189] *VERA_ADDRX_M = memcpy_bank_to_vram::$3 + [190] memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2 + [191] memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4 + [192] *VERA_ADDRX_H = memcpy_bank_to_vram::$5 [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 - [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 - [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 - [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 - [197] bnkcpy_vram_address::$9 = < bnkcpy_vram_address::$8 - [198] bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 - [199] bnkcpy_vram_address::$11 = > bnkcpy_vram_address::$10 - [200] bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 - [201] bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 - [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 - [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 - [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 - [205] bnkcpy_vram_address::$16 = < bnkcpy_vram_address::$15 - [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 - [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 - [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 - [209] bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 - [210] bnkcpy_vram_address::addr#0 = bnkcpy_vram_address::$18 & $1fff - [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 - [212] *((byte*) 40801) = bnkcpy_vram_address::bank#0 - to:bnkcpy_vram_address::@1 -bnkcpy_vram_address::@1: scope:[bnkcpy_vram_address] from bnkcpy_vram_address bnkcpy_vram_address::@3 - [213] bnkcpy_vram_address::bank#2 = phi( bnkcpy_vram_address/bnkcpy_vram_address::bank#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::bank#5 ) - [213] bnkcpy_vram_address::addr#4 = phi( bnkcpy_vram_address/bnkcpy_vram_address::addr#1, bnkcpy_vram_address::@3/bnkcpy_vram_address::addr#2 ) - [213] bnkcpy_vram_address::pos#2 = phi( bnkcpy_vram_address/bnkcpy_vram_address::beg#0, bnkcpy_vram_address::@3/bnkcpy_vram_address::pos#1 ) - [214] if(bnkcpy_vram_address::pos#2 memcpy_bank_to_vram::beg#0 + [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 + [197] memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8 + [198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 + [199] memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10 + [200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 + [201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 + [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 + [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 + [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 + [205] memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15 + [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 + [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 + [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 + [209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 + [210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff + [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 + [212] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0 + to:memcpy_bank_to_vram::@1 +memcpy_bank_to_vram::@1: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram memcpy_bank_to_vram::@3 + [213] memcpy_bank_to_vram::bank#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::bank#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::bank#5 ) + [213] memcpy_bank_to_vram::addr#4 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::addr#1, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::addr#2 ) + [213] memcpy_bank_to_vram::pos#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::beg#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::pos#1 ) + [214] if(memcpy_bank_to_vram::pos#2 bnkcpy_vram_address::vdest#2 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] { } ) always clobbers reg byte a -Statement [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] { } ) always clobbers reg byte a -Statement [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] { } ) always clobbers reg byte a -Statement [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] { } ) always clobbers reg byte a -Statement [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] { } ) always clobbers reg byte a -Statement [198] bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] { } ) always clobbers reg byte a -Removing always clobbered register reg byte a as potential for zp[1]:145 [ bnkcpy_vram_address::$9 ] -Statement [200] bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] { } ) always clobbers reg byte a -Removing always clobbered register reg byte a as potential for zp[1]:148 [ bnkcpy_vram_address::$11 ] -Statement [201] bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] { } ) always clobbers reg byte a -Statement [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] { } ) always clobbers reg byte a -Statement [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] { } ) always clobbers reg byte a -Statement [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] { } ) always clobbers reg byte a -Statement [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] { } ) always clobbers reg byte a -Statement [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] { } ) always clobbers reg byte a -Statement [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] { } ) always clobbers reg byte a -Statement [209] bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] { } ) always clobbers reg byte a -Removing always clobbered register reg byte a as potential for zp[1]:25 [ bnkcpy_vram_address::bank#2 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::bank#5 bnkcpy_vram_address::bank#1 ] -Statement [210] bnkcpy_vram_address::addr#0 = bnkcpy_vram_address::$18 & $1fff [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] { } ) always clobbers reg byte a -Statement [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] { } ) always clobbers reg byte a -Statement [214] if(bnkcpy_vram_address::pos#2 memcpy_bank_to_vram::vdest#2 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] { } ) always clobbers reg byte a +Statement [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] { } ) always clobbers reg byte a +Statement [194] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] { } ) always clobbers reg byte a +Statement [195] memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] { } ) always clobbers reg byte a +Statement [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] { } ) always clobbers reg byte a +Statement [198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] { } ) always clobbers reg byte a +Removing always clobbered register reg byte a as potential for zp[1]:145 [ memcpy_bank_to_vram::$9 ] +Statement [200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] { } ) always clobbers reg byte a +Removing always clobbered register reg byte a as potential for zp[1]:148 [ memcpy_bank_to_vram::$11 ] +Statement [201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] { } ) always clobbers reg byte a +Statement [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] { } ) always clobbers reg byte a +Statement [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] { } ) always clobbers reg byte a +Statement [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] { } ) always clobbers reg byte a +Statement [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] { } ) always clobbers reg byte a +Statement [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] { } ) always clobbers reg byte a +Statement [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] { } ) always clobbers reg byte a +Statement [209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] { } ) always clobbers reg byte a +Removing always clobbered register reg byte a as potential for zp[1]:25 [ memcpy_bank_to_vram::bank#2 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::bank#5 memcpy_bank_to_vram::bank#1 ] +Statement [210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] { } ) always clobbers reg byte a +Statement [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] { } ) always clobbers reg byte a +Statement [214] if(memcpy_bank_to_vram::pos#2memcpy_to_vram::vdest#0 [ ] ( main:10::memcpy_to_vram:49 [ ] { } ) always clobbers reg byte a @@ -6048,13 +6046,13 @@ Statement [280] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer] Statement [282] cputc::$16 = (word)conio_cursor_x[conio_screen_layer] [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 cputc::$16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 cputc::$16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y Statement [283] if(cputc::$16!=conio_width) goto cputc::@return [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a Statement [287] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y -Statement [292] strlen::str#1 = setnam::filename [ setnam::filename strlen::str#1 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::str#1 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a -Statement [294] strlen::return#2 = strlen::len#2 [ setnam::filename strlen::return#2 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::return#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a -Statement [295] setnam::$0 = strlen::return#2 [ setnam::filename setnam::$0 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::$0 ] { } ) always clobbers reg byte a -Statement [296] setnam::filename_len = (byte)setnam::$0 [ setnam::filename setnam::filename_len ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::filename_len ] { } ) always clobbers reg byte a +Statement [292] strlen::str#1 = setnam::filename [ setnam::filename strlen::str#1 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::str#1 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a +Statement [294] strlen::return#2 = strlen::len#2 [ setnam::filename strlen::return#2 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::return#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a +Statement [295] setnam::$0 = strlen::return#2 [ setnam::filename setnam::$0 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::$0 ] { } ) always clobbers reg byte a +Statement [296] setnam::filename_len = (byte)setnam::$0 [ setnam::filename setnam::filename_len ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::filename_len ] { } ) always clobbers reg byte a Statement asm { ldafilename_len ldxfilename ldyfilename+1 jsr$ffbd } always clobbers reg byte a reg byte x reg byte y Statement asm { ldxdevice lda#1 ldy#0 jsr$ffba } always clobbers reg byte a reg byte x reg byte y -Statement [301] load::status = 0 [ load::address load::verify load::status ] ( main:10::LoadFileBanked:41::load:180 [ main::SPRITE_ATTR load::address load::verify load::status ] { } ) always clobbers reg byte a +Statement [301] load::status = 0 [ load::address load::verify load::status ] ( main:10::load_to_bank:41::load:180 [ main::SPRITE_ATTR load::address load::verify load::status ] { } ) always clobbers reg byte a Statement asm { ldxaddress ldyaddress+1 ldaverify jsr$ffd5 bcserror lda#$ff error: stastatus } always clobbers reg byte a reg byte x reg byte y Statement [304] vera_layer_set_config::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER) [ vera_layer_set_config::addr#0 ] ( vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ conio_screen_width conio_screen_height conio_x16_init::line#0 vera_layer_set_config::addr#0 ] { } conio_x16_init:8::vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ main::SPRITE_ATTR conio_screen_width conio_screen_height conio_x16_init::line#0 vera_layer_set_config::addr#0 ] { } ) always clobbers reg byte a Statement [305] *vera_layer_set_config::addr#0 = vera_layer_mode_tile::config#10 [ ] ( vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ conio_screen_width conio_screen_height conio_x16_init::line#0 ] { } conio_x16_init:8::vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ main::SPRITE_ATTR conio_screen_width conio_screen_height conio_x16_init::line#0 ] { } ) always clobbers reg byte a reg byte y @@ -6075,7 +6073,7 @@ Statement [323] cputln::$3 = conio_screen_layer << 1 [ conio_screen_width conio_ Statement [324] conio_line_text[cputln::$3] = cputln::temp#1 [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a Statement [325] conio_cursor_x[conio_screen_layer] = 0 [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y Statement [326] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer] [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte x -Statement [331] if(0!=*strlen::str#2) goto strlen::@2 [ strlen::len#2 strlen::str#2 ] ( main:10::LoadFileBanked:41::setnam:174::strlen:293 [ main::SPRITE_ATTR setnam::filename strlen::len#2 strlen::str#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a reg byte y +Statement [331] if(0!=*strlen::str#2) goto strlen::@2 [ strlen::len#2 strlen::str#2 ] ( main:10::load_to_bank:41::setnam:174::strlen:293 [ main::SPRITE_ATTR setnam::filename strlen::len#2 strlen::str#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a reg byte y Statement [335] if(conio_cursor_y[conio_screen_layer] bnkcpy_vram_address::vdest#2 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 bnkcpy_vram_address::$4 ] { } ) always clobbers reg byte a -Statement [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::num#2 ] { } ) always clobbers reg byte a -Statement [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 ] { } ) always clobbers reg byte a -Statement [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$7 ] { } ) always clobbers reg byte a -Statement [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$8 ] { } ) always clobbers reg byte a -Statement [198] bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$9 bnkcpy_vram_address::$10 ] { } ) always clobbers reg byte a -Statement [200] bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$11 bnkcpy_vram_address::$23 ] { } ) always clobbers reg byte a -Statement [201] bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$12 ] { } ) always clobbers reg byte a -Statement [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 ] { } ) always clobbers reg byte a -Statement [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$14 ] { } ) always clobbers reg byte a -Statement [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$15 ] { } ) always clobbers reg byte a -Statement [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$13 bnkcpy_vram_address::$24 ] { } ) always clobbers reg byte a -Statement [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::$17 ] { } ) always clobbers reg byte a -Statement [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 ] { } ) always clobbers reg byte a -Statement [209] bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::$18 ] { } ) always clobbers reg byte a -Statement [210] bnkcpy_vram_address::addr#0 = bnkcpy_vram_address::$18 & $1fff [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#0 ] { } ) always clobbers reg byte a -Statement [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 [ bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] ( main:10::bnkcpy_vram_address:43 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] { } main:10::bnkcpy_vram_address:45 [ main::SPRITE_ATTR bnkcpy_vram_address::beg#0 bnkcpy_vram_address::end#0 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::addr#1 ] { } ) always clobbers reg byte a -Statement [214] if(bnkcpy_vram_address::pos#2 memcpy_bank_to_vram::vdest#2 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::$4 ] { } ) always clobbers reg byte a +Statement [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::num#2 ] { } ) always clobbers reg byte a +Statement [194] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 ] { } ) always clobbers reg byte a +Statement [195] memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$7 ] { } ) always clobbers reg byte a +Statement [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$8 ] { } ) always clobbers reg byte a +Statement [198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$9 memcpy_bank_to_vram::$10 ] { } ) always clobbers reg byte a +Statement [200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$11 memcpy_bank_to_vram::$23 ] { } ) always clobbers reg byte a +Statement [201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$12 ] { } ) always clobbers reg byte a +Statement [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 ] { } ) always clobbers reg byte a +Statement [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$14 ] { } ) always clobbers reg byte a +Statement [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$15 ] { } ) always clobbers reg byte a +Statement [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$24 ] { } ) always clobbers reg byte a +Statement [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::$17 ] { } ) always clobbers reg byte a +Statement [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 ] { } ) always clobbers reg byte a +Statement [209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::$18 ] { } ) always clobbers reg byte a +Statement [210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#0 ] { } ) always clobbers reg byte a +Statement [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 [ memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] ( main:10::memcpy_bank_to_vram:43 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] { } main:10::memcpy_bank_to_vram:45 [ main::SPRITE_ATTR memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::end#0 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::addr#1 ] { } ) always clobbers reg byte a +Statement [214] if(memcpy_bank_to_vram::pos#2memcpy_to_vram::vdest#0 [ ] ( main:10::memcpy_to_vram:49 [ ] { } ) always clobbers reg byte a @@ -6236,13 +6234,13 @@ Statement [280] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer] Statement [282] cputc::$16 = (word)conio_cursor_x[conio_screen_layer] [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 cputc::$16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 cputc::$16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y Statement [283] if(cputc::$16!=conio_width) goto cputc::@return [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a Statement [287] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return [ conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172 [ main::SPRITE_ATTR cputs::s#0 conio_screen_width conio_screen_height conio_screen_layer conio_width conio_height conio_rowshift conio_rowskip CONIO_SCREEN_BANK#14 CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y -Statement [292] strlen::str#1 = setnam::filename [ setnam::filename strlen::str#1 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::str#1 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a -Statement [294] strlen::return#2 = strlen::len#2 [ setnam::filename strlen::return#2 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::return#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a -Statement [295] setnam::$0 = strlen::return#2 [ setnam::filename setnam::$0 ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::$0 ] { } ) always clobbers reg byte a -Statement [296] setnam::filename_len = (byte)setnam::$0 [ setnam::filename setnam::filename_len ] ( main:10::LoadFileBanked:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::filename_len ] { } ) always clobbers reg byte a +Statement [292] strlen::str#1 = setnam::filename [ setnam::filename strlen::str#1 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::str#1 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a +Statement [294] strlen::return#2 = strlen::len#2 [ setnam::filename strlen::return#2 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename strlen::return#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a +Statement [295] setnam::$0 = strlen::return#2 [ setnam::filename setnam::$0 ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::$0 ] { } ) always clobbers reg byte a +Statement [296] setnam::filename_len = (byte)setnam::$0 [ setnam::filename setnam::filename_len ] ( main:10::load_to_bank:41::setnam:174 [ main::SPRITE_ATTR setnam::filename setnam::filename_len ] { } ) always clobbers reg byte a Statement asm { ldafilename_len ldxfilename ldyfilename+1 jsr$ffbd } always clobbers reg byte a reg byte x reg byte y Statement asm { ldxdevice lda#1 ldy#0 jsr$ffba } always clobbers reg byte a reg byte x reg byte y -Statement [301] load::status = 0 [ load::address load::verify load::status ] ( main:10::LoadFileBanked:41::load:180 [ main::SPRITE_ATTR load::address load::verify load::status ] { } ) always clobbers reg byte a +Statement [301] load::status = 0 [ load::address load::verify load::status ] ( main:10::load_to_bank:41::load:180 [ main::SPRITE_ATTR load::address load::verify load::status ] { } ) always clobbers reg byte a Statement asm { ldxaddress ldyaddress+1 ldaverify jsr$ffd5 bcserror lda#$ff error: stastatus } always clobbers reg byte a reg byte x reg byte y Statement [304] vera_layer_set_config::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER) [ vera_layer_set_config::addr#0 ] ( vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ conio_screen_width conio_screen_height conio_x16_init::line#0 vera_layer_set_config::addr#0 ] { } conio_x16_init:8::vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ main::SPRITE_ATTR conio_screen_width conio_screen_height conio_x16_init::line#0 vera_layer_set_config::addr#0 ] { } ) always clobbers reg byte a Statement [305] *vera_layer_set_config::addr#0 = vera_layer_mode_tile::config#10 [ ] ( vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ conio_screen_width conio_screen_height conio_x16_init::line#0 ] { } conio_x16_init:8::vera_layer_mode_text:13::vera_layer_mode_tile:54::vera_layer_set_config:236 [ main::SPRITE_ATTR conio_screen_width conio_screen_height conio_x16_init::line#0 ] { } ) always clobbers reg byte a reg byte y @@ -6260,7 +6258,7 @@ Statement [323] cputln::$3 = conio_screen_layer << 1 [ conio_screen_width conio_ Statement [324] conio_line_text[cputln::$3] = cputln::temp#1 [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a Statement [325] conio_cursor_x[conio_screen_layer] = 0 [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte a reg byte y Statement [326] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer] [ conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] ( main:10::cputs:39::cputc:172::cputln:285 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:289 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } main:10::cputs:39::cputc:172::cputln:291 [ main::SPRITE_ATTR cputs::s#0 conio_width CONIO_SCREEN_BANK#14 conio_screen_width conio_screen_height conio_screen_layer conio_height conio_rowshift conio_rowskip CONIO_SCREEN_TEXT#16 ] { { cputc::c#0 = cputs::c#1 } } ) always clobbers reg byte x -Statement [331] if(0!=*strlen::str#2) goto strlen::@2 [ strlen::len#2 strlen::str#2 ] ( main:10::LoadFileBanked:41::setnam:174::strlen:293 [ main::SPRITE_ATTR setnam::filename strlen::len#2 strlen::str#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a reg byte y +Statement [331] if(0!=*strlen::str#2) goto strlen::@2 [ strlen::len#2 strlen::str#2 ] ( main:10::load_to_bank:41::setnam:174::strlen:293 [ main::SPRITE_ATTR setnam::filename strlen::len#2 strlen::str#2 ] { { strlen::str#1 = setnam::filename } { strlen::return#2 = strlen::len#2 } } ) always clobbers reg byte a reg byte y Statement [335] if(conio_cursor_y[conio_screen_layer]main::@5] __b5_from___b4: jmp __b5 // main::@5 __b5: - // [43] call bnkcpy_vram_address - // [182] phi from main::@5 to bnkcpy_vram_address [phi:main::@5->bnkcpy_vram_address] - bnkcpy_vram_address_from___b5: - // [182] phi bnkcpy_vram_address::num#2 = $20 [phi:main::@5->bnkcpy_vram_address#0] -- vduz1=vbuc1 + // [43] call memcpy_bank_to_vram + // [182] phi from main::@5 to memcpy_bank_to_vram [phi:main::@5->memcpy_bank_to_vram] + memcpy_bank_to_vram_from___b5: + // [182] phi memcpy_bank_to_vram::num#2 = $20 [phi:main::@5->memcpy_bank_to_vram#0] -- vduz1=vbuc1 lda #$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #0 - sta.z bnkcpy_vram_address.num+1 - sta.z bnkcpy_vram_address.num+2 - sta.z bnkcpy_vram_address.num+3 - // [182] phi bnkcpy_vram_address::beg#0 = main::BANK_SPRITE-2 [phi:main::@5->bnkcpy_vram_address#1] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.num+1 + sta.z memcpy_bank_to_vram.num+2 + sta.z memcpy_bank_to_vram.num+3 + // [182] phi memcpy_bank_to_vram::beg#0 = main::BANK_SPRITE-2 [phi:main::@5->memcpy_bank_to_vram#1] -- vduz1=vduc1 lda #BANK_SPRITE-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE-2>>$10 - sta.z bnkcpy_vram_address.beg+3 - // [182] phi bnkcpy_vram_address::vdest#2 = VERA_PALETTE+$20 [phi:main::@5->bnkcpy_vram_address#2] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.beg+3 + // [182] phi memcpy_bank_to_vram::vdest#2 = VERA_PALETTE+$20 [phi:main::@5->memcpy_bank_to_vram#2] -- vduz1=vduc1 lda #VERA_PALETTE+$20 - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VERA_PALETTE+$20>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram // [44] phi from main::@5 to main::@6 [phi:main::@5->main::@6] __b6_from___b5: jmp __b6 // main::@6 __b6: - // [45] call bnkcpy_vram_address - // [182] phi from main::@6 to bnkcpy_vram_address [phi:main::@6->bnkcpy_vram_address] - bnkcpy_vram_address_from___b6: - // [182] phi bnkcpy_vram_address::num#2 = (word)$40*$20 [phi:main::@6->bnkcpy_vram_address#0] -- vduz1=vduc1 + // [45] call memcpy_bank_to_vram + // [182] phi from main::@6 to memcpy_bank_to_vram [phi:main::@6->memcpy_bank_to_vram] + memcpy_bank_to_vram_from___b6: + // [182] phi memcpy_bank_to_vram::num#2 = (word)$40*$20 [phi:main::@6->memcpy_bank_to_vram#0] -- vduz1=vduc1 lda #<$40*$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #>$40*$20 - sta.z bnkcpy_vram_address.num+1 + sta.z memcpy_bank_to_vram.num+1 lda #<$40*$20>>$10 - sta.z bnkcpy_vram_address.num+2 + sta.z memcpy_bank_to_vram.num+2 lda #>$40*$20>>$10 - sta.z bnkcpy_vram_address.num+3 - // [182] phi bnkcpy_vram_address::beg#0 = main::BANK_SPRITE+$20-2 [phi:main::@6->bnkcpy_vram_address#1] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.num+3 + // [182] phi memcpy_bank_to_vram::beg#0 = main::BANK_SPRITE+$20-2 [phi:main::@6->memcpy_bank_to_vram#1] -- vduz1=vduc1 lda #BANK_SPRITE+$20-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE+$20-2>>$10 - sta.z bnkcpy_vram_address.beg+3 - // [182] phi bnkcpy_vram_address::vdest#2 = main::VRAM_SPRITE [phi:main::@6->bnkcpy_vram_address#2] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.beg+3 + // [182] phi memcpy_bank_to_vram::vdest#2 = main::VRAM_SPRITE [phi:main::@6->memcpy_bank_to_vram#2] -- vduz1=vduc1 lda #VRAM_SPRITE - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VRAM_SPRITE>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram jmp __b7 // main::@7 __b7: @@ -7726,12 +7725,14 @@ cputs: { // [166] phi cputs::s#2 = cputs::s#0 [phi:cputs::@2->cputs::@1#0] -- register_copy jmp __b1 } - // LoadFileBanked -// Load a file to memory -// Returns a status: -// - 0xff: Success -// - other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) -LoadFileBanked: { + // load_to_bank +// Load a file into one of the 256 8KB RAM banks. +// - device: The device to load from +// - filename: The file name +// - address: The absolute address in banked memory to load the file too +// - returns: 0xff: Success, other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) +// Note: This function only works if the entire file fits within the selected bank. The function cannot load to multiple banks. +load_to_bank: { .const device = 8 .const bank = ((>((main.BANK_SPRITE&$ffff)))>>5)+(<((main.BANK_SPRITE>>$10)<<3)) // [173] setnam::filename = main::filename -- pbuz1=pbuc1 @@ -7742,17 +7743,17 @@ LoadFileBanked: { // [174] call setnam jsr setnam jmp __b1 - // LoadFileBanked::@1 + // load_to_bank::@1 __b1: - // [175] setlfs::device = LoadFileBanked::device#0 -- vbuz1=vbuc1 + // [175] setlfs::device = load_to_bank::device#0 -- vbuz1=vbuc1 lda #device sta.z setlfs.device // [176] call setlfs jsr setlfs jmp __b2 - // LoadFileBanked::@2 + // load_to_bank::@2 __b2: - // [177] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = LoadFileBanked::bank#0 -- _deref_pbuc1=vbuc2 + // [177] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = load_to_bank::bank#0 -- _deref_pbuc1=vbuc2 lda #bank sta VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A // [178] load::address = (byte*)0+$a000 -- pbuz1=pbuc1 @@ -7766,19 +7767,20 @@ LoadFileBanked: { // [180] call load jsr load jmp __breturn - // LoadFileBanked::@return + // load_to_bank::@return __breturn: // [181] return rts } - // bnkcpy_vram_address -// Copy block of banked internal memory (256 banks at A000-BFFF) to VERA VRAM. + // memcpy_bank_to_vram +// Copy block of memory (from banked RAM to VRAM) // Copies the values of num bytes from the location pointed to by source directly to the memory block pointed to by destination in VRAM. -// - vdest: dword of the destination address in VRAM -// - src: dword of source banked address in RAM. This address is a linair project of the banked memory of 512K to 2048K. +// - vdest: absolute address in VRAM +// - src: absolute address in the banked RAM of the CX16. // - num: dword of the number of bytes to copy -// bnkcpy_vram_address(dword zp(3) vdest, dword zp(7) num) -bnkcpy_vram_address: { +// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks. +// memcpy_bank_to_vram(dword zp(3) vdest, dword zp(7) num) +memcpy_bank_to_vram: { .label __0 = $2b .label __2 = $2d .label __4 = $35 @@ -7805,39 +7807,39 @@ bnkcpy_vram_address: { lda #VERA_ADDRSEL^$ff and VERA_CTRL sta VERA_CTRL - // [184] bnkcpy_vram_address::$0 = < bnkcpy_vram_address::vdest#2 -- vwuz1=_lo_vduz2 + // [184] memcpy_bank_to_vram::$0 = < memcpy_bank_to_vram::vdest#2 -- vwuz1=_lo_vduz2 lda.z vdest sta.z __0 lda.z vdest+1 sta.z __0+1 - // [185] bnkcpy_vram_address::$1 = < bnkcpy_vram_address::$0 -- vbuaa=_lo_vwuz1 + // [185] memcpy_bank_to_vram::$1 = < memcpy_bank_to_vram::$0 -- vbuaa=_lo_vwuz1 lda.z __0 - // [186] *VERA_ADDRX_L = bnkcpy_vram_address::$1 -- _deref_pbuc1=vbuaa + // [186] *VERA_ADDRX_L = memcpy_bank_to_vram::$1 -- _deref_pbuc1=vbuaa // Set address sta VERA_ADDRX_L - // [187] bnkcpy_vram_address::$2 = < bnkcpy_vram_address::vdest#2 -- vwuz1=_lo_vduz2 + // [187] memcpy_bank_to_vram::$2 = < memcpy_bank_to_vram::vdest#2 -- vwuz1=_lo_vduz2 lda.z vdest sta.z __2 lda.z vdest+1 sta.z __2+1 - // [188] bnkcpy_vram_address::$3 = > bnkcpy_vram_address::$2 -- vbuaa=_hi_vwuz1 + // [188] memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2 -- vbuaa=_hi_vwuz1 lda.z __2+1 - // [189] *VERA_ADDRX_M = bnkcpy_vram_address::$3 -- _deref_pbuc1=vbuaa + // [189] *VERA_ADDRX_M = memcpy_bank_to_vram::$3 -- _deref_pbuc1=vbuaa sta VERA_ADDRX_M - // [190] bnkcpy_vram_address::$4 = > bnkcpy_vram_address::vdest#2 -- vwuz1=_hi_vduz2 + // [190] memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2 -- vwuz1=_hi_vduz2 lda.z vdest+2 sta.z __4 lda.z vdest+3 sta.z __4+1 - // [191] bnkcpy_vram_address::$5 = < bnkcpy_vram_address::$4 -- vbuaa=_lo_vwuz1 + // [191] memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4 -- vbuaa=_lo_vwuz1 lda.z __4 - // [192] *VERA_ADDRX_H = bnkcpy_vram_address::$5 -- _deref_pbuc1=vbuaa + // [192] *VERA_ADDRX_H = memcpy_bank_to_vram::$5 -- _deref_pbuc1=vbuaa sta VERA_ADDRX_H // [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 lda #VERA_INC_1 ora VERA_ADDRX_H sta VERA_ADDRX_H - // [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 -- vduz1=vduz2_plus_vduz1 + // [194] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2 -- vduz1=vduz2_plus_vduz1 lda.z end clc adc.z beg @@ -7851,35 +7853,35 @@ bnkcpy_vram_address: { lda.z end+3 adc.z beg+3 sta.z end+3 - // [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 -- vwuz1=_hi_vduz2 + // [195] memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0 -- vwuz1=_hi_vduz2 lda.z beg+2 sta.z __7 lda.z beg+3 sta.z __7+1 - // [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 -- vwuz1=vwuz1_rol_8 + // [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 -- vwuz1=vwuz1_rol_8 lda.z __8 sta.z __8+1 lda #0 sta.z __8 - // [197] bnkcpy_vram_address::$9 = < bnkcpy_vram_address::$8 -- vbuyy=_lo_vwuz1 + // [197] memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8 -- vbuyy=_lo_vwuz1 ldy.z __8 - // [198] bnkcpy_vram_address::$10 = < bnkcpy_vram_address::beg#0 -- vwuz1=_lo_vduz2 + // [198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0 -- vwuz1=_lo_vduz2 lda.z beg sta.z __10 lda.z beg+1 sta.z __10+1 - // [199] bnkcpy_vram_address::$11 = > bnkcpy_vram_address::$10 -- vbuxx=_hi_vwuz1 + // [199] memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10 -- vbuxx=_hi_vwuz1 ldx.z __10+1 - // [200] bnkcpy_vram_address::$23 = (word)bnkcpy_vram_address::$9 -- vwuz1=_word_vbuyy + // [200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9 -- vwuz1=_word_vbuyy tya sta.z __23 lda #0 sta.z __23+1 - // [201] bnkcpy_vram_address::$12 = bnkcpy_vram_address::$23 | bnkcpy_vram_address::$11 -- vwuz1=vwuz1_bor_vbuxx + // [201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11 -- vwuz1=vwuz1_bor_vbuxx txa ora.z __12 sta.z __12 - // [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 -- vwuz1=vwuz1_ror_5 + // [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 -- vwuz1=vwuz1_ror_5 lsr.z __13+1 ror.z __13 lsr.z __13+1 @@ -7890,25 +7892,25 @@ bnkcpy_vram_address: { ror.z __13 lsr.z __13+1 ror.z __13 - // [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 -- vwuz1=_hi_vduz2 + // [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 -- vwuz1=_hi_vduz2 lda.z beg+2 sta.z __14 lda.z beg+3 sta.z __14+1 - // [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 -- vwuz1=vwuz1_rol_3 + // [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 -- vwuz1=vwuz1_rol_3 asl.z __15 rol.z __15+1 asl.z __15 rol.z __15+1 asl.z __15 rol.z __15+1 - // [205] bnkcpy_vram_address::$16 = < bnkcpy_vram_address::$15 -- vbuaa=_lo_vwuz1 + // [205] memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15 -- vbuaa=_lo_vwuz1 lda.z __15 - // [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 -- vwuz1=_word_vbuaa + // [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 -- vwuz1=_word_vbuaa sta.z __24 lda #0 sta.z __24+1 - // [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 -- vwuz1=vwuz1_plus_vwuz2 + // [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 -- vwuz1=vwuz1_plus_vwuz2 lda.z __17 clc adc.z __24 @@ -7916,22 +7918,22 @@ bnkcpy_vram_address: { lda.z __17+1 adc.z __24+1 sta.z __17+1 - // [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 -- vbuxx=_byte_vwuz1 + // [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 -- vbuxx=_byte_vwuz1 lda.z __17 tax - // [209] bnkcpy_vram_address::$18 = < bnkcpy_vram_address::beg#0 -- vwuz1=_lo_vduz2 + // [209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0 -- vwuz1=_lo_vduz2 lda.z beg sta.z __18 lda.z beg+1 sta.z __18+1 - // [210] bnkcpy_vram_address::addr#0 = bnkcpy_vram_address::$18 & $1fff -- vwuz1=vwuz1_band_vwuc1 + // [210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff -- vwuz1=vwuz1_band_vwuc1 lda.z addr and #<$1fff sta.z addr lda.z addr+1 and #>$1fff sta.z addr+1 - // [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 -- pbuz1=pbuz1_plus_vwuc1 + // [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 -- pbuz1=pbuz1_plus_vwuc1 // stip off the top 3 bits, which are representing the bank of the word! clc lda.z addr @@ -7940,19 +7942,19 @@ bnkcpy_vram_address: { lda.z addr+1 adc #>$a000 sta.z addr+1 - // [212] *((byte*) 40801) = bnkcpy_vram_address::bank#0 -- _deref_pbuc1=vbuxx - stx $9f61 - // [213] phi from bnkcpy_vram_address bnkcpy_vram_address::@3 to bnkcpy_vram_address::@1 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1] - __b1_from_bnkcpy_vram_address: + // [212] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0 -- _deref_pbuc1=vbuxx + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A + // [213] phi from memcpy_bank_to_vram memcpy_bank_to_vram::@3 to memcpy_bank_to_vram::@1 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1] + __b1_from_memcpy_bank_to_vram: __b1_from___b3: - // [213] phi bnkcpy_vram_address::bank#2 = bnkcpy_vram_address::bank#0 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#0] -- register_copy - // [213] phi bnkcpy_vram_address::addr#4 = bnkcpy_vram_address::addr#1 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#1] -- register_copy - // [213] phi bnkcpy_vram_address::pos#2 = bnkcpy_vram_address::beg#0 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#2] -- register_copy + // [213] phi memcpy_bank_to_vram::bank#2 = memcpy_bank_to_vram::bank#0 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#0] -- register_copy + // [213] phi memcpy_bank_to_vram::addr#4 = memcpy_bank_to_vram::addr#1 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#1] -- register_copy + // [213] phi memcpy_bank_to_vram::pos#2 = memcpy_bank_to_vram::beg#0 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#2] -- register_copy jmp __b1 // select the bank - // bnkcpy_vram_address::@1 + // memcpy_bank_to_vram::@1 __b1: - // [214] if(bnkcpy_vram_address::pos#2$c000 bne __b3_from___b2 @@ -7984,38 +7986,38 @@ bnkcpy_vram_address: { cmp #<$c000 bne __b3_from___b2 jmp __b4 - // bnkcpy_vram_address::@4 + // memcpy_bank_to_vram::@4 __b4: - // [217] bnkcpy_vram_address::bank#1 = ++ bnkcpy_vram_address::bank#2 -- vbuxx=_inc_vbuxx + // [217] memcpy_bank_to_vram::bank#1 = ++ memcpy_bank_to_vram::bank#2 -- vbuxx=_inc_vbuxx inx - // [218] *((byte*) 40801) = bnkcpy_vram_address::bank#1 -- _deref_pbuc1=vbuxx - stx $9f61 - // [219] phi from bnkcpy_vram_address::@4 to bnkcpy_vram_address::@3 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3] + // [218] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#1 -- _deref_pbuc1=vbuxx + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A + // [219] phi from memcpy_bank_to_vram::@4 to memcpy_bank_to_vram::@3 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3] __b3_from___b4: - // [219] phi bnkcpy_vram_address::bank#5 = bnkcpy_vram_address::bank#1 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3#0] -- register_copy - // [219] phi bnkcpy_vram_address::addr#5 = (byte*) 40960 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3#1] -- pbuz1=pbuc1 + // [219] phi memcpy_bank_to_vram::bank#5 = memcpy_bank_to_vram::bank#1 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3#0] -- register_copy + // [219] phi memcpy_bank_to_vram::addr#5 = (byte*) 40960 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3#1] -- pbuz1=pbuc1 lda #<$a000 sta.z addr lda #>$a000 sta.z addr+1 jmp __b3 - // [219] phi from bnkcpy_vram_address::@2 to bnkcpy_vram_address::@3 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3] + // [219] phi from memcpy_bank_to_vram::@2 to memcpy_bank_to_vram::@3 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3] __b3_from___b2: - // [219] phi bnkcpy_vram_address::bank#5 = bnkcpy_vram_address::bank#2 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3#0] -- register_copy - // [219] phi bnkcpy_vram_address::addr#5 = bnkcpy_vram_address::addr#4 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3#1] -- register_copy + // [219] phi memcpy_bank_to_vram::bank#5 = memcpy_bank_to_vram::bank#2 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3#0] -- register_copy + // [219] phi memcpy_bank_to_vram::addr#5 = memcpy_bank_to_vram::addr#4 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3#1] -- register_copy jmp __b3 - // bnkcpy_vram_address::@3 + // memcpy_bank_to_vram::@3 __b3: - // [220] *VERA_DATA0 = *bnkcpy_vram_address::addr#5 -- _deref_pbuc1=_deref_pbuz1 + // [220] *VERA_DATA0 = *memcpy_bank_to_vram::addr#5 -- _deref_pbuc1=_deref_pbuz1 ldy #0 lda (addr),y sta VERA_DATA0 - // [221] bnkcpy_vram_address::addr#2 = ++ bnkcpy_vram_address::addr#5 -- pbuz1=_inc_pbuz1 + // [221] memcpy_bank_to_vram::addr#2 = ++ memcpy_bank_to_vram::addr#5 -- pbuz1=_inc_pbuz1 inc.z addr bne !+ inc.z addr+1 !: - // [222] bnkcpy_vram_address::pos#1 = ++ bnkcpy_vram_address::pos#2 -- vduz1=_inc_vduz1 + // [222] memcpy_bank_to_vram::pos#1 = ++ memcpy_bank_to_vram::pos#2 -- vduz1=_inc_vduz1 inc.z pos bne !+ inc.z pos+1 @@ -9283,9 +9285,9 @@ Removing instruction __b2_from___b1: Removing instruction __b3_from___b2: Removing instruction cputs_from___b3: Removing instruction __b5_from___b4: -Removing instruction bnkcpy_vram_address_from___b5: +Removing instruction memcpy_bank_to_vram_from___b5: Removing instruction __b6_from___b5: -Removing instruction bnkcpy_vram_address_from___b6: +Removing instruction memcpy_bank_to_vram_from___b6: Removing instruction __b1_from_vera_layer_mode_text: Removing instruction vera_layer_set_text_color_mode_from___b1: Removing instruction vera_layer_get_width1___breturn: @@ -9295,7 +9297,7 @@ Removing instruction __b4: Removing instruction __b1_from___b4: Removing instruction __b3_from___b1: Removing instruction __b3: -Removing instruction __b1_from_bnkcpy_vram_address: +Removing instruction __b1_from_memcpy_bank_to_vram: Removing instruction __b3_from___b2: Removing instruction __b2_from___b1: Removing instruction __b3_from___b5: @@ -9453,15 +9455,6 @@ byte CONIO_SCREEN_BANK byte CONIO_SCREEN_BANK#14 CONIO_SCREEN_BANK zp[1]:27 100.93636363636364 byte* CONIO_SCREEN_TEXT word CONIO_SCREEN_TEXT#16 CONIO_SCREEN_TEXT zp[2]:28 0.6392405063291139 -byte LoadFileBanked(byte LoadFileBanked::device , byte* LoadFileBanked::filename , dword LoadFileBanked::address) -byte* LoadFileBanked::addr -dword LoadFileBanked::address -byte LoadFileBanked::bank -const byte LoadFileBanked::bank#0 bank = (byte)>>5+(word)<>main::BANK_SPRITE<<3 -byte LoadFileBanked::device -const byte LoadFileBanked::device#0 device = 8 -byte* LoadFileBanked::filename -byte LoadFileBanked::return const byte OFFSET_STRUCT_MOS6522_VIA_PORT_A = 1 const byte OFFSET_STRUCT_VERA_SPRITE_X = 2 const byte OFFSET_STRUCT_VERA_SPRITE_Y = 4 @@ -9557,50 +9550,6 @@ const nomodify dword VERA_SPRITE_ATTR = $1fc00 const nomodify struct MOS6522_VIA* VIA1 = (struct MOS6522_VIA*) 40800 const nomodify byte WHITE = 1 void __start() -void bnkcpy_vram_address(dword bnkcpy_vram_address::vdest , dword bnkcpy_vram_address::src , dword bnkcpy_vram_address::num) -word~ bnkcpy_vram_address::$0 zp[2]:43 202.0 -byte~ bnkcpy_vram_address::$1 reg byte a 202.0 -word~ bnkcpy_vram_address::$10 zp[2]:59 202.0 -byte~ bnkcpy_vram_address::$11 reg byte x 101.0 -word~ bnkcpy_vram_address::$12 zp[2]:61 202.0 -word~ bnkcpy_vram_address::$13 zp[2]:61 40.4 -word~ bnkcpy_vram_address::$14 zp[2]:63 202.0 -word~ bnkcpy_vram_address::$15 zp[2]:63 202.0 -byte~ bnkcpy_vram_address::$16 reg byte a 101.0 -word~ bnkcpy_vram_address::$17 zp[2]:61 101.0 -word~ bnkcpy_vram_address::$18 zp[2]:15 202.0 -word~ bnkcpy_vram_address::$2 zp[2]:45 202.0 -word~ bnkcpy_vram_address::$23 zp[2]:61 202.0 -word~ bnkcpy_vram_address::$24 zp[2]:65 202.0 -byte~ bnkcpy_vram_address::$3 reg byte a 202.0 -word~ bnkcpy_vram_address::$4 zp[2]:53 202.0 -byte~ bnkcpy_vram_address::$5 reg byte a 202.0 -word~ bnkcpy_vram_address::$7 zp[2]:55 202.0 -word~ bnkcpy_vram_address::$8 zp[2]:55 202.0 -byte~ bnkcpy_vram_address::$9 reg byte y 33.666666666666664 -byte* bnkcpy_vram_address::addr -word bnkcpy_vram_address::addr#0 addr zp[2]:15 101.0 -byte* bnkcpy_vram_address::addr#1 addr zp[2]:15 101.0 -byte* bnkcpy_vram_address::addr#2 addr zp[2]:15 1001.0 -byte* bnkcpy_vram_address::addr#4 addr zp[2]:15 1034.6666666666667 -byte* bnkcpy_vram_address::addr#5 addr zp[2]:15 1501.5 -byte bnkcpy_vram_address::bank -byte bnkcpy_vram_address::bank#0 reg byte x 60.599999999999994 -byte bnkcpy_vram_address::bank#1 reg byte x 1501.5 -byte bnkcpy_vram_address::bank#2 reg byte x 1034.6666666666667 -byte bnkcpy_vram_address::bank#5 reg byte x 750.75 -dword bnkcpy_vram_address::beg -dword bnkcpy_vram_address::beg#0 beg zp[4]:11 19.548387096774196 -dword bnkcpy_vram_address::end -dword bnkcpy_vram_address::end#0 end zp[4]:7 39.357142857142854 -dword bnkcpy_vram_address::num -dword bnkcpy_vram_address::num#2 num zp[4]:7 8.416666666666666 -dword bnkcpy_vram_address::pos -dword bnkcpy_vram_address::pos#1 pos zp[4]:11 2002.0 -dword bnkcpy_vram_address::pos#2 pos zp[4]:11 388.0 -dword bnkcpy_vram_address::src -dword bnkcpy_vram_address::vdest -dword bnkcpy_vram_address::vdest#2 vdest zp[4]:3 37.875 void clearline() byte~ clearline::$1 reg byte a 2.00000002E8 byte~ clearline::$2 reg byte a 2.00000002E8 @@ -9708,6 +9657,15 @@ volatile byte* load::address loadstore zp[2]:40 33.666666666666664 byte load::return volatile byte load::status loadstore zp[1]:48 1001.0 volatile byte load::verify loadstore zp[1]:42 50.5 +byte load_to_bank(byte load_to_bank::device , byte* load_to_bank::filename , dword load_to_bank::address) +byte* load_to_bank::addr +dword load_to_bank::address +byte load_to_bank::bank +const byte load_to_bank::bank#0 bank = (byte)>>5+(word)<>main::BANK_SPRITE<<3 +byte load_to_bank::device +const byte load_to_bank::device#0 device = 8 +byte* load_to_bank::filename +byte load_to_bank::return void main() const nomodify dword main::BANK_SPRITE = $12000 struct VERA_SPRITE main::SPRITE_ATTR loadstore zp[8]:67 @@ -9717,6 +9675,50 @@ const byte* main::s[$2d] = " sprite banked file load and display demo. " +void memcpy_bank_to_vram(dword memcpy_bank_to_vram::vdest , dword memcpy_bank_to_vram::src , dword memcpy_bank_to_vram::num) +word~ memcpy_bank_to_vram::$0 zp[2]:43 202.0 +byte~ memcpy_bank_to_vram::$1 reg byte a 202.0 +word~ memcpy_bank_to_vram::$10 zp[2]:59 202.0 +byte~ memcpy_bank_to_vram::$11 reg byte x 101.0 +word~ memcpy_bank_to_vram::$12 zp[2]:61 202.0 +word~ memcpy_bank_to_vram::$13 zp[2]:61 40.4 +word~ memcpy_bank_to_vram::$14 zp[2]:63 202.0 +word~ memcpy_bank_to_vram::$15 zp[2]:63 202.0 +byte~ memcpy_bank_to_vram::$16 reg byte a 101.0 +word~ memcpy_bank_to_vram::$17 zp[2]:61 101.0 +word~ memcpy_bank_to_vram::$18 zp[2]:15 202.0 +word~ memcpy_bank_to_vram::$2 zp[2]:45 202.0 +word~ memcpy_bank_to_vram::$23 zp[2]:61 202.0 +word~ memcpy_bank_to_vram::$24 zp[2]:65 202.0 +byte~ memcpy_bank_to_vram::$3 reg byte a 202.0 +word~ memcpy_bank_to_vram::$4 zp[2]:53 202.0 +byte~ memcpy_bank_to_vram::$5 reg byte a 202.0 +word~ memcpy_bank_to_vram::$7 zp[2]:55 202.0 +word~ memcpy_bank_to_vram::$8 zp[2]:55 202.0 +byte~ memcpy_bank_to_vram::$9 reg byte y 33.666666666666664 +byte* memcpy_bank_to_vram::addr +word memcpy_bank_to_vram::addr#0 addr zp[2]:15 101.0 +byte* memcpy_bank_to_vram::addr#1 addr zp[2]:15 101.0 +byte* memcpy_bank_to_vram::addr#2 addr zp[2]:15 1001.0 +byte* memcpy_bank_to_vram::addr#4 addr zp[2]:15 1034.6666666666667 +byte* memcpy_bank_to_vram::addr#5 addr zp[2]:15 1501.5 +byte memcpy_bank_to_vram::bank +byte memcpy_bank_to_vram::bank#0 reg byte x 60.599999999999994 +byte memcpy_bank_to_vram::bank#1 reg byte x 1501.5 +byte memcpy_bank_to_vram::bank#2 reg byte x 1034.6666666666667 +byte memcpy_bank_to_vram::bank#5 reg byte x 750.75 +dword memcpy_bank_to_vram::beg +dword memcpy_bank_to_vram::beg#0 beg zp[4]:11 19.548387096774196 +dword memcpy_bank_to_vram::end +dword memcpy_bank_to_vram::end#0 end zp[4]:7 39.357142857142854 +dword memcpy_bank_to_vram::num +dword memcpy_bank_to_vram::num#2 num zp[4]:7 8.416666666666666 +dword memcpy_bank_to_vram::pos +dword memcpy_bank_to_vram::pos#1 pos zp[4]:11 2002.0 +dword memcpy_bank_to_vram::pos#2 pos zp[4]:11 388.0 +dword memcpy_bank_to_vram::src +dword memcpy_bank_to_vram::vdest +dword memcpy_bank_to_vram::vdest#2 vdest zp[4]:3 37.875 void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num) byte~ memcpy_in_vram::$0 reg byte a 2.0000000002E10 byte~ memcpy_in_vram::$1 reg byte a 2.0000000002E10 @@ -9942,11 +9944,11 @@ reg byte x [ gotoxy::y#4 gotoxy::y#3 gotoxy::y#0 gotoxy::y#2 ] reg byte a [ vera_layer_set_text_color_mode::layer#3 ] reg byte x [ clrscr::l#2 clrscr::l#1 ] reg byte y [ clrscr::c#2 clrscr::c#1 ] -zp[4]:3 [ bnkcpy_vram_address::vdest#2 ] -zp[4]:7 [ bnkcpy_vram_address::num#2 bnkcpy_vram_address::end#0 ] -zp[4]:11 [ bnkcpy_vram_address::pos#2 bnkcpy_vram_address::beg#0 bnkcpy_vram_address::pos#1 ] -reg byte x [ bnkcpy_vram_address::bank#2 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::bank#5 bnkcpy_vram_address::bank#1 ] -zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 bnkcpy_vram_address::addr#5 bnkcpy_vram_address::addr#4 bnkcpy_vram_address::addr#1 bnkcpy_vram_address::addr#2 bnkcpy_vram_address::addr#0 bnkcpy_vram_address::$18 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ] +zp[4]:3 [ memcpy_bank_to_vram::vdest#2 ] +zp[4]:7 [ memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::end#0 ] +zp[4]:11 [ memcpy_bank_to_vram::pos#2 memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::pos#1 ] +reg byte x [ memcpy_bank_to_vram::bank#2 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::bank#5 memcpy_bank_to_vram::bank#1 ] +zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_bank_to_vram::addr#5 memcpy_bank_to_vram::addr#4 memcpy_bank_to_vram::addr#1 memcpy_bank_to_vram::addr#2 memcpy_bank_to_vram::addr#0 memcpy_bank_to_vram::$18 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ] reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ] reg byte a [ vera_layer_get_color::return#2 vera_layer_get_color::return#0 vera_layer_get_color::return#1 ] reg byte x [ insertup::i#2 insertup::i#1 ] @@ -10002,12 +10004,12 @@ zp[2]:37 [ setnam::filename ] zp[1]:39 [ setlfs::device ] zp[2]:40 [ load::address ] zp[1]:42 [ load::verify ] -reg byte a [ bnkcpy_vram_address::$1 ] -reg byte a [ bnkcpy_vram_address::$3 ] -reg byte a [ bnkcpy_vram_address::$5 ] -reg byte y [ bnkcpy_vram_address::$9 ] -reg byte x [ bnkcpy_vram_address::$11 ] -reg byte a [ bnkcpy_vram_address::$16 ] +reg byte a [ memcpy_bank_to_vram::$1 ] +reg byte a [ memcpy_bank_to_vram::$3 ] +reg byte a [ memcpy_bank_to_vram::$5 ] +reg byte y [ memcpy_bank_to_vram::$9 ] +reg byte x [ memcpy_bank_to_vram::$11 ] +reg byte a [ memcpy_bank_to_vram::$16 ] reg byte a [ vera_layer_get_mapbase_bank::return#0 ] reg byte a [ vera_layer_get_mapbase_offset::$0 ] reg byte a [ vera_layer_get_rowshift::return#0 ] @@ -10017,32 +10019,32 @@ reg byte a [ vera_layer_get_textcolor::return#0 ] reg byte a [ vera_layer_get_color::return#3 ] reg byte x [ cputc::color#0 ] reg byte a [ cputc::$15 ] -zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 bnkcpy_vram_address::$0 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#1 strlen::str#0 ] +zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 memcpy_bank_to_vram::$0 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#1 strlen::str#0 ] reg byte a [ cputc::$2 ] reg byte a [ cputc::$4 ] reg byte a [ cputc::$5 ] reg byte a [ cputc::$6 ] reg byte a [ cputc::scroll_enable#0 ] -zp[2]:45 [ cputc::$16 bnkcpy_vram_address::$2 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#2 setnam::$0 ] +zp[2]:45 [ cputc::$16 memcpy_bank_to_vram::$2 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#2 setnam::$0 ] zp[1]:47 [ setnam::filename_len ] zp[1]:48 [ load::status ] zp[2]:49 [ vera_layer_set_config::addr#0 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ] zp[2]:51 [ vera_layer_set_tilebase::addr#0 screenlayer::vera_layer_get_width1_config#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 ] reg byte a [ vera_layer_get_color::$3 ] -zp[2]:53 [ vera_layer_get_color::addr#0 bnkcpy_vram_address::$4 ] +zp[2]:53 [ vera_layer_get_color::addr#0 memcpy_bank_to_vram::$4 ] reg byte a [ vera_layer_get_color::$0 ] reg byte a [ vera_layer_get_color::$1 ] reg byte a [ cputln::$2 ] -zp[2]:55 [ cputln::temp#0 cputln::temp#1 bnkcpy_vram_address::$7 bnkcpy_vram_address::$8 ] +zp[2]:55 [ cputln::temp#0 cputln::temp#1 memcpy_bank_to_vram::$7 memcpy_bank_to_vram::$8 ] reg byte a [ cputln::$3 ] zp[1]:57 [ insertup::cy#0 ] zp[1]:58 [ insertup::width#0 ] reg byte a [ insertup::$3 ] -zp[2]:59 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 bnkcpy_vram_address::$10 ] -zp[2]:61 [ memcpy_in_vram::src#0 bnkcpy_vram_address::$23 bnkcpy_vram_address::$12 bnkcpy_vram_address::$13 bnkcpy_vram_address::$17 ] -zp[2]:63 [ memcpy_in_vram::num#0 bnkcpy_vram_address::$14 bnkcpy_vram_address::$15 ] +zp[2]:59 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 memcpy_bank_to_vram::$10 ] +zp[2]:61 [ memcpy_in_vram::src#0 memcpy_bank_to_vram::$23 memcpy_bank_to_vram::$12 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$17 ] +zp[2]:63 [ memcpy_in_vram::num#0 memcpy_bank_to_vram::$14 memcpy_bank_to_vram::$15 ] reg byte a [ clearline::$5 ] -zp[2]:65 [ clearline::addr#0 bnkcpy_vram_address::$24 ] +zp[2]:65 [ clearline::addr#0 memcpy_bank_to_vram::$24 ] reg byte a [ clearline::$1 ] reg byte a [ clearline::$2 ] reg byte a [ vera_layer_get_color::return#4 ] @@ -10307,8 +10309,9 @@ conio_x16_init: { } // main main: { + // RAM Bank where sprite is loaded .label BANK_SPRITE = $12000 - // Load in bank 9. + // VRAM address of sprite .label VRAM_SPRITE = $10000 .label SPRITE_ATTR = $43 // vera_layer_set_text_color_mode( 1, VERA_LAYER_CONFIG_16C ) @@ -10342,73 +10345,73 @@ main: { sta SPRITE_ATTR-1,y dey bne !- - // LoadFileBanked(8, "SPRITE", BANK_SPRITE ) - // [41] call LoadFileBanked - jsr LoadFileBanked + // load_to_bank(8, "SPRITE", BANK_SPRITE ) + // [41] call load_to_bank + jsr load_to_bank // [42] phi from main::@4 to main::@5 [phi:main::@4->main::@5] // main::@5 - // bnkcpy_vram_address(VERA_PALETTE+32, BANK_SPRITE-2, 32) - // [43] call bnkcpy_vram_address - // [182] phi from main::@5 to bnkcpy_vram_address [phi:main::@5->bnkcpy_vram_address] - // [182] phi bnkcpy_vram_address::num#2 = $20 [phi:main::@5->bnkcpy_vram_address#0] -- vduz1=vbuc1 + // memcpy_bank_to_vram(VERA_PALETTE+32, BANK_SPRITE-2, 32) + // [43] call memcpy_bank_to_vram + // [182] phi from main::@5 to memcpy_bank_to_vram [phi:main::@5->memcpy_bank_to_vram] + // [182] phi memcpy_bank_to_vram::num#2 = $20 [phi:main::@5->memcpy_bank_to_vram#0] -- vduz1=vbuc1 lda #$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #0 - sta.z bnkcpy_vram_address.num+1 - sta.z bnkcpy_vram_address.num+2 - sta.z bnkcpy_vram_address.num+3 - // [182] phi bnkcpy_vram_address::beg#0 = main::BANK_SPRITE-2 [phi:main::@5->bnkcpy_vram_address#1] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.num+1 + sta.z memcpy_bank_to_vram.num+2 + sta.z memcpy_bank_to_vram.num+3 + // [182] phi memcpy_bank_to_vram::beg#0 = main::BANK_SPRITE-2 [phi:main::@5->memcpy_bank_to_vram#1] -- vduz1=vduc1 lda #BANK_SPRITE-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE-2>>$10 - sta.z bnkcpy_vram_address.beg+3 - // [182] phi bnkcpy_vram_address::vdest#2 = VERA_PALETTE+$20 [phi:main::@5->bnkcpy_vram_address#2] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.beg+3 + // [182] phi memcpy_bank_to_vram::vdest#2 = VERA_PALETTE+$20 [phi:main::@5->memcpy_bank_to_vram#2] -- vduz1=vduc1 lda #VERA_PALETTE+$20 - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VERA_PALETTE+$20>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram // [44] phi from main::@5 to main::@6 [phi:main::@5->main::@6] // main::@6 - // bnkcpy_vram_address(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32) - // [45] call bnkcpy_vram_address - // [182] phi from main::@6 to bnkcpy_vram_address [phi:main::@6->bnkcpy_vram_address] - // [182] phi bnkcpy_vram_address::num#2 = (word)$40*$20 [phi:main::@6->bnkcpy_vram_address#0] -- vduz1=vduc1 + // memcpy_bank_to_vram(VRAM_SPRITE, BANK_SPRITE+32-2, 64*32) + // [45] call memcpy_bank_to_vram + // [182] phi from main::@6 to memcpy_bank_to_vram [phi:main::@6->memcpy_bank_to_vram] + // [182] phi memcpy_bank_to_vram::num#2 = (word)$40*$20 [phi:main::@6->memcpy_bank_to_vram#0] -- vduz1=vduc1 lda #<$40*$20 - sta.z bnkcpy_vram_address.num + sta.z memcpy_bank_to_vram.num lda #>$40*$20 - sta.z bnkcpy_vram_address.num+1 + sta.z memcpy_bank_to_vram.num+1 lda #<$40*$20>>$10 - sta.z bnkcpy_vram_address.num+2 + sta.z memcpy_bank_to_vram.num+2 lda #>$40*$20>>$10 - sta.z bnkcpy_vram_address.num+3 - // [182] phi bnkcpy_vram_address::beg#0 = main::BANK_SPRITE+$20-2 [phi:main::@6->bnkcpy_vram_address#1] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.num+3 + // [182] phi memcpy_bank_to_vram::beg#0 = main::BANK_SPRITE+$20-2 [phi:main::@6->memcpy_bank_to_vram#1] -- vduz1=vduc1 lda #BANK_SPRITE+$20-2 - sta.z bnkcpy_vram_address.beg+1 + sta.z memcpy_bank_to_vram.beg+1 lda #>$10 - sta.z bnkcpy_vram_address.beg+2 + sta.z memcpy_bank_to_vram.beg+2 lda #>BANK_SPRITE+$20-2>>$10 - sta.z bnkcpy_vram_address.beg+3 - // [182] phi bnkcpy_vram_address::vdest#2 = main::VRAM_SPRITE [phi:main::@6->bnkcpy_vram_address#2] -- vduz1=vduc1 + sta.z memcpy_bank_to_vram.beg+3 + // [182] phi memcpy_bank_to_vram::vdest#2 = main::VRAM_SPRITE [phi:main::@6->memcpy_bank_to_vram#2] -- vduz1=vduc1 lda #VRAM_SPRITE - sta.z bnkcpy_vram_address.vdest+1 + sta.z memcpy_bank_to_vram.vdest+1 lda #>$10 - sta.z bnkcpy_vram_address.vdest+2 + sta.z memcpy_bank_to_vram.vdest+2 lda #>VRAM_SPRITE>>$10 - sta.z bnkcpy_vram_address.vdest+3 - jsr bnkcpy_vram_address + sta.z memcpy_bank_to_vram.vdest+3 + jsr memcpy_bank_to_vram // main::@7 // SPRITE_ATTR.ADDR = <(VRAM_SPRITE/32)|VERA_SPRITE_4BPP // [46] *((word*)&main::SPRITE_ATTR) = cputs::@1#0] -- register_copy jmp __b1 } - // LoadFileBanked -// Load a file to memory -// Returns a status: -// - 0xff: Success -// - other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) -LoadFileBanked: { + // load_to_bank +// Load a file into one of the 256 8KB RAM banks. +// - device: The device to load from +// - filename: The file name +// - address: The absolute address in banked memory to load the file too +// - returns: 0xff: Success, other: Kernal Error Code (https://commodore.ca/manuals/pdfs/commodore_error_messages.pdf) +// Note: This function only works if the entire file fits within the selected bank. The function cannot load to multiple banks. +load_to_bank: { .const device = 8 .const bank = ((>((main.BANK_SPRITE&$ffff)))>>5)+(<((main.BANK_SPRITE>>$10)<<3)) // setnam(filename) @@ -11061,16 +11066,16 @@ LoadFileBanked: { sta.z setnam.filename+1 // [174] call setnam jsr setnam - // LoadFileBanked::@1 + // load_to_bank::@1 // setlfs(device) - // [175] setlfs::device = LoadFileBanked::device#0 -- vbuz1=vbuc1 + // [175] setlfs::device = load_to_bank::device#0 -- vbuz1=vbuc1 lda #device sta.z setlfs.device // [176] call setlfs jsr setlfs - // LoadFileBanked::@2 + // load_to_bank::@2 // VIA1->PORT_A = (char)bank - // [177] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = LoadFileBanked::bank#0 -- _deref_pbuc1=vbuc2 + // [177] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = load_to_bank::bank#0 -- _deref_pbuc1=vbuc2 lda #bank sta VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A // load(addr, 0) @@ -11084,19 +11089,20 @@ LoadFileBanked: { sta.z load.verify // [180] call load jsr load - // LoadFileBanked::@return + // load_to_bank::@return // } // [181] return rts } - // bnkcpy_vram_address -// Copy block of banked internal memory (256 banks at A000-BFFF) to VERA VRAM. + // memcpy_bank_to_vram +// Copy block of memory (from banked RAM to VRAM) // Copies the values of num bytes from the location pointed to by source directly to the memory block pointed to by destination in VRAM. -// - vdest: dword of the destination address in VRAM -// - src: dword of source banked address in RAM. This address is a linair project of the banked memory of 512K to 2048K. +// - vdest: absolute address in VRAM +// - src: absolute address in the banked RAM of the CX16. // - num: dword of the number of bytes to copy -// bnkcpy_vram_address(dword zp(3) vdest, dword zp(7) num) -bnkcpy_vram_address: { +// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks. +// memcpy_bank_to_vram(dword zp(3) vdest, dword zp(7) num) +memcpy_bank_to_vram: { .label __0 = $2b .label __2 = $2d .label __4 = $35 @@ -11125,40 +11131,40 @@ bnkcpy_vram_address: { and VERA_CTRL sta VERA_CTRL // ( bnkcpy_vram_address::$2 -- vbuaa=_hi_vwuz1 + // [188] memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2 -- vbuaa=_hi_vwuz1 // *VERA_ADDRX_M = >(vdest - // [190] bnkcpy_vram_address::$4 = > bnkcpy_vram_address::vdest#2 -- vwuz1=_hi_vduz2 + // [190] memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2 -- vwuz1=_hi_vduz2 lda.z vdest+2 sta.z __4 lda.z vdest+3 sta.z __4+1 // <(>vdest) - // [191] bnkcpy_vram_address::$5 = < bnkcpy_vram_address::$4 -- vbuaa=_lo_vwuz1 + // [191] memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4 -- vbuaa=_lo_vwuz1 lda.z __4 // *VERA_ADDRX_H = <(>vdest) - // [192] *VERA_ADDRX_H = bnkcpy_vram_address::$5 -- _deref_pbuc1=vbuaa + // [192] *VERA_ADDRX_H = memcpy_bank_to_vram::$5 -- _deref_pbuc1=vbuaa sta VERA_ADDRX_H // *VERA_ADDRX_H |= VERA_INC_1 // [193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 @@ -11166,7 +11172,7 @@ bnkcpy_vram_address: { ora VERA_ADDRX_H sta VERA_ADDRX_H // end = src+num - // [194] bnkcpy_vram_address::end#0 = bnkcpy_vram_address::beg#0 + bnkcpy_vram_address::num#2 -- vduz1=vduz2_plus_vduz1 + // [194] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2 -- vduz1=vduz2_plus_vduz1 lda.z end clc adc.z beg @@ -11181,40 +11187,40 @@ bnkcpy_vram_address: { adc.z beg+3 sta.z end+3 // >beg - // [195] bnkcpy_vram_address::$7 = > bnkcpy_vram_address::beg#0 -- vwuz1=_hi_vduz2 + // [195] memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0 -- vwuz1=_hi_vduz2 lda.z beg+2 sta.z __7 lda.z beg+3 sta.z __7+1 // (>beg)<<8 - // [196] bnkcpy_vram_address::$8 = bnkcpy_vram_address::$7 << 8 -- vwuz1=vwuz1_rol_8 + // [196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8 -- vwuz1=vwuz1_rol_8 lda.z __8 sta.z __8+1 lda #0 sta.z __8 // <(>beg)<<8 - // [197] bnkcpy_vram_address::$9 = < bnkcpy_vram_address::$8 -- vbuyy=_lo_vwuz1 + // [197] memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8 -- vbuyy=_lo_vwuz1 tay // ( bnkcpy_vram_address::$10 -- vbuxx=_hi_vwuz1 + // [199] memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10 -- vbuxx=_hi_vwuz1 tax // ((word)<(>beg)<<8)|>(beg)<<8)|>(>5 - // [202] bnkcpy_vram_address::$13 = bnkcpy_vram_address::$12 >> 5 -- vwuz1=vwuz1_ror_5 + // [202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5 -- vwuz1=vwuz1_ror_5 lsr.z __13+1 ror.z __13 lsr.z __13+1 @@ -11226,13 +11232,13 @@ bnkcpy_vram_address: { lsr.z __13+1 ror.z __13 // >beg - // [203] bnkcpy_vram_address::$14 = > bnkcpy_vram_address::beg#0 -- vwuz1=_hi_vduz2 + // [203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0 -- vwuz1=_hi_vduz2 lda.z beg+2 sta.z __14 lda.z beg+3 sta.z __14+1 // (>beg)<<3 - // [204] bnkcpy_vram_address::$15 = bnkcpy_vram_address::$14 << 3 -- vwuz1=vwuz1_rol_3 + // [204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3 -- vwuz1=vwuz1_rol_3 asl.z __15 rol.z __15+1 asl.z __15 @@ -11240,14 +11246,14 @@ bnkcpy_vram_address: { asl.z __15 rol.z __15+1 // <(>beg)<<3 - // [205] bnkcpy_vram_address::$16 = < bnkcpy_vram_address::$15 -- vbuaa=_lo_vwuz1 + // [205] memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15 -- vbuaa=_lo_vwuz1 lda.z __15 // ((((word)<(>beg)<<8)|>(>5)+((word)<(>beg)<<3) - // [206] bnkcpy_vram_address::$24 = (word)bnkcpy_vram_address::$16 -- vwuz1=_word_vbuaa + // [206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16 -- vwuz1=_word_vbuaa sta.z __24 tya sta.z __24+1 - // [207] bnkcpy_vram_address::$17 = bnkcpy_vram_address::$13 + bnkcpy_vram_address::$24 -- vwuz1=vwuz1_plus_vwuz2 + // [207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24 -- vwuz1=vwuz1_plus_vwuz2 lda.z __17 clc adc.z __24 @@ -11256,17 +11262,17 @@ bnkcpy_vram_address: { adc.z __24+1 sta.z __17+1 // bank = (byte)(((((word)<(>beg)<<8)|>(>5)+((word)<(>beg)<<3)) - // [208] bnkcpy_vram_address::bank#0 = (byte)bnkcpy_vram_address::$17 -- vbuxx=_byte_vwuz1 + // [208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17 -- vbuxx=_byte_vwuz1 lda.z __17 tax // $1fff sta.z addr+1 // addr += 0xA000 - // [211] bnkcpy_vram_address::addr#1 = (byte*)bnkcpy_vram_address::addr#0 + $a000 -- pbuz1=pbuz1_plus_vwuc1 + // [211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000 -- pbuz1=pbuz1_plus_vwuc1 // stip off the top 3 bits, which are representing the bank of the word! clc lda.z addr @@ -11283,18 +11289,18 @@ bnkcpy_vram_address: { lda.z addr+1 adc #>$a000 sta.z addr+1 - // POKE - // [212] *((byte*) 40801) = bnkcpy_vram_address::bank#0 -- _deref_pbuc1=vbuxx - stx $9f61 - // [213] phi from bnkcpy_vram_address bnkcpy_vram_address::@3 to bnkcpy_vram_address::@1 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1] + // VIA1->PORT_A = (char)bank + // [212] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0 -- _deref_pbuc1=vbuxx + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A + // [213] phi from memcpy_bank_to_vram memcpy_bank_to_vram::@3 to memcpy_bank_to_vram::@1 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1] __b1: - // [213] phi bnkcpy_vram_address::bank#2 = bnkcpy_vram_address::bank#0 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#0] -- register_copy - // [213] phi bnkcpy_vram_address::addr#4 = bnkcpy_vram_address::addr#1 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#1] -- register_copy - // [213] phi bnkcpy_vram_address::pos#2 = bnkcpy_vram_address::beg#0 [phi:bnkcpy_vram_address/bnkcpy_vram_address::@3->bnkcpy_vram_address::@1#2] -- register_copy + // [213] phi memcpy_bank_to_vram::bank#2 = memcpy_bank_to_vram::bank#0 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#0] -- register_copy + // [213] phi memcpy_bank_to_vram::addr#4 = memcpy_bank_to_vram::addr#1 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#1] -- register_copy + // [213] phi memcpy_bank_to_vram::pos#2 = memcpy_bank_to_vram::beg#0 [phi:memcpy_bank_to_vram/memcpy_bank_to_vram::@3->memcpy_bank_to_vram::@1#2] -- register_copy // select the bank - // bnkcpy_vram_address::@1 - // for(dword pos=beg; pos$c000 bne __b3 lda.z addr cmp #<$c000 bne __b3 - // bnkcpy_vram_address::@4 - // POKE(0x9f61, (byte)++bank); - // [217] bnkcpy_vram_address::bank#1 = ++ bnkcpy_vram_address::bank#2 -- vbuxx=_inc_vbuxx + // memcpy_bank_to_vram::@4 + // VIA1->PORT_A = (char)++bank; + // [217] memcpy_bank_to_vram::bank#1 = ++ memcpy_bank_to_vram::bank#2 -- vbuxx=_inc_vbuxx inx - // POKE - // [218] *((byte*) 40801) = bnkcpy_vram_address::bank#1 -- _deref_pbuc1=vbuxx - stx $9f61 - // [219] phi from bnkcpy_vram_address::@4 to bnkcpy_vram_address::@3 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3] - // [219] phi bnkcpy_vram_address::bank#5 = bnkcpy_vram_address::bank#1 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3#0] -- register_copy - // [219] phi bnkcpy_vram_address::addr#5 = (byte*) 40960 [phi:bnkcpy_vram_address::@4->bnkcpy_vram_address::@3#1] -- pbuz1=pbuc1 + // VIA1->PORT_A = (char)++bank + // [218] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#1 -- _deref_pbuc1=vbuxx + stx VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A + // [219] phi from memcpy_bank_to_vram::@4 to memcpy_bank_to_vram::@3 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3] + // [219] phi memcpy_bank_to_vram::bank#5 = memcpy_bank_to_vram::bank#1 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3#0] -- register_copy + // [219] phi memcpy_bank_to_vram::addr#5 = (byte*) 40960 [phi:memcpy_bank_to_vram::@4->memcpy_bank_to_vram::@3#1] -- pbuz1=pbuc1 lda #<$a000 sta.z addr lda #>$a000 sta.z addr+1 - // [219] phi from bnkcpy_vram_address::@2 to bnkcpy_vram_address::@3 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3] - // [219] phi bnkcpy_vram_address::bank#5 = bnkcpy_vram_address::bank#2 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3#0] -- register_copy - // [219] phi bnkcpy_vram_address::addr#5 = bnkcpy_vram_address::addr#4 [phi:bnkcpy_vram_address::@2->bnkcpy_vram_address::@3#1] -- register_copy - // bnkcpy_vram_address::@3 + // [219] phi from memcpy_bank_to_vram::@2 to memcpy_bank_to_vram::@3 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3] + // [219] phi memcpy_bank_to_vram::bank#5 = memcpy_bank_to_vram::bank#2 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3#0] -- register_copy + // [219] phi memcpy_bank_to_vram::addr#5 = memcpy_bank_to_vram::addr#4 [phi:memcpy_bank_to_vram::@2->memcpy_bank_to_vram::@3#1] -- register_copy + // memcpy_bank_to_vram::@3 __b3: // *VERA_DATA0 = *addr - // [220] *VERA_DATA0 = *bnkcpy_vram_address::addr#5 -- _deref_pbuc1=_deref_pbuz1 + // [220] *VERA_DATA0 = *memcpy_bank_to_vram::addr#5 -- _deref_pbuc1=_deref_pbuz1 ldy #0 lda (addr),y sta VERA_DATA0 // addr++; - // [221] bnkcpy_vram_address::addr#2 = ++ bnkcpy_vram_address::addr#5 -- pbuz1=_inc_pbuz1 + // [221] memcpy_bank_to_vram::addr#2 = ++ memcpy_bank_to_vram::addr#5 -- pbuz1=_inc_pbuz1 inc.z addr bne !+ inc.z addr+1 !: - // for(dword pos=beg; pos>5+(word)<>main::BANK_SPRITE<<3 -byte LoadFileBanked::device -const byte LoadFileBanked::device#0 device = 8 -byte* LoadFileBanked::filename -byte LoadFileBanked::return const byte OFFSET_STRUCT_MOS6522_VIA_PORT_A = 1 const byte OFFSET_STRUCT_VERA_SPRITE_X = 2 const byte OFFSET_STRUCT_VERA_SPRITE_Y = 4 @@ -108,50 +99,6 @@ const nomodify dword VERA_SPRITE_ATTR = $1fc00 const nomodify struct MOS6522_VIA* VIA1 = (struct MOS6522_VIA*) 40800 const nomodify byte WHITE = 1 void __start() -void bnkcpy_vram_address(dword bnkcpy_vram_address::vdest , dword bnkcpy_vram_address::src , dword bnkcpy_vram_address::num) -word~ bnkcpy_vram_address::$0 zp[2]:43 202.0 -byte~ bnkcpy_vram_address::$1 reg byte a 202.0 -word~ bnkcpy_vram_address::$10 zp[2]:59 202.0 -byte~ bnkcpy_vram_address::$11 reg byte x 101.0 -word~ bnkcpy_vram_address::$12 zp[2]:61 202.0 -word~ bnkcpy_vram_address::$13 zp[2]:61 40.4 -word~ bnkcpy_vram_address::$14 zp[2]:63 202.0 -word~ bnkcpy_vram_address::$15 zp[2]:63 202.0 -byte~ bnkcpy_vram_address::$16 reg byte a 101.0 -word~ bnkcpy_vram_address::$17 zp[2]:61 101.0 -word~ bnkcpy_vram_address::$18 zp[2]:15 202.0 -word~ bnkcpy_vram_address::$2 zp[2]:45 202.0 -word~ bnkcpy_vram_address::$23 zp[2]:61 202.0 -word~ bnkcpy_vram_address::$24 zp[2]:65 202.0 -byte~ bnkcpy_vram_address::$3 reg byte a 202.0 -word~ bnkcpy_vram_address::$4 zp[2]:53 202.0 -byte~ bnkcpy_vram_address::$5 reg byte a 202.0 -word~ bnkcpy_vram_address::$7 zp[2]:55 202.0 -word~ bnkcpy_vram_address::$8 zp[2]:55 202.0 -byte~ bnkcpy_vram_address::$9 reg byte y 33.666666666666664 -byte* bnkcpy_vram_address::addr -word bnkcpy_vram_address::addr#0 addr zp[2]:15 101.0 -byte* bnkcpy_vram_address::addr#1 addr zp[2]:15 101.0 -byte* bnkcpy_vram_address::addr#2 addr zp[2]:15 1001.0 -byte* bnkcpy_vram_address::addr#4 addr zp[2]:15 1034.6666666666667 -byte* bnkcpy_vram_address::addr#5 addr zp[2]:15 1501.5 -byte bnkcpy_vram_address::bank -byte bnkcpy_vram_address::bank#0 reg byte x 60.599999999999994 -byte bnkcpy_vram_address::bank#1 reg byte x 1501.5 -byte bnkcpy_vram_address::bank#2 reg byte x 1034.6666666666667 -byte bnkcpy_vram_address::bank#5 reg byte x 750.75 -dword bnkcpy_vram_address::beg -dword bnkcpy_vram_address::beg#0 beg zp[4]:11 19.548387096774196 -dword bnkcpy_vram_address::end -dword bnkcpy_vram_address::end#0 end zp[4]:7 39.357142857142854 -dword bnkcpy_vram_address::num -dword bnkcpy_vram_address::num#2 num zp[4]:7 8.416666666666666 -dword bnkcpy_vram_address::pos -dword bnkcpy_vram_address::pos#1 pos zp[4]:11 2002.0 -dword bnkcpy_vram_address::pos#2 pos zp[4]:11 388.0 -dword bnkcpy_vram_address::src -dword bnkcpy_vram_address::vdest -dword bnkcpy_vram_address::vdest#2 vdest zp[4]:3 37.875 void clearline() byte~ clearline::$1 reg byte a 2.00000002E8 byte~ clearline::$2 reg byte a 2.00000002E8 @@ -259,6 +206,15 @@ volatile byte* load::address loadstore zp[2]:40 33.666666666666664 byte load::return volatile byte load::status loadstore zp[1]:48 1001.0 volatile byte load::verify loadstore zp[1]:42 50.5 +byte load_to_bank(byte load_to_bank::device , byte* load_to_bank::filename , dword load_to_bank::address) +byte* load_to_bank::addr +dword load_to_bank::address +byte load_to_bank::bank +const byte load_to_bank::bank#0 bank = (byte)>>5+(word)<>main::BANK_SPRITE<<3 +byte load_to_bank::device +const byte load_to_bank::device#0 device = 8 +byte* load_to_bank::filename +byte load_to_bank::return void main() const nomodify dword main::BANK_SPRITE = $12000 struct VERA_SPRITE main::SPRITE_ATTR loadstore zp[8]:67 @@ -268,6 +224,50 @@ const byte* main::s[$2d] = " sprite banked file load and display demo. " +void memcpy_bank_to_vram(dword memcpy_bank_to_vram::vdest , dword memcpy_bank_to_vram::src , dword memcpy_bank_to_vram::num) +word~ memcpy_bank_to_vram::$0 zp[2]:43 202.0 +byte~ memcpy_bank_to_vram::$1 reg byte a 202.0 +word~ memcpy_bank_to_vram::$10 zp[2]:59 202.0 +byte~ memcpy_bank_to_vram::$11 reg byte x 101.0 +word~ memcpy_bank_to_vram::$12 zp[2]:61 202.0 +word~ memcpy_bank_to_vram::$13 zp[2]:61 40.4 +word~ memcpy_bank_to_vram::$14 zp[2]:63 202.0 +word~ memcpy_bank_to_vram::$15 zp[2]:63 202.0 +byte~ memcpy_bank_to_vram::$16 reg byte a 101.0 +word~ memcpy_bank_to_vram::$17 zp[2]:61 101.0 +word~ memcpy_bank_to_vram::$18 zp[2]:15 202.0 +word~ memcpy_bank_to_vram::$2 zp[2]:45 202.0 +word~ memcpy_bank_to_vram::$23 zp[2]:61 202.0 +word~ memcpy_bank_to_vram::$24 zp[2]:65 202.0 +byte~ memcpy_bank_to_vram::$3 reg byte a 202.0 +word~ memcpy_bank_to_vram::$4 zp[2]:53 202.0 +byte~ memcpy_bank_to_vram::$5 reg byte a 202.0 +word~ memcpy_bank_to_vram::$7 zp[2]:55 202.0 +word~ memcpy_bank_to_vram::$8 zp[2]:55 202.0 +byte~ memcpy_bank_to_vram::$9 reg byte y 33.666666666666664 +byte* memcpy_bank_to_vram::addr +word memcpy_bank_to_vram::addr#0 addr zp[2]:15 101.0 +byte* memcpy_bank_to_vram::addr#1 addr zp[2]:15 101.0 +byte* memcpy_bank_to_vram::addr#2 addr zp[2]:15 1001.0 +byte* memcpy_bank_to_vram::addr#4 addr zp[2]:15 1034.6666666666667 +byte* memcpy_bank_to_vram::addr#5 addr zp[2]:15 1501.5 +byte memcpy_bank_to_vram::bank +byte memcpy_bank_to_vram::bank#0 reg byte x 60.599999999999994 +byte memcpy_bank_to_vram::bank#1 reg byte x 1501.5 +byte memcpy_bank_to_vram::bank#2 reg byte x 1034.6666666666667 +byte memcpy_bank_to_vram::bank#5 reg byte x 750.75 +dword memcpy_bank_to_vram::beg +dword memcpy_bank_to_vram::beg#0 beg zp[4]:11 19.548387096774196 +dword memcpy_bank_to_vram::end +dword memcpy_bank_to_vram::end#0 end zp[4]:7 39.357142857142854 +dword memcpy_bank_to_vram::num +dword memcpy_bank_to_vram::num#2 num zp[4]:7 8.416666666666666 +dword memcpy_bank_to_vram::pos +dword memcpy_bank_to_vram::pos#1 pos zp[4]:11 2002.0 +dword memcpy_bank_to_vram::pos#2 pos zp[4]:11 388.0 +dword memcpy_bank_to_vram::src +dword memcpy_bank_to_vram::vdest +dword memcpy_bank_to_vram::vdest#2 vdest zp[4]:3 37.875 void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num) byte~ memcpy_in_vram::$0 reg byte a 2.0000000002E10 byte~ memcpy_in_vram::$1 reg byte a 2.0000000002E10 @@ -493,11 +493,11 @@ reg byte x [ gotoxy::y#4 gotoxy::y#3 gotoxy::y#0 gotoxy::y#2 ] reg byte a [ vera_layer_set_text_color_mode::layer#3 ] reg byte x [ clrscr::l#2 clrscr::l#1 ] reg byte y [ clrscr::c#2 clrscr::c#1 ] -zp[4]:3 [ bnkcpy_vram_address::vdest#2 ] -zp[4]:7 [ bnkcpy_vram_address::num#2 bnkcpy_vram_address::end#0 ] -zp[4]:11 [ bnkcpy_vram_address::pos#2 bnkcpy_vram_address::beg#0 bnkcpy_vram_address::pos#1 ] -reg byte x [ bnkcpy_vram_address::bank#2 bnkcpy_vram_address::bank#0 bnkcpy_vram_address::bank#5 bnkcpy_vram_address::bank#1 ] -zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 bnkcpy_vram_address::addr#5 bnkcpy_vram_address::addr#4 bnkcpy_vram_address::addr#1 bnkcpy_vram_address::addr#2 bnkcpy_vram_address::addr#0 bnkcpy_vram_address::$18 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ] +zp[4]:3 [ memcpy_bank_to_vram::vdest#2 ] +zp[4]:7 [ memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::end#0 ] +zp[4]:11 [ memcpy_bank_to_vram::pos#2 memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::pos#1 ] +reg byte x [ memcpy_bank_to_vram::bank#2 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::bank#5 memcpy_bank_to_vram::bank#1 ] +zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_bank_to_vram::addr#5 memcpy_bank_to_vram::addr#4 memcpy_bank_to_vram::addr#1 memcpy_bank_to_vram::addr#2 memcpy_bank_to_vram::addr#0 memcpy_bank_to_vram::$18 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ] reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ] reg byte a [ vera_layer_get_color::return#2 vera_layer_get_color::return#0 vera_layer_get_color::return#1 ] reg byte x [ insertup::i#2 insertup::i#1 ] @@ -553,12 +553,12 @@ zp[2]:37 [ setnam::filename ] zp[1]:39 [ setlfs::device ] zp[2]:40 [ load::address ] zp[1]:42 [ load::verify ] -reg byte a [ bnkcpy_vram_address::$1 ] -reg byte a [ bnkcpy_vram_address::$3 ] -reg byte a [ bnkcpy_vram_address::$5 ] -reg byte y [ bnkcpy_vram_address::$9 ] -reg byte x [ bnkcpy_vram_address::$11 ] -reg byte a [ bnkcpy_vram_address::$16 ] +reg byte a [ memcpy_bank_to_vram::$1 ] +reg byte a [ memcpy_bank_to_vram::$3 ] +reg byte a [ memcpy_bank_to_vram::$5 ] +reg byte y [ memcpy_bank_to_vram::$9 ] +reg byte x [ memcpy_bank_to_vram::$11 ] +reg byte a [ memcpy_bank_to_vram::$16 ] reg byte a [ vera_layer_get_mapbase_bank::return#0 ] reg byte a [ vera_layer_get_mapbase_offset::$0 ] reg byte a [ vera_layer_get_rowshift::return#0 ] @@ -568,32 +568,32 @@ reg byte a [ vera_layer_get_textcolor::return#0 ] reg byte a [ vera_layer_get_color::return#3 ] reg byte x [ cputc::color#0 ] reg byte a [ cputc::$15 ] -zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 bnkcpy_vram_address::$0 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#1 strlen::str#0 ] +zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 memcpy_bank_to_vram::$0 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#1 strlen::str#0 ] reg byte a [ cputc::$2 ] reg byte a [ cputc::$4 ] reg byte a [ cputc::$5 ] reg byte a [ cputc::$6 ] reg byte a [ cputc::scroll_enable#0 ] -zp[2]:45 [ cputc::$16 bnkcpy_vram_address::$2 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#2 setnam::$0 ] +zp[2]:45 [ cputc::$16 memcpy_bank_to_vram::$2 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#2 setnam::$0 ] zp[1]:47 [ setnam::filename_len ] zp[1]:48 [ load::status ] zp[2]:49 [ vera_layer_set_config::addr#0 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ] zp[2]:51 [ vera_layer_set_tilebase::addr#0 screenlayer::vera_layer_get_width1_config#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 ] reg byte a [ vera_layer_get_color::$3 ] -zp[2]:53 [ vera_layer_get_color::addr#0 bnkcpy_vram_address::$4 ] +zp[2]:53 [ vera_layer_get_color::addr#0 memcpy_bank_to_vram::$4 ] reg byte a [ vera_layer_get_color::$0 ] reg byte a [ vera_layer_get_color::$1 ] reg byte a [ cputln::$2 ] -zp[2]:55 [ cputln::temp#0 cputln::temp#1 bnkcpy_vram_address::$7 bnkcpy_vram_address::$8 ] +zp[2]:55 [ cputln::temp#0 cputln::temp#1 memcpy_bank_to_vram::$7 memcpy_bank_to_vram::$8 ] reg byte a [ cputln::$3 ] zp[1]:57 [ insertup::cy#0 ] zp[1]:58 [ insertup::width#0 ] reg byte a [ insertup::$3 ] -zp[2]:59 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 bnkcpy_vram_address::$10 ] -zp[2]:61 [ memcpy_in_vram::src#0 bnkcpy_vram_address::$23 bnkcpy_vram_address::$12 bnkcpy_vram_address::$13 bnkcpy_vram_address::$17 ] -zp[2]:63 [ memcpy_in_vram::num#0 bnkcpy_vram_address::$14 bnkcpy_vram_address::$15 ] +zp[2]:59 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 memcpy_bank_to_vram::$10 ] +zp[2]:61 [ memcpy_in_vram::src#0 memcpy_bank_to_vram::$23 memcpy_bank_to_vram::$12 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$17 ] +zp[2]:63 [ memcpy_in_vram::num#0 memcpy_bank_to_vram::$14 memcpy_bank_to_vram::$15 ] reg byte a [ clearline::$5 ] -zp[2]:65 [ clearline::addr#0 bnkcpy_vram_address::$24 ] +zp[2]:65 [ clearline::addr#0 memcpy_bank_to_vram::$24 ] reg byte a [ clearline::$1 ] reg byte a [ clearline::$2 ] reg byte a [ vera_layer_get_color::return#4 ]